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kn02ba.h

kn02ba.h 2.0 KB
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  1. /* SPDX-License-Identifier: GPL-2.0-or-later */
    2. 

  2. /*
    3. 

  3.  *	include/asm-mips/dec/kn02ba.h
    4. 

  4.  *
    5. 

  5.  *	DECstation 5000/1xx (3min or KN02-BA) definitions.
    6. 

  6.  *
    7. 

  7.  *	Copyright (C) 2002, 2003  Maciej W. Rozycki
    8. 

  8.  */
    9. 

  9. #ifndef __ASM_MIPS_DEC_KN02BA_H
    10. 

  10. #define __ASM_MIPS_DEC_KN02BA_H
    11. 

  11. 

  12. #include <asm/dec/kn02xa.h>		/* For common definitions. */
    13. 

  13. 

  14. /*
    15. 

  15.  * CPU interrupt bits.
    16. 

  16.  */
    17. 

  17. #define KN02BA_CPU_INR_HALT	6	/* HALT button */
    18. 

  18. #define KN02BA_CPU_INR_CASCADE	5	/* I/O ASIC cascade */
    19. 

  19. #define KN02BA_CPU_INR_TC2	4	/* TURBOchannel slot #2 */
    20. 

  20. #define KN02BA_CPU_INR_TC1	3	/* TURBOchannel slot #1 */
    21. 

  21. #define KN02BA_CPU_INR_TC0	2	/* TURBOchannel slot #0 */
    22. 

  22. 

  23. /*
    24. 

  24.  * I/O ASIC interrupt bits.  Star marks denote non-IRQ status bits.
    25. 

  25.  */
    26. 

  26. #define KN02BA_IO_INR_RES_15	15	/* unused */
    27. 

  27. #define KN02BA_IO_INR_NVRAM	14	/* (*) NVRAM clear jumper */
    28. 

  28. #define KN02BA_IO_INR_RES_13	13	/* unused */
    29. 

  29. #define KN02BA_IO_INR_BUS	12	/* memory, I/O bus read/write errors */
    30. 

  30. #define KN02BA_IO_INR_RES_11	11	/* unused */
    31. 

  31. #define KN02BA_IO_INR_NRMOD	10	/* (*) NRMOD manufacturing jumper */
    32. 

  32. #define KN02BA_IO_INR_ASC	9	/* ASC (NCR53C94) SCSI */
    33. 

  33. #define KN02BA_IO_INR_LANCE	8	/* LANCE (Am7990) Ethernet */
    34. 

  34. #define KN02BA_IO_INR_SCC1	7	/* SCC (Z85C30) serial #1 */
    35. 

  35. #define KN02BA_IO_INR_SCC0	6	/* SCC (Z85C30) serial #0 */
    36. 

  36. #define KN02BA_IO_INR_RTC	5	/* DS1287 RTC */
    37. 

  37. #define KN02BA_IO_INR_PSU	4	/* power supply unit warning */
    38. 

  38. #define KN02BA_IO_INR_RES_3	3	/* unused */
    39. 

  39. #define KN02BA_IO_INR_ASC_DATA	2	/* SCSI data ready (for PIO) */
    40. 

  40. #define KN02BA_IO_INR_PBNC	1	/* ~HALT button debouncer */
    41. 

  41. #define KN02BA_IO_INR_PBNO	0	/* HALT button debouncer */
    42. 

  42. 

  43. 

  44. /*
    45. 

  45.  * Memory Error Register bits.
    46. 

  46.  */
    47. 

  47. #define KN02BA_MER_RES_27	(1<<27)		/* unused */
    48. 

  48. 

  49. /*
    50. 

  50.  * Memory Size Register bits.
    51. 

  51.  */
    52. 

  52. #define KN02BA_MSR_RES_17	(0x3ff<<17)	/* unused */
    53. 

  53. 

  54. /*
    55. 

  55.  * I/O ASIC System Support Register bits.
    56. 

  56.  */
    57. 

  57. #define KN02BA_IO_SSR_TXDIS1	(1<<14)		/* SCC1 transmit disable */
    58. 

  58. #define KN02BA_IO_SSR_TXDIS0	(1<<13)		/* SCC0 transmit disable */
    59. 

  59. #define KN02BA_IO_SSR_RES_12	(1<<12)		/* unused */
    60. 

  60. 

  61. #define KN02BA_IO_SSR_LEDS	(0xff<<0)	/* ~diagnostic LEDs */
    62. 

  62. 

  63. #endif /* __ASM_MIPS_DEC_KN02BA_H */
    64.