mt7628a.dtsi 5.7 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. / {
  3. #address-cells = <1>;
  4. #size-cells = <1>;
  5. compatible = "ralink,mt7628a-soc";
  6. cpus {
  7. #address-cells = <1>;
  8. #size-cells = <0>;
  9. cpu@0 {
  10. compatible = "mti,mips24KEc";
  11. device_type = "cpu";
  12. reg = <0>;
  13. };
  14. };
  15. resetc: reset-controller {
  16. compatible = "ralink,rt2880-reset";
  17. #reset-cells = <1>;
  18. };
  19. cpuintc: interrupt-controller {
  20. #address-cells = <0>;
  21. #interrupt-cells = <1>;
  22. interrupt-controller;
  23. compatible = "mti,cpu-interrupt-controller";
  24. };
  25. palmbus@10000000 {
  26. compatible = "palmbus";
  27. reg = <0x10000000 0x200000>;
  28. ranges = <0x0 0x10000000 0x1FFFFF>;
  29. #address-cells = <1>;
  30. #size-cells = <1>;
  31. sysc: system-controller@0 {
  32. compatible = "ralink,mt7620a-sysc", "syscon";
  33. reg = <0x0 0x60>;
  34. };
  35. pinmux: pinmux@60 {
  36. compatible = "pinctrl-single";
  37. reg = <0x60 0x8>;
  38. #address-cells = <1>;
  39. #size-cells = <0>;
  40. #pinctrl-cells = <2>;
  41. pinctrl-single,bit-per-mux;
  42. pinctrl-single,register-width = <32>;
  43. pinctrl-single,function-mask = <0x1>;
  44. pinmux_gpio_gpio: pinmux_gpio_gpio {
  45. pinctrl-single,bits = <0x0 0x0 0x3>;
  46. };
  47. pinmux_spi_cs1_cs: pinmux_spi_cs1_cs {
  48. pinctrl-single,bits = <0x0 0x0 0x30>;
  49. };
  50. pinmux_i2s_gpio: pinmux_i2s_gpio {
  51. pinctrl-single,bits = <0x0 0x40 0xc0>;
  52. };
  53. pinmux_uart0_uart: pinmux_uart0_uart0 {
  54. pinctrl-single,bits = <0x0 0x0 0x300>;
  55. };
  56. pinmux_sdmode_sdxc: pinmux_sdmode_sdxc {
  57. pinctrl-single,bits = <0x0 0x0 0xc00>;
  58. };
  59. pinmux_sdmode_gpio: pinmux_sdmode_gpio {
  60. pinctrl-single,bits = <0x0 0x400 0xc00>;
  61. };
  62. pinmux_spi_spi: pinmux_spi_spi {
  63. pinctrl-single,bits = <0x0 0x0 0x1000>;
  64. };
  65. pinmux_refclk_gpio: pinmux_refclk_gpio {
  66. pinctrl-single,bits = <0x0 0x40000 0x40000>;
  67. };
  68. pinmux_i2c_i2c: pinmux_i2c_i2c {
  69. pinctrl-single,bits = <0x0 0x0 0x300000>;
  70. };
  71. pinmux_uart1_uart: pinmux_uart1_uart1 {
  72. pinctrl-single,bits = <0x0 0x0 0x3000000>;
  73. };
  74. pinmux_uart2_uart: pinmux_uart2_uart {
  75. pinctrl-single,bits = <0x0 0x0 0xc000000>;
  76. };
  77. pinmux_pwm0_pwm: pinmux_pwm0_pwm {
  78. pinctrl-single,bits = <0x0 0x0 0x30000000>;
  79. };
  80. pinmux_pwm0_gpio: pinmux_pwm0_gpio {
  81. pinctrl-single,bits = <0x0 0x10000000
  82. 0x30000000>;
  83. };
  84. pinmux_pwm1_pwm: pinmux_pwm1_pwm {
  85. pinctrl-single,bits = <0x0 0x0 0xc0000000>;
  86. };
  87. pinmux_pwm1_gpio: pinmux_pwm1_gpio {
  88. pinctrl-single,bits = <0x0 0x40000000
  89. 0xc0000000>;
  90. };
  91. pinmux_p0led_an_gpio: pinmux_p0led_an_gpio {
  92. pinctrl-single,bits = <0x4 0x4 0xc>;
  93. };
  94. pinmux_p1led_an_gpio: pinmux_p1led_an_gpio {
  95. pinctrl-single,bits = <0x4 0x10 0x30>;
  96. };
  97. pinmux_p2led_an_gpio: pinmux_p2led_an_gpio {
  98. pinctrl-single,bits = <0x4 0x40 0xc0>;
  99. };
  100. pinmux_p3led_an_gpio: pinmux_p3led_an_gpio {
  101. pinctrl-single,bits = <0x4 0x100 0x300>;
  102. };
  103. pinmux_p4led_an_gpio: pinmux_p4led_an_gpio {
  104. pinctrl-single,bits = <0x4 0x400 0xc00>;
  105. };
  106. };
  107. watchdog: watchdog@100 {
  108. compatible = "mediatek,mt7621-wdt";
  109. reg = <0x100 0x30>;
  110. resets = <&resetc 8>;
  111. reset-names = "wdt";
  112. interrupt-parent = <&intc>;
  113. interrupts = <24>;
  114. status = "disabled";
  115. };
  116. intc: interrupt-controller@200 {
  117. compatible = "ralink,rt2880-intc";
  118. reg = <0x200 0x100>;
  119. interrupt-controller;
  120. #interrupt-cells = <1>;
  121. resets = <&resetc 9>;
  122. reset-names = "intc";
  123. interrupt-parent = <&cpuintc>;
  124. interrupts = <2>;
  125. ralink,intc-registers = <0x9c 0xa0
  126. 0x6c 0xa4
  127. 0x80 0x78>;
  128. };
  129. memory-controller@300 {
  130. compatible = "ralink,mt7620a-memc";
  131. reg = <0x300 0x100>;
  132. };
  133. gpio: gpio@600 {
  134. compatible = "mediatek,mt7621-gpio";
  135. reg = <0x600 0x100>;
  136. gpio-controller;
  137. interrupt-controller;
  138. #gpio-cells = <2>;
  139. #interrupt-cells = <2>;
  140. interrupt-parent = <&intc>;
  141. interrupts = <6>;
  142. };
  143. spi: spi@b00 {
  144. compatible = "ralink,mt7621-spi";
  145. reg = <0xb00 0x100>;
  146. pinctrl-names = "default";
  147. pinctrl-0 = <&pinmux_spi_spi>;
  148. resets = <&resetc 18>;
  149. reset-names = "spi";
  150. #address-cells = <1>;
  151. #size-cells = <0>;
  152. status = "disabled";
  153. };
  154. i2c: i2c@900 {
  155. compatible = "mediatek,mt7621-i2c";
  156. reg = <0x900 0x100>;
  157. pinctrl-names = "default";
  158. pinctrl-0 = <&pinmux_i2c_i2c>;
  159. resets = <&resetc 16>;
  160. reset-names = "i2c";
  161. #address-cells = <1>;
  162. #size-cells = <0>;
  163. status = "disabled";
  164. };
  165. uart0: uartlite@c00 {
  166. compatible = "ns16550a";
  167. reg = <0xc00 0x100>;
  168. pinctrl-names = "default";
  169. pinctrl-0 = <&pinmux_uart0_uart>;
  170. resets = <&resetc 12>;
  171. reset-names = "uart0";
  172. interrupt-parent = <&intc>;
  173. interrupts = <20>;
  174. reg-shift = <2>;
  175. };
  176. uart1: uart1@d00 {
  177. compatible = "ns16550a";
  178. reg = <0xd00 0x100>;
  179. pinctrl-names = "default";
  180. pinctrl-0 = <&pinmux_uart1_uart>;
  181. resets = <&resetc 19>;
  182. reset-names = "uart1";
  183. interrupt-parent = <&intc>;
  184. interrupts = <21>;
  185. reg-shift = <2>;
  186. };
  187. uart2: uart2@e00 {
  188. compatible = "ns16550a";
  189. reg = <0xe00 0x100>;
  190. pinctrl-names = "default";
  191. pinctrl-0 = <&pinmux_uart2_uart>;
  192. resets = <&resetc 20>;
  193. reset-names = "uart2";
  194. interrupt-parent = <&intc>;
  195. interrupts = <22>;
  196. reg-shift = <2>;
  197. };
  198. };
  199. usb_phy: usb-phy@10120000 {
  200. compatible = "mediatek,mt7628-usbphy";
  201. reg = <0x10120000 0x1000>;
  202. #phy-cells = <0>;
  203. ralink,sysctl = <&sysc>;
  204. resets = <&resetc 22 &resetc 25>;
  205. reset-names = "host", "device";
  206. };
  207. usb@101c0000 {
  208. compatible = "generic-ehci";
  209. reg = <0x101c0000 0x1000>;
  210. phys = <&usb_phy>;
  211. phy-names = "usb";
  212. interrupt-parent = <&intc>;
  213. interrupts = <18>;
  214. };
  215. wmac: wmac@10300000 {
  216. compatible = "mediatek,mt7628-wmac";
  217. reg = <0x10300000 0x100000>;
  218. interrupt-parent = <&cpuintc>;
  219. interrupts = <6>;
  220. status = "disabled";
  221. };
  222. };