danube.dtsi 2.1 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106
  1. // SPDX-License-Identifier: GPL-2.0
  2. / {
  3. #address-cells = <1>;
  4. #size-cells = <1>;
  5. compatible = "lantiq,xway", "lantiq,danube";
  6. cpus {
  7. cpu@0 {
  8. compatible = "mips,mips24Kc";
  9. };
  10. };
  11. biu@1f800000 {
  12. #address-cells = <1>;
  13. #size-cells = <1>;
  14. compatible = "lantiq,biu", "simple-bus";
  15. reg = <0x1f800000 0x800000>;
  16. ranges = <0x0 0x1f800000 0x7fffff>;
  17. icu0: icu@80200 {
  18. #interrupt-cells = <1>;
  19. interrupt-controller;
  20. compatible = "lantiq,icu";
  21. reg = <0x80200 0x120>;
  22. };
  23. watchdog@803f0 {
  24. compatible = "lantiq,wdt";
  25. reg = <0x803f0 0x10>;
  26. };
  27. };
  28. sram@1f000000 {
  29. #address-cells = <1>;
  30. #size-cells = <1>;
  31. compatible = "lantiq,sram";
  32. reg = <0x1f000000 0x800000>;
  33. ranges = <0x0 0x1f000000 0x7fffff>;
  34. eiu0: eiu@101000 {
  35. #interrupt-cells = <1>;
  36. interrupt-controller;
  37. interrupt-parent;
  38. compatible = "lantiq,eiu-xway";
  39. reg = <0x101000 0x1000>;
  40. };
  41. pmu0: pmu@102000 {
  42. compatible = "lantiq,pmu-xway";
  43. reg = <0x102000 0x1000>;
  44. };
  45. cgu0: cgu@103000 {
  46. compatible = "lantiq,cgu-xway";
  47. reg = <0x103000 0x1000>;
  48. #clock-cells = <1>;
  49. };
  50. rcu0: rcu@203000 {
  51. compatible = "lantiq,rcu-xway";
  52. reg = <0x203000 0x1000>;
  53. };
  54. };
  55. fpi@10000000 {
  56. #address-cells = <1>;
  57. #size-cells = <1>;
  58. compatible = "lantiq,fpi", "simple-bus";
  59. ranges = <0x0 0x10000000 0xeefffff>;
  60. reg = <0x10000000 0xef00000>;
  61. gptu@e100a00 {
  62. compatible = "lantiq,gptu-xway";
  63. reg = <0xe100a00 0x100>;
  64. };
  65. serial@e100c00 {
  66. compatible = "lantiq,asc";
  67. reg = <0xe100c00 0x400>;
  68. interrupt-parent = <&icu0>;
  69. interrupts = <112 113 114>;
  70. };
  71. dma0: dma@e104100 {
  72. compatible = "lantiq,dma-xway";
  73. reg = <0xe104100 0x800>;
  74. };
  75. ebu0: ebu@e105300 {
  76. compatible = "lantiq,ebu-xway";
  77. reg = <0xe105300 0x100>;
  78. };
  79. pci0: pci@e105400 {
  80. #address-cells = <3>;
  81. #size-cells = <2>;
  82. #interrupt-cells = <1>;
  83. compatible = "lantiq,pci-xway";
  84. bus-range = <0x0 0x0>;
  85. ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000 /* pci memory */
  86. 0x1000000 0 0x00000000 0xae00000 0 0x200000>; /* io space */
  87. reg = <0x7000000 0x8000 /* config space */
  88. 0xe105400 0x400>; /* pci bridge */
  89. };
  90. };
  91. };