jz4780.dtsi 12 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. #include <dt-bindings/clock/ingenic,jz4780-cgu.h>
  3. #include <dt-bindings/clock/ingenic,tcu.h>
  4. #include <dt-bindings/dma/jz4780-dma.h>
  5. / {
  6. #address-cells = <1>;
  7. #size-cells = <1>;
  8. compatible = "ingenic,jz4780";
  9. cpus {
  10. #address-cells = <1>;
  11. #size-cells = <0>;
  12. cpu0: cpu@0 {
  13. device_type = "cpu";
  14. compatible = "ingenic,xburst-fpu1.0-mxu1.1";
  15. reg = <0>;
  16. clocks = <&cgu JZ4780_CLK_CPU>;
  17. clock-names = "cpu";
  18. };
  19. cpu1: cpu@1 {
  20. device_type = "cpu";
  21. compatible = "ingenic,xburst-fpu1.0-mxu1.1";
  22. reg = <1>;
  23. clocks = <&cgu JZ4780_CLK_CORE1>;
  24. clock-names = "cpu";
  25. };
  26. };
  27. cpuintc: interrupt-controller {
  28. #address-cells = <0>;
  29. #interrupt-cells = <1>;
  30. interrupt-controller;
  31. compatible = "mti,cpu-interrupt-controller";
  32. };
  33. intc: interrupt-controller@10001000 {
  34. compatible = "ingenic,jz4780-intc";
  35. reg = <0x10001000 0x50>;
  36. interrupt-controller;
  37. #interrupt-cells = <1>;
  38. interrupt-parent = <&cpuintc>;
  39. interrupts = <2>;
  40. };
  41. ext: ext {
  42. compatible = "fixed-clock";
  43. #clock-cells = <0>;
  44. };
  45. rtc: rtc {
  46. compatible = "fixed-clock";
  47. #clock-cells = <0>;
  48. clock-frequency = <32768>;
  49. };
  50. cgu: jz4780-cgu@10000000 {
  51. compatible = "ingenic,jz4780-cgu", "simple-mfd";
  52. reg = <0x10000000 0x100>;
  53. #address-cells = <1>;
  54. #size-cells = <1>;
  55. ranges = <0x0 0x10000000 0x100>;
  56. #clock-cells = <1>;
  57. clocks = <&ext>, <&rtc>;
  58. clock-names = "ext", "rtc";
  59. otg_phy: usb-phy@3c {
  60. compatible = "ingenic,jz4780-phy";
  61. reg = <0x3c 0x10>;
  62. clocks = <&cgu JZ4780_CLK_OTG1>;
  63. #phy-cells = <0>;
  64. status = "disabled";
  65. };
  66. rng: rng@d8 {
  67. compatible = "ingenic,jz4780-rng";
  68. reg = <0xd8 0x8>;
  69. status = "disabled";
  70. };
  71. };
  72. tcu: timer@10002000 {
  73. compatible = "ingenic,jz4780-tcu",
  74. "ingenic,jz4770-tcu",
  75. "simple-mfd";
  76. reg = <0x10002000 0x1000>;
  77. #address-cells = <1>;
  78. #size-cells = <1>;
  79. ranges = <0x0 0x10002000 0x1000>;
  80. #clock-cells = <1>;
  81. clocks = <&cgu JZ4780_CLK_RTCLK>,
  82. <&cgu JZ4780_CLK_EXCLK>,
  83. <&cgu JZ4780_CLK_PCLK>;
  84. clock-names = "rtc", "ext", "pclk";
  85. interrupt-controller;
  86. #interrupt-cells = <1>;
  87. interrupt-parent = <&intc>;
  88. interrupts = <27 26 25>;
  89. watchdog: watchdog@0 {
  90. compatible = "ingenic,jz4780-watchdog";
  91. reg = <0x0 0xc>;
  92. clocks = <&tcu TCU_CLK_WDT>;
  93. clock-names = "wdt";
  94. };
  95. pwm: pwm@40 {
  96. compatible = "ingenic,jz4780-pwm", "ingenic,jz4740-pwm";
  97. reg = <0x40 0x80>;
  98. #pwm-cells = <3>;
  99. clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>,
  100. <&tcu TCU_CLK_TIMER2>, <&tcu TCU_CLK_TIMER3>,
  101. <&tcu TCU_CLK_TIMER4>, <&tcu TCU_CLK_TIMER5>,
  102. <&tcu TCU_CLK_TIMER6>, <&tcu TCU_CLK_TIMER7>;
  103. clock-names = "timer0", "timer1", "timer2", "timer3",
  104. "timer4", "timer5", "timer6", "timer7";
  105. };
  106. ost: timer@e0 {
  107. compatible = "ingenic,jz4780-ost", "ingenic,jz4770-ost";
  108. reg = <0xe0 0x20>;
  109. clocks = <&tcu TCU_CLK_OST>;
  110. clock-names = "ost";
  111. interrupts = <15>;
  112. };
  113. };
  114. rtc_dev: rtc@10003000 {
  115. compatible = "ingenic,jz4780-rtc";
  116. reg = <0x10003000 0x4c>;
  117. interrupt-parent = <&intc>;
  118. interrupts = <32>;
  119. clocks = <&cgu JZ4780_CLK_RTCLK>;
  120. clock-names = "rtc";
  121. };
  122. pinctrl: pin-controller@10010000 {
  123. compatible = "ingenic,jz4780-pinctrl";
  124. reg = <0x10010000 0x600>;
  125. #address-cells = <1>;
  126. #size-cells = <0>;
  127. gpa: gpio@0 {
  128. compatible = "ingenic,jz4780-gpio";
  129. reg = <0>;
  130. gpio-controller;
  131. gpio-ranges = <&pinctrl 0 0 32>;
  132. #gpio-cells = <2>;
  133. interrupt-controller;
  134. #interrupt-cells = <2>;
  135. interrupt-parent = <&intc>;
  136. interrupts = <17>;
  137. };
  138. gpb: gpio@1 {
  139. compatible = "ingenic,jz4780-gpio";
  140. reg = <1>;
  141. gpio-controller;
  142. gpio-ranges = <&pinctrl 0 32 32>;
  143. #gpio-cells = <2>;
  144. interrupt-controller;
  145. #interrupt-cells = <2>;
  146. interrupt-parent = <&intc>;
  147. interrupts = <16>;
  148. };
  149. gpc: gpio@2 {
  150. compatible = "ingenic,jz4780-gpio";
  151. reg = <2>;
  152. gpio-controller;
  153. gpio-ranges = <&pinctrl 0 64 32>;
  154. #gpio-cells = <2>;
  155. interrupt-controller;
  156. #interrupt-cells = <2>;
  157. interrupt-parent = <&intc>;
  158. interrupts = <15>;
  159. };
  160. gpd: gpio@3 {
  161. compatible = "ingenic,jz4780-gpio";
  162. reg = <3>;
  163. gpio-controller;
  164. gpio-ranges = <&pinctrl 0 96 32>;
  165. #gpio-cells = <2>;
  166. interrupt-controller;
  167. #interrupt-cells = <2>;
  168. interrupt-parent = <&intc>;
  169. interrupts = <14>;
  170. };
  171. gpe: gpio@4 {
  172. compatible = "ingenic,jz4780-gpio";
  173. reg = <4>;
  174. gpio-controller;
  175. gpio-ranges = <&pinctrl 0 128 32>;
  176. #gpio-cells = <2>;
  177. interrupt-controller;
  178. #interrupt-cells = <2>;
  179. interrupt-parent = <&intc>;
  180. interrupts = <13>;
  181. };
  182. gpf: gpio@5 {
  183. compatible = "ingenic,jz4780-gpio";
  184. reg = <5>;
  185. gpio-controller;
  186. gpio-ranges = <&pinctrl 0 160 32>;
  187. #gpio-cells = <2>;
  188. interrupt-controller;
  189. #interrupt-cells = <2>;
  190. interrupt-parent = <&intc>;
  191. interrupts = <12>;
  192. };
  193. };
  194. spi0: spi@10043000 {
  195. compatible = "ingenic,jz4780-spi";
  196. reg = <0x10043000 0x1c>;
  197. #address-cells = <1>;
  198. #size-cells = <0>;
  199. interrupt-parent = <&intc>;
  200. interrupts = <8>;
  201. clocks = <&cgu JZ4780_CLK_SSI0>;
  202. clock-names = "spi";
  203. dmas = <&dma JZ4780_DMA_SSI0_RX 0xffffffff>,
  204. <&dma JZ4780_DMA_SSI0_TX 0xffffffff>;
  205. dma-names = "rx", "tx";
  206. status = "disabled";
  207. };
  208. uart0: serial@10030000 {
  209. compatible = "ingenic,jz4780-uart";
  210. reg = <0x10030000 0x100>;
  211. interrupt-parent = <&intc>;
  212. interrupts = <51>;
  213. clocks = <&ext>, <&cgu JZ4780_CLK_UART0>;
  214. clock-names = "baud", "module";
  215. status = "disabled";
  216. };
  217. uart1: serial@10031000 {
  218. compatible = "ingenic,jz4780-uart";
  219. reg = <0x10031000 0x100>;
  220. interrupt-parent = <&intc>;
  221. interrupts = <50>;
  222. clocks = <&ext>, <&cgu JZ4780_CLK_UART1>;
  223. clock-names = "baud", "module";
  224. status = "disabled";
  225. };
  226. uart2: serial@10032000 {
  227. compatible = "ingenic,jz4780-uart";
  228. reg = <0x10032000 0x100>;
  229. interrupt-parent = <&intc>;
  230. interrupts = <49>;
  231. clocks = <&ext>, <&cgu JZ4780_CLK_UART2>;
  232. clock-names = "baud", "module";
  233. status = "disabled";
  234. };
  235. uart3: serial@10033000 {
  236. compatible = "ingenic,jz4780-uart";
  237. reg = <0x10033000 0x100>;
  238. interrupt-parent = <&intc>;
  239. interrupts = <48>;
  240. clocks = <&ext>, <&cgu JZ4780_CLK_UART3>;
  241. clock-names = "baud", "module";
  242. status = "disabled";
  243. };
  244. uart4: serial@10034000 {
  245. compatible = "ingenic,jz4780-uart";
  246. reg = <0x10034000 0x100>;
  247. interrupt-parent = <&intc>;
  248. interrupts = <34>;
  249. clocks = <&ext>, <&cgu JZ4780_CLK_UART4>;
  250. clock-names = "baud", "module";
  251. status = "disabled";
  252. };
  253. spi1: spi@10044000 {
  254. compatible = "ingenic,jz4780-spi";
  255. reg = <0x10044000 0x1c>;
  256. #address-cells = <1>;
  257. #size-sells = <0>;
  258. interrupt-parent = <&intc>;
  259. interrupts = <7>;
  260. clocks = <&cgu JZ4780_CLK_SSI1>;
  261. clock-names = "spi";
  262. dmas = <&dma JZ4780_DMA_SSI1_RX 0xffffffff>,
  263. <&dma JZ4780_DMA_SSI1_TX 0xffffffff>;
  264. dma-names = "rx", "tx";
  265. status = "disabled";
  266. };
  267. i2c0: i2c@10050000 {
  268. compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c";
  269. #address-cells = <1>;
  270. #size-cells = <0>;
  271. reg = <0x10050000 0x1000>;
  272. interrupt-parent = <&intc>;
  273. interrupts = <60>;
  274. clocks = <&cgu JZ4780_CLK_SMB0>;
  275. clock-frequency = <100000>;
  276. pinctrl-names = "default";
  277. pinctrl-0 = <&pins_i2c0_data>;
  278. status = "disabled";
  279. };
  280. i2c1: i2c@10051000 {
  281. compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c";
  282. #address-cells = <1>;
  283. #size-cells = <0>;
  284. reg = <0x10051000 0x1000>;
  285. interrupt-parent = <&intc>;
  286. interrupts = <59>;
  287. clocks = <&cgu JZ4780_CLK_SMB1>;
  288. clock-frequency = <100000>;
  289. pinctrl-names = "default";
  290. pinctrl-0 = <&pins_i2c1_data>;
  291. status = "disabled";
  292. };
  293. i2c2: i2c@10052000 {
  294. compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c";
  295. #address-cells = <1>;
  296. #size-cells = <0>;
  297. reg = <0x10052000 0x1000>;
  298. interrupt-parent = <&intc>;
  299. interrupts = <58>;
  300. clocks = <&cgu JZ4780_CLK_SMB2>;
  301. clock-frequency = <100000>;
  302. pinctrl-names = "default";
  303. pinctrl-0 = <&pins_i2c2_data>;
  304. status = "disabled";
  305. };
  306. i2c3: i2c@10053000 {
  307. compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c";
  308. #address-cells = <1>;
  309. #size-cells = <0>;
  310. reg = <0x10053000 0x1000>;
  311. interrupt-parent = <&intc>;
  312. interrupts = <57>;
  313. clocks = <&cgu JZ4780_CLK_SMB3>;
  314. clock-frequency = <100000>;
  315. pinctrl-names = "default";
  316. pinctrl-0 = <&pins_i2c3_data>;
  317. status = "disabled";
  318. };
  319. i2c4: i2c@10054000 {
  320. compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c";
  321. #address-cells = <1>;
  322. #size-cells = <0>;
  323. reg = <0x10054000 0x1000>;
  324. interrupt-parent = <&intc>;
  325. interrupts = <56>;
  326. clocks = <&cgu JZ4780_CLK_SMB4>;
  327. clock-frequency = <100000>;
  328. pinctrl-names = "default";
  329. pinctrl-0 = <&pins_i2c4_data>;
  330. status = "disabled";
  331. };
  332. hdmi: hdmi@10180000 {
  333. compatible = "ingenic,jz4780-dw-hdmi";
  334. reg = <0x10180000 0x8000>;
  335. reg-io-width = <4>;
  336. clocks = <&cgu JZ4780_CLK_AHB0>, <&cgu JZ4780_CLK_HDMI>;
  337. clock-names = "iahb", "isfr";
  338. interrupt-parent = <&intc>;
  339. interrupts = <3>;
  340. status = "disabled";
  341. };
  342. lcdc0: lcdc0@13050000 {
  343. compatible = "ingenic,jz4780-lcd";
  344. reg = <0x13050000 0x1800>;
  345. clocks = <&cgu JZ4780_CLK_TVE>, <&cgu JZ4780_CLK_LCD0PIXCLK>;
  346. clock-names = "lcd", "lcd_pclk";
  347. interrupt-parent = <&intc>;
  348. interrupts = <31>;
  349. status = "disabled";
  350. };
  351. lcdc1: lcdc1@130a0000 {
  352. compatible = "ingenic,jz4780-lcd";
  353. reg = <0x130a0000 0x1800>;
  354. clocks = <&cgu JZ4780_CLK_TVE>, <&cgu JZ4780_CLK_LCD1PIXCLK>;
  355. clock-names = "lcd", "lcd_pclk";
  356. interrupt-parent = <&intc>;
  357. interrupts = <23>;
  358. status = "disabled";
  359. };
  360. nemc: nemc@13410000 {
  361. compatible = "ingenic,jz4780-nemc", "simple-mfd";
  362. reg = <0x13410000 0x10000>;
  363. #address-cells = <2>;
  364. #size-cells = <1>;
  365. ranges = <0 0 0x13410000 0x10000>,
  366. <1 0 0x1b000000 0x1000000>,
  367. <2 0 0x1a000000 0x1000000>,
  368. <3 0 0x19000000 0x1000000>,
  369. <4 0 0x18000000 0x1000000>,
  370. <5 0 0x17000000 0x1000000>,
  371. <6 0 0x16000000 0x1000000>;
  372. clocks = <&cgu JZ4780_CLK_NEMC>;
  373. status = "disabled";
  374. efuse: efuse@d0 {
  375. reg = <0 0xd0 0x30>;
  376. compatible = "ingenic,jz4780-efuse";
  377. clocks = <&cgu JZ4780_CLK_AHB2>;
  378. #address-cells = <1>;
  379. #size-cells = <1>;
  380. eth0_addr: eth-mac-addr@22 {
  381. reg = <0x22 0x6>;
  382. };
  383. };
  384. };
  385. dma: dma@13420000 {
  386. compatible = "ingenic,jz4780-dma";
  387. reg = <0x13420000 0x400>, <0x13421000 0x40>;
  388. #dma-cells = <2>;
  389. interrupt-parent = <&intc>;
  390. interrupts = <10>;
  391. clocks = <&cgu JZ4780_CLK_PDMA>;
  392. };
  393. mmc0: mmc@13450000 {
  394. compatible = "ingenic,jz4780-mmc";
  395. reg = <0x13450000 0x1000>;
  396. interrupt-parent = <&intc>;
  397. interrupts = <37>;
  398. clocks = <&cgu JZ4780_CLK_MSC0>;
  399. clock-names = "mmc";
  400. cap-sd-highspeed;
  401. cap-mmc-highspeed;
  402. cap-sdio-irq;
  403. dmas = <&dma JZ4780_DMA_MSC0_RX 0xffffffff>,
  404. <&dma JZ4780_DMA_MSC0_TX 0xffffffff>;
  405. dma-names = "rx", "tx";
  406. status = "disabled";
  407. };
  408. mmc1: mmc@13460000 {
  409. compatible = "ingenic,jz4780-mmc";
  410. reg = <0x13460000 0x1000>;
  411. interrupt-parent = <&intc>;
  412. interrupts = <36>;
  413. clocks = <&cgu JZ4780_CLK_MSC1>;
  414. clock-names = "mmc";
  415. cap-sd-highspeed;
  416. cap-mmc-highspeed;
  417. cap-sdio-irq;
  418. dmas = <&dma JZ4780_DMA_MSC1_RX 0xffffffff>,
  419. <&dma JZ4780_DMA_MSC1_TX 0xffffffff>;
  420. dma-names = "rx", "tx";
  421. status = "disabled";
  422. };
  423. bch: bch@134d0000 {
  424. compatible = "ingenic,jz4780-bch";
  425. reg = <0x134d0000 0x10000>;
  426. clocks = <&cgu JZ4780_CLK_BCH>;
  427. status = "disabled";
  428. };
  429. otg: usb@13500000 {
  430. compatible = "ingenic,jz4780-otg";
  431. reg = <0x13500000 0x40000>;
  432. interrupt-parent = <&intc>;
  433. interrupts = <21>;
  434. clocks = <&cgu JZ4780_CLK_UHC>;
  435. clock-names = "otg";
  436. phys = <&otg_phy>;
  437. phy-names = "usb2-phy";
  438. g-rx-fifo-size = <768>;
  439. g-np-tx-fifo-size = <256>;
  440. g-tx-fifo-size = <256 256 256 256 256 256 256 512>;
  441. status = "disabled";
  442. };
  443. };