jz4770.dtsi 9.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. #include <dt-bindings/clock/ingenic,jz4770-cgu.h>
  3. #include <dt-bindings/clock/ingenic,tcu.h>
  4. / {
  5. #address-cells = <1>;
  6. #size-cells = <1>;
  7. compatible = "ingenic,jz4770";
  8. cpus {
  9. #address-cells = <1>;
  10. #size-cells = <0>;
  11. cpu0: cpu@0 {
  12. device_type = "cpu";
  13. compatible = "ingenic,xburst-fpu1.0-mxu1.1";
  14. reg = <0>;
  15. clocks = <&cgu JZ4770_CLK_CCLK>;
  16. clock-names = "cpu";
  17. };
  18. };
  19. cpuintc: interrupt-controller {
  20. #address-cells = <0>;
  21. #interrupt-cells = <1>;
  22. interrupt-controller;
  23. compatible = "mti,cpu-interrupt-controller";
  24. };
  25. intc: interrupt-controller@10001000 {
  26. compatible = "ingenic,jz4770-intc";
  27. reg = <0x10001000 0x40>;
  28. interrupt-controller;
  29. #interrupt-cells = <1>;
  30. interrupt-parent = <&cpuintc>;
  31. interrupts = <2>;
  32. };
  33. ext: ext {
  34. compatible = "fixed-clock";
  35. #clock-cells = <0>;
  36. };
  37. osc32k: osc32k {
  38. compatible = "fixed-clock";
  39. #clock-cells = <0>;
  40. clock-frequency = <32768>;
  41. };
  42. cgu: jz4770-cgu@10000000 {
  43. compatible = "ingenic,jz4770-cgu", "simple-mfd";
  44. reg = <0x10000000 0x100>;
  45. #address-cells = <1>;
  46. #size-cells = <1>;
  47. ranges = <0x0 0x10000000 0x100>;
  48. clocks = <&ext>, <&osc32k>;
  49. clock-names = "ext", "osc32k";
  50. #clock-cells = <1>;
  51. otg_phy: usb-phy@3c {
  52. compatible = "ingenic,jz4770-phy";
  53. reg = <0x3c 0x10>;
  54. clocks = <&cgu JZ4770_CLK_OTG_PHY>;
  55. #phy-cells = <0>;
  56. };
  57. };
  58. tcu: timer@10002000 {
  59. compatible = "ingenic,jz4770-tcu", "simple-mfd";
  60. reg = <0x10002000 0x1000>;
  61. #address-cells = <1>;
  62. #size-cells = <1>;
  63. ranges = <0x0 0x10002000 0x1000>;
  64. #clock-cells = <1>;
  65. clocks = <&cgu JZ4770_CLK_RTC>,
  66. <&cgu JZ4770_CLK_EXT>,
  67. <&cgu JZ4770_CLK_PCLK>;
  68. clock-names = "rtc", "ext", "pclk";
  69. interrupt-controller;
  70. #interrupt-cells = <1>;
  71. interrupt-parent = <&intc>;
  72. interrupts = <27 26 25>;
  73. watchdog: watchdog@0 {
  74. compatible = "ingenic,jz4770-watchdog",
  75. "ingenic,jz4740-watchdog";
  76. reg = <0x0 0xc>;
  77. clocks = <&tcu TCU_CLK_WDT>;
  78. clock-names = "wdt";
  79. };
  80. pwm: pwm@40 {
  81. compatible = "ingenic,jz4770-pwm", "ingenic,jz4740-pwm";
  82. reg = <0x40 0x80>;
  83. #pwm-cells = <3>;
  84. clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>,
  85. <&tcu TCU_CLK_TIMER2>, <&tcu TCU_CLK_TIMER3>,
  86. <&tcu TCU_CLK_TIMER4>, <&tcu TCU_CLK_TIMER5>,
  87. <&tcu TCU_CLK_TIMER6>, <&tcu TCU_CLK_TIMER7>;
  88. clock-names = "timer0", "timer1", "timer2", "timer3",
  89. "timer4", "timer5", "timer6", "timer7";
  90. };
  91. ost: timer@e0 {
  92. compatible = "ingenic,jz4770-ost";
  93. reg = <0xe0 0x20>;
  94. clocks = <&tcu TCU_CLK_OST>;
  95. clock-names = "ost";
  96. interrupts = <15>;
  97. };
  98. };
  99. rtc: rtc@10003000 {
  100. compatible = "ingenic,jz4770-rtc", "ingenic,jz4760-rtc";
  101. reg = <0x10003000 0x40>;
  102. interrupt-parent = <&intc>;
  103. interrupts = <32>;
  104. };
  105. pinctrl: pin-controller@10010000 {
  106. compatible = "ingenic,jz4770-pinctrl";
  107. reg = <0x10010000 0x600>;
  108. #address-cells = <1>;
  109. #size-cells = <0>;
  110. gpa: gpio@0 {
  111. compatible = "ingenic,jz4770-gpio";
  112. reg = <0>;
  113. gpio-controller;
  114. gpio-ranges = <&pinctrl 0 0 32>;
  115. #gpio-cells = <2>;
  116. interrupt-controller;
  117. #interrupt-cells = <2>;
  118. interrupt-parent = <&intc>;
  119. interrupts = <17>;
  120. };
  121. gpb: gpio@1 {
  122. compatible = "ingenic,jz4770-gpio";
  123. reg = <1>;
  124. gpio-controller;
  125. gpio-ranges = <&pinctrl 0 32 32>;
  126. #gpio-cells = <2>;
  127. interrupt-controller;
  128. #interrupt-cells = <2>;
  129. interrupt-parent = <&intc>;
  130. interrupts = <16>;
  131. };
  132. gpc: gpio@2 {
  133. compatible = "ingenic,jz4770-gpio";
  134. reg = <2>;
  135. gpio-controller;
  136. gpio-ranges = <&pinctrl 0 64 32>;
  137. #gpio-cells = <2>;
  138. interrupt-controller;
  139. #interrupt-cells = <2>;
  140. interrupt-parent = <&intc>;
  141. interrupts = <15>;
  142. };
  143. gpd: gpio@3 {
  144. compatible = "ingenic,jz4770-gpio";
  145. reg = <3>;
  146. gpio-controller;
  147. gpio-ranges = <&pinctrl 0 96 32>;
  148. #gpio-cells = <2>;
  149. interrupt-controller;
  150. #interrupt-cells = <2>;
  151. interrupt-parent = <&intc>;
  152. interrupts = <14>;
  153. };
  154. gpe: gpio@4 {
  155. compatible = "ingenic,jz4770-gpio";
  156. reg = <4>;
  157. gpio-controller;
  158. gpio-ranges = <&pinctrl 0 128 32>;
  159. #gpio-cells = <2>;
  160. interrupt-controller;
  161. #interrupt-cells = <2>;
  162. interrupt-parent = <&intc>;
  163. interrupts = <13>;
  164. };
  165. gpf: gpio@5 {
  166. compatible = "ingenic,jz4770-gpio";
  167. reg = <5>;
  168. gpio-controller;
  169. gpio-ranges = <&pinctrl 0 160 32>;
  170. #gpio-cells = <2>;
  171. interrupt-controller;
  172. #interrupt-cells = <2>;
  173. interrupt-parent = <&intc>;
  174. interrupts = <12>;
  175. };
  176. };
  177. aic: audio-controller@10020000 {
  178. compatible = "ingenic,jz4770-i2s";
  179. reg = <0x10020000 0x94>;
  180. #sound-dai-cells = <0>;
  181. clocks = <&cgu JZ4770_CLK_AIC>, <&cgu JZ4770_CLK_I2S>,
  182. <&cgu JZ4770_CLK_EXT>, <&cgu JZ4770_CLK_PLL0>;
  183. clock-names = "aic", "i2s", "ext", "pll half";
  184. interrupt-parent = <&intc>;
  185. interrupts = <34>;
  186. dmas = <&dmac0 25 0xffffffff>, <&dmac0 24 0xffffffff>;
  187. dma-names = "rx", "tx";
  188. };
  189. codec: audio-codec@100200a0 {
  190. compatible = "ingenic,jz4770-codec";
  191. reg = <0x100200a4 0x8>;
  192. #sound-dai-cells = <0>;
  193. clocks = <&cgu JZ4770_CLK_AIC>;
  194. clock-names = "aic";
  195. };
  196. mmc0: mmc@10021000 {
  197. compatible = "ingenic,jz4770-mmc", "ingenic,jz4760-mmc";
  198. reg = <0x10021000 0x1000>;
  199. clocks = <&cgu JZ4770_CLK_MMC0>;
  200. clock-names = "mmc";
  201. interrupt-parent = <&intc>;
  202. interrupts = <37>;
  203. dmas = <&dmac1 27 0xffffffff>, <&dmac1 26 0xffffffff>;
  204. dma-names = "rx", "tx";
  205. cap-sd-highspeed;
  206. cap-mmc-highspeed;
  207. cap-sdio-irq;
  208. status = "disabled";
  209. };
  210. mmc1: mmc@10022000 {
  211. compatible = "ingenic,jz4770-mmc", "ingenic,jz4760-mmc";
  212. reg = <0x10022000 0x1000>;
  213. clocks = <&cgu JZ4770_CLK_MMC1>;
  214. clock-names = "mmc";
  215. interrupt-parent = <&intc>;
  216. interrupts = <36>;
  217. dmas = <&dmac1 31 0xffffffff>, <&dmac1 30 0xffffffff>;
  218. dma-names = "rx", "tx";
  219. cap-sd-highspeed;
  220. cap-mmc-highspeed;
  221. cap-sdio-irq;
  222. status = "disabled";
  223. };
  224. mmc2: mmc@10023000 {
  225. compatible = "ingenic,jz4770-mmc", "ingenic,jz4760-mmc";
  226. reg = <0x10023000 0x1000>;
  227. clocks = <&cgu JZ4770_CLK_MMC2>;
  228. clock-names = "mmc";
  229. interrupt-parent = <&intc>;
  230. interrupts = <35>;
  231. dmas = <&dmac1 37 0xffffffff>, <&dmac1 36 0xffffffff>;
  232. dma-names = "rx", "tx";
  233. cap-sd-highspeed;
  234. cap-mmc-highspeed;
  235. cap-sdio-irq;
  236. status = "disabled";
  237. };
  238. uart0: serial@10030000 {
  239. compatible = "ingenic,jz4770-uart";
  240. reg = <0x10030000 0x100>;
  241. clocks = <&ext>, <&cgu JZ4770_CLK_UART0>;
  242. clock-names = "baud", "module";
  243. interrupt-parent = <&intc>;
  244. interrupts = <5>;
  245. status = "disabled";
  246. };
  247. uart1: serial@10031000 {
  248. compatible = "ingenic,jz4770-uart";
  249. reg = <0x10031000 0x100>;
  250. clocks = <&ext>, <&cgu JZ4770_CLK_UART1>;
  251. clock-names = "baud", "module";
  252. interrupt-parent = <&intc>;
  253. interrupts = <4>;
  254. status = "disabled";
  255. };
  256. uart2: serial@10032000 {
  257. compatible = "ingenic,jz4770-uart";
  258. reg = <0x10032000 0x100>;
  259. clocks = <&ext>, <&cgu JZ4770_CLK_UART2>;
  260. clock-names = "baud", "module";
  261. interrupt-parent = <&intc>;
  262. interrupts = <3>;
  263. status = "disabled";
  264. };
  265. uart3: serial@10033000 {
  266. compatible = "ingenic,jz4770-uart";
  267. reg = <0x10033000 0x100>;
  268. clocks = <&ext>, <&cgu JZ4770_CLK_UART3>;
  269. clock-names = "baud", "module";
  270. interrupt-parent = <&intc>;
  271. interrupts = <2>;
  272. status = "disabled";
  273. };
  274. adc: adc@10070000 {
  275. compatible = "ingenic,jz4770-adc";
  276. reg = <0x10070000 0x30>;
  277. #io-channel-cells = <1>;
  278. clocks = <&cgu JZ4770_CLK_ADC>;
  279. clock-names = "adc";
  280. interrupt-parent = <&intc>;
  281. interrupts = <18>;
  282. };
  283. gpu: gpu@13040000 {
  284. compatible = "vivante,gc";
  285. reg = <0x13040000 0x10000>;
  286. clocks = <&cgu JZ4770_CLK_GPU>,
  287. <&cgu JZ4770_CLK_GPU>,
  288. <&cgu JZ4770_CLK_GPU>;
  289. clock-names = "bus", "core", "shader";
  290. interrupt-parent = <&intc>;
  291. interrupts = <6>;
  292. };
  293. lcd: lcd-controller@13050000 {
  294. compatible = "ingenic,jz4770-lcd";
  295. reg = <0x13050000 0x130>; /* tbc */
  296. interrupt-parent = <&intc>;
  297. interrupts = <31>;
  298. clocks = <&cgu JZ4770_CLK_LPCLK_MUX>;
  299. clock-names = "lcd_pclk";
  300. };
  301. dmac0: dma-controller@13420000 {
  302. compatible = "ingenic,jz4770-dma";
  303. reg = <0x13420000 0xC0>, <0x13420300 0x20>;
  304. #dma-cells = <2>;
  305. clocks = <&cgu JZ4770_CLK_DMA>;
  306. interrupt-parent = <&intc>;
  307. interrupts = <24>;
  308. };
  309. dmac1: dma-controller@13420100 {
  310. compatible = "ingenic,jz4770-dma";
  311. reg = <0x13420100 0xC0>, <0x13420400 0x20>;
  312. #dma-cells = <2>;
  313. clocks = <&cgu JZ4770_CLK_DMA>;
  314. interrupt-parent = <&intc>;
  315. interrupts = <23>;
  316. };
  317. uhc: usb@13430000 {
  318. compatible = "generic-ohci";
  319. reg = <0x13430000 0x1000>;
  320. clocks = <&cgu JZ4770_CLK_UHC>, <&cgu JZ4770_CLK_UHC_PHY>;
  321. assigned-clocks = <&cgu JZ4770_CLK_UHC>;
  322. assigned-clock-rates = <48000000>;
  323. interrupt-parent = <&intc>;
  324. interrupts = <20>;
  325. status = "disabled";
  326. };
  327. usb_otg: usb@13440000 {
  328. compatible = "ingenic,jz4770-musb";
  329. reg = <0x13440000 0x10000>;
  330. clocks = <&cgu JZ4770_CLK_OTG>;
  331. clock-names = "udc";
  332. interrupt-parent = <&intc>;
  333. interrupts = <21>;
  334. interrupt-names = "mc";
  335. phys = <&otg_phy>;
  336. usb-role-switch;
  337. };
  338. rom: memory@1fc00000 {
  339. compatible = "mtd-rom";
  340. probe-type = "map_rom";
  341. reg = <0x1fc00000 0x2000>;
  342. bank-width = <4>;
  343. device-width = <1>;
  344. };
  345. };