q40_master.h 2.3 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * Q40 master Chip Control
  4. * RTC stuff merged for compactness.
  5. */
  6. #ifndef _Q40_MASTER_H
  7. #define _Q40_MASTER_H
  8. #include <asm/raw_io.h>
  9. #include <asm/kmap.h>
  10. #define q40_master_addr 0xff000000
  11. #define IIRQ_REG 0x0 /* internal IRQ reg */
  12. #define EIRQ_REG 0x4 /* external ... */
  13. #define KEYCODE_REG 0x1c /* value of received scancode */
  14. #define DISPLAY_CONTROL_REG 0x18
  15. #define FRAME_CLEAR_REG 0x24
  16. #define LED_REG 0x30
  17. #define Q40_LED_ON() master_outb(1,LED_REG)
  18. #define Q40_LED_OFF() master_outb(0,LED_REG)
  19. #define INTERRUPT_REG IIRQ_REG /* "native" ints */
  20. #define KEY_IRQ_ENABLE_REG 0x08 /**/
  21. #define KEYBOARD_UNLOCK_REG 0x20 /* clear kb int */
  22. #define SAMPLE_ENABLE_REG 0x14 /* generate SAMPLE ints */
  23. #define SAMPLE_RATE_REG 0x2c
  24. #define SAMPLE_CLEAR_REG 0x28
  25. #define SAMPLE_LOW 0x00
  26. #define SAMPLE_HIGH 0x01
  27. #define FRAME_RATE_REG 0x38 /* generate FRAME ints at 200 HZ rate */
  28. #if 0
  29. #define SER_ENABLE_REG 0x0c /* allow serial ints to be generated */
  30. #endif
  31. #define EXT_ENABLE_REG 0x10 /* ... rest of the ISA ints ... */
  32. #define master_inb(_reg_) in_8((unsigned char *)q40_master_addr+_reg_)
  33. #define master_outb(_b_,_reg_) out_8((unsigned char *)q40_master_addr+_reg_,_b_)
  34. /* RTC defines */
  35. #define Q40_RTC_BASE (0xff021ffc)
  36. #define Q40_RTC_YEAR (*(volatile unsigned char *)(Q40_RTC_BASE+0))
  37. #define Q40_RTC_MNTH (*(volatile unsigned char *)(Q40_RTC_BASE-4))
  38. #define Q40_RTC_DATE (*(volatile unsigned char *)(Q40_RTC_BASE-8))
  39. #define Q40_RTC_DOW (*(volatile unsigned char *)(Q40_RTC_BASE-12))
  40. #define Q40_RTC_HOUR (*(volatile unsigned char *)(Q40_RTC_BASE-16))
  41. #define Q40_RTC_MINS (*(volatile unsigned char *)(Q40_RTC_BASE-20))
  42. #define Q40_RTC_SECS (*(volatile unsigned char *)(Q40_RTC_BASE-24))
  43. #define Q40_RTC_CTRL (*(volatile unsigned char *)(Q40_RTC_BASE-28))
  44. /* some control bits */
  45. #define Q40_RTC_READ 64 /* prepare for reading */
  46. #define Q40_RTC_WRITE 128
  47. /* define some Q40 specific ints */
  48. #include <asm/q40ints.h>
  49. /* misc defs */
  50. #define DAC_LEFT ((unsigned char *)0xff008000)
  51. #define DAC_RIGHT ((unsigned char *)0xff008004)
  52. #endif /* _Q40_MASTER_H */