acpi.c 5.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
  4. */
  5. #include <linux/pci.h>
  6. #include <linux/acpi.h>
  7. #include <linux/init.h>
  8. #include <linux/irq.h>
  9. #include <linux/slab.h>
  10. #include <linux/pci-acpi.h>
  11. #include <linux/pci-ecam.h>
  12. #include <asm/pci.h>
  13. #include <asm/numa.h>
  14. #include <asm/loongson.h>
  15. struct pci_root_info {
  16. struct acpi_pci_root_info common;
  17. struct pci_config_window *cfg;
  18. };
  19. void pcibios_add_bus(struct pci_bus *bus)
  20. {
  21. acpi_pci_add_bus(bus);
  22. }
  23. int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge)
  24. {
  25. struct pci_config_window *cfg = bridge->bus->sysdata;
  26. struct acpi_device *adev = to_acpi_device(cfg->parent);
  27. struct device *bus_dev = &bridge->bus->dev;
  28. ACPI_COMPANION_SET(&bridge->dev, adev);
  29. set_dev_node(bus_dev, pa_to_nid(cfg->res.start));
  30. return 0;
  31. }
  32. int acpi_pci_bus_find_domain_nr(struct pci_bus *bus)
  33. {
  34. struct pci_config_window *cfg = bus->sysdata;
  35. struct acpi_device *adev = to_acpi_device(cfg->parent);
  36. struct acpi_pci_root *root = acpi_driver_data(adev);
  37. return root->segment;
  38. }
  39. static void acpi_release_root_info(struct acpi_pci_root_info *ci)
  40. {
  41. struct pci_root_info *info;
  42. info = container_of(ci, struct pci_root_info, common);
  43. pci_ecam_free(info->cfg);
  44. kfree(ci->ops);
  45. kfree(info);
  46. }
  47. static int acpi_prepare_root_resources(struct acpi_pci_root_info *ci)
  48. {
  49. int status;
  50. struct resource_entry *entry, *tmp;
  51. struct acpi_device *device = ci->bridge;
  52. status = acpi_pci_probe_root_resources(ci);
  53. if (status > 0) {
  54. resource_list_for_each_entry_safe(entry, tmp, &ci->resources) {
  55. if (entry->res->flags & IORESOURCE_MEM) {
  56. entry->offset = ci->root->mcfg_addr & GENMASK_ULL(63, 40);
  57. entry->res->start |= entry->offset;
  58. entry->res->end |= entry->offset;
  59. }
  60. }
  61. return status;
  62. }
  63. resource_list_for_each_entry_safe(entry, tmp, &ci->resources) {
  64. dev_dbg(&device->dev,
  65. "host bridge window %pR (ignored)\n", entry->res);
  66. resource_list_destroy_entry(entry);
  67. }
  68. return 0;
  69. }
  70. /*
  71. * Create a PCI config space window
  72. * - reserve mem region
  73. * - alloc struct pci_config_window with space for all mappings
  74. * - ioremap the config space
  75. */
  76. static struct pci_config_window *arch_pci_ecam_create(struct device *dev,
  77. struct resource *cfgres, struct resource *busr, const struct pci_ecam_ops *ops)
  78. {
  79. int bsz, bus_range, err;
  80. struct resource *conflict;
  81. struct pci_config_window *cfg;
  82. if (busr->start > busr->end)
  83. return ERR_PTR(-EINVAL);
  84. cfg = kzalloc(sizeof(*cfg), GFP_KERNEL);
  85. if (!cfg)
  86. return ERR_PTR(-ENOMEM);
  87. cfg->parent = dev;
  88. cfg->ops = ops;
  89. cfg->busr.start = busr->start;
  90. cfg->busr.end = busr->end;
  91. cfg->busr.flags = IORESOURCE_BUS;
  92. bus_range = resource_size(cfgres) >> ops->bus_shift;
  93. bsz = 1 << ops->bus_shift;
  94. cfg->res.start = cfgres->start;
  95. cfg->res.end = cfgres->end;
  96. cfg->res.flags = IORESOURCE_MEM | IORESOURCE_BUSY;
  97. cfg->res.name = "PCI ECAM";
  98. conflict = request_resource_conflict(&iomem_resource, &cfg->res);
  99. if (conflict) {
  100. err = -EBUSY;
  101. dev_err(dev, "can't claim ECAM area %pR: address conflict with %s %pR\n",
  102. &cfg->res, conflict->name, conflict);
  103. goto err_exit;
  104. }
  105. cfg->win = pci_remap_cfgspace(cfgres->start, bus_range * bsz);
  106. if (!cfg->win)
  107. goto err_exit_iomap;
  108. if (ops->init) {
  109. err = ops->init(cfg);
  110. if (err)
  111. goto err_exit;
  112. }
  113. dev_info(dev, "ECAM at %pR for %pR\n", &cfg->res, &cfg->busr);
  114. return cfg;
  115. err_exit_iomap:
  116. err = -ENOMEM;
  117. dev_err(dev, "ECAM ioremap failed\n");
  118. err_exit:
  119. pci_ecam_free(cfg);
  120. return ERR_PTR(err);
  121. }
  122. /*
  123. * Lookup the bus range for the domain in MCFG, and set up config space
  124. * mapping.
  125. */
  126. static struct pci_config_window *
  127. pci_acpi_setup_ecam_mapping(struct acpi_pci_root *root)
  128. {
  129. int ret, bus_shift;
  130. u16 seg = root->segment;
  131. struct device *dev = &root->device->dev;
  132. struct resource cfgres;
  133. struct resource *bus_res = &root->secondary;
  134. struct pci_config_window *cfg;
  135. const struct pci_ecam_ops *ecam_ops;
  136. ret = pci_mcfg_lookup(root, &cfgres, &ecam_ops);
  137. if (ret < 0) {
  138. dev_err(dev, "%04x:%pR ECAM region not found, use default value\n", seg, bus_res);
  139. ecam_ops = &loongson_pci_ecam_ops;
  140. root->mcfg_addr = mcfg_addr_init(0);
  141. }
  142. bus_shift = ecam_ops->bus_shift ? : 20;
  143. if (bus_shift == 20)
  144. cfg = pci_ecam_create(dev, &cfgres, bus_res, ecam_ops);
  145. else {
  146. cfgres.start = root->mcfg_addr + (bus_res->start << bus_shift);
  147. cfgres.end = cfgres.start + (resource_size(bus_res) << bus_shift) - 1;
  148. cfgres.end |= BIT(28) + (((PCI_CFG_SPACE_EXP_SIZE - 1) & 0xf00) << 16);
  149. cfgres.flags = IORESOURCE_MEM;
  150. cfg = arch_pci_ecam_create(dev, &cfgres, bus_res, ecam_ops);
  151. }
  152. if (IS_ERR(cfg)) {
  153. dev_err(dev, "%04x:%pR error %ld mapping ECAM\n", seg, bus_res, PTR_ERR(cfg));
  154. return NULL;
  155. }
  156. return cfg;
  157. }
  158. struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root)
  159. {
  160. struct pci_bus *bus;
  161. struct pci_root_info *info;
  162. struct acpi_pci_root_ops *root_ops;
  163. int domain = root->segment;
  164. int busnum = root->secondary.start;
  165. info = kzalloc(sizeof(*info), GFP_KERNEL);
  166. if (!info) {
  167. pr_warn("pci_bus %04x:%02x: ignored (out of memory)\n", domain, busnum);
  168. return NULL;
  169. }
  170. root_ops = kzalloc(sizeof(*root_ops), GFP_KERNEL);
  171. if (!root_ops) {
  172. kfree(info);
  173. return NULL;
  174. }
  175. info->cfg = pci_acpi_setup_ecam_mapping(root);
  176. if (!info->cfg) {
  177. kfree(info);
  178. kfree(root_ops);
  179. return NULL;
  180. }
  181. root_ops->release_info = acpi_release_root_info;
  182. root_ops->prepare_resources = acpi_prepare_root_resources;
  183. root_ops->pci_ops = (struct pci_ops *)&info->cfg->ops->pci_ops;
  184. bus = pci_find_bus(domain, busnum);
  185. if (bus) {
  186. memcpy(bus->sysdata, info->cfg, sizeof(struct pci_config_window));
  187. kfree(info);
  188. } else {
  189. struct pci_bus *child;
  190. bus = acpi_pci_root_create(root, root_ops,
  191. &info->common, info->cfg);
  192. if (!bus) {
  193. kfree(info);
  194. kfree(root_ops);
  195. return NULL;
  196. }
  197. pci_bus_size_bridges(bus);
  198. pci_bus_assign_resources(bus);
  199. list_for_each_entry(child, &bus->children, node)
  200. pcie_bus_configure_settings(child);
  201. }
  202. return bus;
  203. }