entry.h 2.5 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. #ifndef __ASM_CSKY_ENTRY_H
  3. #define __ASM_CSKY_ENTRY_H
  4. #include <asm/setup.h>
  5. #include <abi/regdef.h>
  6. #define LSAVE_PC 8
  7. #define LSAVE_PSR 12
  8. #define LSAVE_A0 24
  9. #define LSAVE_A1 28
  10. #define LSAVE_A2 32
  11. #define LSAVE_A3 36
  12. #define LSAVE_A4 40
  13. #define LSAVE_A5 44
  14. #define usp ss1
  15. .macro USPTOKSP
  16. mtcr sp, usp
  17. mfcr sp, ss0
  18. .endm
  19. .macro KSPTOUSP
  20. mtcr sp, ss0
  21. mfcr sp, usp
  22. .endm
  23. .macro SAVE_ALL epc_inc
  24. mtcr r13, ss2
  25. mfcr r13, epsr
  26. btsti r13, 31
  27. bt 1f
  28. USPTOKSP
  29. 1:
  30. subi sp, 32
  31. subi sp, 32
  32. subi sp, 16
  33. stw r13, (sp, 12)
  34. stw lr, (sp, 4)
  35. mfcr lr, epc
  36. movi r13, \epc_inc
  37. add lr, r13
  38. stw lr, (sp, 8)
  39. mov lr, sp
  40. addi lr, 32
  41. addi lr, 32
  42. addi lr, 16
  43. bt 2f
  44. mfcr lr, ss1
  45. 2:
  46. stw lr, (sp, 16)
  47. stw a0, (sp, 20)
  48. stw a0, (sp, 24)
  49. stw a1, (sp, 28)
  50. stw a2, (sp, 32)
  51. stw a3, (sp, 36)
  52. addi sp, 32
  53. addi sp, 8
  54. mfcr r13, ss2
  55. stw r6, (sp)
  56. stw r7, (sp, 4)
  57. stw r8, (sp, 8)
  58. stw r9, (sp, 12)
  59. stw r10, (sp, 16)
  60. stw r11, (sp, 20)
  61. stw r12, (sp, 24)
  62. stw r13, (sp, 28)
  63. stw r14, (sp, 32)
  64. stw r1, (sp, 36)
  65. subi sp, 32
  66. subi sp, 8
  67. .endm
  68. .macro RESTORE_ALL
  69. ldw lr, (sp, 4)
  70. ldw a0, (sp, 8)
  71. mtcr a0, epc
  72. ldw a0, (sp, 12)
  73. mtcr a0, epsr
  74. btsti a0, 31
  75. bt 1f
  76. ldw a0, (sp, 16)
  77. mtcr a0, ss1
  78. 1:
  79. ldw a0, (sp, 24)
  80. ldw a1, (sp, 28)
  81. ldw a2, (sp, 32)
  82. ldw a3, (sp, 36)
  83. addi sp, 32
  84. addi sp, 8
  85. ldw r6, (sp)
  86. ldw r7, (sp, 4)
  87. ldw r8, (sp, 8)
  88. ldw r9, (sp, 12)
  89. ldw r10, (sp, 16)
  90. ldw r11, (sp, 20)
  91. ldw r12, (sp, 24)
  92. ldw r13, (sp, 28)
  93. ldw r14, (sp, 32)
  94. ldw r1, (sp, 36)
  95. addi sp, 32
  96. addi sp, 8
  97. bt 2f
  98. KSPTOUSP
  99. 2:
  100. rte
  101. .endm
  102. .macro SAVE_SWITCH_STACK
  103. subi sp, 32
  104. stm r8-r15, (sp)
  105. .endm
  106. .macro RESTORE_SWITCH_STACK
  107. ldm r8-r15, (sp)
  108. addi sp, 32
  109. .endm
  110. /* MMU registers operators. */
  111. .macro RD_MIR rx
  112. cprcr \rx, cpcr0
  113. .endm
  114. .macro RD_MEH rx
  115. cprcr \rx, cpcr4
  116. .endm
  117. .macro RD_MCIR rx
  118. cprcr \rx, cpcr8
  119. .endm
  120. .macro RD_PGDR rx
  121. cprcr \rx, cpcr29
  122. .endm
  123. .macro WR_MEH rx
  124. cpwcr \rx, cpcr4
  125. .endm
  126. .macro WR_MCIR rx
  127. cpwcr \rx, cpcr8
  128. .endm
  129. .macro SETUP_MMU
  130. /* Init psr and enable ee */
  131. lrw r6, DEFAULT_PSR_VALUE
  132. mtcr r6, psr
  133. psrset ee
  134. /* Select MMU as co-processor */
  135. cpseti cp15
  136. /*
  137. * cpcr30 format:
  138. * 31 - 29 | 28 - 4 | 3 | 2 | 1 | 0
  139. * BA Reserved C D V
  140. */
  141. cprcr r6, cpcr30
  142. lsri r6, 29
  143. lsli r6, 29
  144. addi r6, 0xe
  145. cpwcr r6, cpcr30
  146. movi r6, 0
  147. cpwcr r6, cpcr31
  148. .endm
  149. #endif /* __ASM_CSKY_ENTRY_H */