perf_regs.c 2.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. #include <linux/compat.h>
  3. #include <linux/errno.h>
  4. #include <linux/kernel.h>
  5. #include <linux/perf_event.h>
  6. #include <linux/bug.h>
  7. #include <linux/sched/task_stack.h>
  8. #include <asm/perf_regs.h>
  9. #include <asm/ptrace.h>
  10. static u64 perf_ext_regs_value(int idx)
  11. {
  12. switch (idx) {
  13. case PERF_REG_ARM64_VG:
  14. if (WARN_ON_ONCE(!system_supports_sve()))
  15. return 0;
  16. /*
  17. * Vector granule is current length in bits of SVE registers
  18. * divided by 64.
  19. */
  20. return (task_get_sve_vl(current) * 8) / 64;
  21. default:
  22. WARN_ON_ONCE(true);
  23. return 0;
  24. }
  25. }
  26. u64 perf_reg_value(struct pt_regs *regs, int idx)
  27. {
  28. if (WARN_ON_ONCE((u32)idx >= PERF_REG_ARM64_EXTENDED_MAX))
  29. return 0;
  30. /*
  31. * Our handling of compat tasks (PERF_SAMPLE_REGS_ABI_32) is weird, but
  32. * we're stuck with it for ABI compatibility reasons.
  33. *
  34. * For a 32-bit consumer inspecting a 32-bit task, then it will look at
  35. * the first 16 registers (see arch/arm/include/uapi/asm/perf_regs.h).
  36. * These correspond directly to a prefix of the registers saved in our
  37. * 'struct pt_regs', with the exception of the PC, so we copy that down
  38. * (x15 corresponds to SP_hyp in the architecture).
  39. *
  40. * So far, so good.
  41. *
  42. * The oddity arises when a 64-bit consumer looks at a 32-bit task and
  43. * asks for registers beyond PERF_REG_ARM_MAX. In this case, we return
  44. * SP_usr, LR_usr and PC in the positions where the AArch64 SP, LR and
  45. * PC registers would normally live. The initial idea was to allow a
  46. * 64-bit unwinder to unwind a 32-bit task and, although it's not clear
  47. * how well that works in practice, somebody might be relying on it.
  48. *
  49. * At the time we make a sample, we don't know whether the consumer is
  50. * 32-bit or 64-bit, so we have to cater for both possibilities.
  51. */
  52. if (compat_user_mode(regs)) {
  53. if ((u32)idx == PERF_REG_ARM64_SP)
  54. return regs->compat_sp;
  55. if ((u32)idx == PERF_REG_ARM64_LR)
  56. return regs->compat_lr;
  57. if (idx == 15)
  58. return regs->pc;
  59. }
  60. if ((u32)idx == PERF_REG_ARM64_SP)
  61. return regs->sp;
  62. if ((u32)idx == PERF_REG_ARM64_PC)
  63. return regs->pc;
  64. if ((u32)idx >= PERF_REG_ARM64_MAX)
  65. return perf_ext_regs_value(idx);
  66. return regs->regs[idx];
  67. }
  68. #define REG_RESERVED (~((1ULL << PERF_REG_ARM64_MAX) - 1))
  69. int perf_reg_validate(u64 mask)
  70. {
  71. u64 reserved_mask = REG_RESERVED;
  72. if (system_supports_sve())
  73. reserved_mask &= ~(1ULL << PERF_REG_ARM64_VG);
  74. if (!mask || mask & reserved_mask)
  75. return -EINVAL;
  76. return 0;
  77. }
  78. u64 perf_reg_abi(struct task_struct *task)
  79. {
  80. if (is_compat_thread(task_thread_info(task)))
  81. return PERF_SAMPLE_REGS_ABI_32;
  82. else
  83. return PERF_SAMPLE_REGS_ABI_64;
  84. }
  85. void perf_get_regs_user(struct perf_regs *regs_user,
  86. struct pt_regs *regs)
  87. {
  88. regs_user->regs = task_pt_regs(current);
  89. regs_user->abi = perf_reg_abi(current);
  90. }