asm-offsets.c 8.7 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Based on arch/arm/kernel/asm-offsets.c
  4. *
  5. * Copyright (C) 1995-2003 Russell King
  6. * 2001-2002 Keith Owens
  7. * Copyright (C) 2012 ARM Ltd.
  8. */
  9. #include <linux/arm_sdei.h>
  10. #include <linux/sched.h>
  11. #include <linux/kexec.h>
  12. #include <linux/mm.h>
  13. #include <linux/dma-mapping.h>
  14. #include <linux/kvm_host.h>
  15. #include <linux/preempt.h>
  16. #include <linux/suspend.h>
  17. #include <asm/cpufeature.h>
  18. #include <asm/fixmap.h>
  19. #include <asm/thread_info.h>
  20. #include <asm/memory.h>
  21. #include <asm/signal32.h>
  22. #include <asm/smp_plat.h>
  23. #include <asm/suspend.h>
  24. #include <linux/kbuild.h>
  25. #include <linux/arm-smccc.h>
  26. int main(void)
  27. {
  28. DEFINE(TSK_ACTIVE_MM, offsetof(struct task_struct, active_mm));
  29. BLANK();
  30. DEFINE(TSK_TI_CPU, offsetof(struct task_struct, thread_info.cpu));
  31. DEFINE(TSK_TI_FLAGS, offsetof(struct task_struct, thread_info.flags));
  32. DEFINE(TSK_TI_PREEMPT, offsetof(struct task_struct, thread_info.preempt_count));
  33. #ifdef CONFIG_ARM64_SW_TTBR0_PAN
  34. DEFINE(TSK_TI_TTBR0, offsetof(struct task_struct, thread_info.ttbr0));
  35. #endif
  36. #ifdef CONFIG_SHADOW_CALL_STACK
  37. DEFINE(TSK_TI_SCS_BASE, offsetof(struct task_struct, thread_info.scs_base));
  38. DEFINE(TSK_TI_SCS_SP, offsetof(struct task_struct, thread_info.scs_sp));
  39. #endif
  40. DEFINE(TSK_STACK, offsetof(struct task_struct, stack));
  41. #ifdef CONFIG_STACKPROTECTOR
  42. DEFINE(TSK_STACK_CANARY, offsetof(struct task_struct, stack_canary));
  43. #endif
  44. BLANK();
  45. DEFINE(THREAD_CPU_CONTEXT, offsetof(struct task_struct, thread.cpu_context));
  46. DEFINE(THREAD_SCTLR_USER, offsetof(struct task_struct, thread.sctlr_user));
  47. #ifdef CONFIG_ARM64_PTR_AUTH
  48. DEFINE(THREAD_KEYS_USER, offsetof(struct task_struct, thread.keys_user));
  49. #endif
  50. #ifdef CONFIG_ARM64_PTR_AUTH_KERNEL
  51. DEFINE(THREAD_KEYS_KERNEL, offsetof(struct task_struct, thread.keys_kernel));
  52. #endif
  53. #ifdef CONFIG_ARM64_MTE
  54. DEFINE(THREAD_MTE_CTRL, offsetof(struct task_struct, thread.mte_ctrl));
  55. #endif
  56. BLANK();
  57. DEFINE(S_X0, offsetof(struct pt_regs, regs[0]));
  58. DEFINE(S_X2, offsetof(struct pt_regs, regs[2]));
  59. DEFINE(S_X4, offsetof(struct pt_regs, regs[4]));
  60. DEFINE(S_X6, offsetof(struct pt_regs, regs[6]));
  61. DEFINE(S_X8, offsetof(struct pt_regs, regs[8]));
  62. DEFINE(S_X10, offsetof(struct pt_regs, regs[10]));
  63. DEFINE(S_X12, offsetof(struct pt_regs, regs[12]));
  64. DEFINE(S_X14, offsetof(struct pt_regs, regs[14]));
  65. DEFINE(S_X16, offsetof(struct pt_regs, regs[16]));
  66. DEFINE(S_X18, offsetof(struct pt_regs, regs[18]));
  67. DEFINE(S_X20, offsetof(struct pt_regs, regs[20]));
  68. DEFINE(S_X22, offsetof(struct pt_regs, regs[22]));
  69. DEFINE(S_X24, offsetof(struct pt_regs, regs[24]));
  70. DEFINE(S_X26, offsetof(struct pt_regs, regs[26]));
  71. DEFINE(S_X28, offsetof(struct pt_regs, regs[28]));
  72. DEFINE(S_FP, offsetof(struct pt_regs, regs[29]));
  73. DEFINE(S_LR, offsetof(struct pt_regs, regs[30]));
  74. DEFINE(S_SP, offsetof(struct pt_regs, sp));
  75. DEFINE(S_PSTATE, offsetof(struct pt_regs, pstate));
  76. DEFINE(S_PC, offsetof(struct pt_regs, pc));
  77. DEFINE(S_SYSCALLNO, offsetof(struct pt_regs, syscallno));
  78. DEFINE(S_SDEI_TTBR1, offsetof(struct pt_regs, sdei_ttbr1));
  79. DEFINE(S_PMR_SAVE, offsetof(struct pt_regs, pmr_save));
  80. DEFINE(S_STACKFRAME, offsetof(struct pt_regs, stackframe));
  81. DEFINE(PT_REGS_SIZE, sizeof(struct pt_regs));
  82. BLANK();
  83. #ifdef CONFIG_COMPAT
  84. DEFINE(COMPAT_SIGFRAME_REGS_OFFSET, offsetof(struct compat_sigframe, uc.uc_mcontext.arm_r0));
  85. DEFINE(COMPAT_RT_SIGFRAME_REGS_OFFSET, offsetof(struct compat_rt_sigframe, sig.uc.uc_mcontext.arm_r0));
  86. BLANK();
  87. #endif
  88. DEFINE(MM_CONTEXT_ID, offsetof(struct mm_struct, context.id.counter));
  89. BLANK();
  90. DEFINE(VMA_VM_MM, offsetof(struct vm_area_struct, vm_mm));
  91. DEFINE(VMA_VM_FLAGS, offsetof(struct vm_area_struct, vm_flags));
  92. BLANK();
  93. DEFINE(VM_EXEC, VM_EXEC);
  94. BLANK();
  95. DEFINE(PAGE_SZ, PAGE_SIZE);
  96. BLANK();
  97. DEFINE(DMA_TO_DEVICE, DMA_TO_DEVICE);
  98. DEFINE(DMA_FROM_DEVICE, DMA_FROM_DEVICE);
  99. BLANK();
  100. DEFINE(PREEMPT_DISABLE_OFFSET, PREEMPT_DISABLE_OFFSET);
  101. DEFINE(SOFTIRQ_SHIFT, SOFTIRQ_SHIFT);
  102. DEFINE(IRQ_CPUSTAT_SOFTIRQ_PENDING, offsetof(irq_cpustat_t, __softirq_pending));
  103. BLANK();
  104. DEFINE(CPU_BOOT_TASK, offsetof(struct secondary_data, task));
  105. BLANK();
  106. DEFINE(FTR_OVR_VAL_OFFSET, offsetof(struct arm64_ftr_override, val));
  107. DEFINE(FTR_OVR_MASK_OFFSET, offsetof(struct arm64_ftr_override, mask));
  108. BLANK();
  109. #ifdef CONFIG_KVM
  110. DEFINE(VCPU_CONTEXT, offsetof(struct kvm_vcpu, arch.ctxt));
  111. DEFINE(VCPU_FAULT_DISR, offsetof(struct kvm_vcpu, arch.fault.disr_el1));
  112. DEFINE(VCPU_HCR_EL2, offsetof(struct kvm_vcpu, arch.hcr_el2));
  113. DEFINE(CPU_USER_PT_REGS, offsetof(struct kvm_cpu_context, regs));
  114. DEFINE(CPU_RGSR_EL1, offsetof(struct kvm_cpu_context, sys_regs[RGSR_EL1]));
  115. DEFINE(CPU_GCR_EL1, offsetof(struct kvm_cpu_context, sys_regs[GCR_EL1]));
  116. DEFINE(CPU_APIAKEYLO_EL1, offsetof(struct kvm_cpu_context, sys_regs[APIAKEYLO_EL1]));
  117. DEFINE(CPU_APIBKEYLO_EL1, offsetof(struct kvm_cpu_context, sys_regs[APIBKEYLO_EL1]));
  118. DEFINE(CPU_APDAKEYLO_EL1, offsetof(struct kvm_cpu_context, sys_regs[APDAKEYLO_EL1]));
  119. DEFINE(CPU_APDBKEYLO_EL1, offsetof(struct kvm_cpu_context, sys_regs[APDBKEYLO_EL1]));
  120. DEFINE(CPU_APGAKEYLO_EL1, offsetof(struct kvm_cpu_context, sys_regs[APGAKEYLO_EL1]));
  121. DEFINE(HOST_CONTEXT_VCPU, offsetof(struct kvm_cpu_context, __hyp_running_vcpu));
  122. DEFINE(HOST_DATA_CONTEXT, offsetof(struct kvm_host_data, host_ctxt));
  123. DEFINE(NVHE_INIT_MAIR_EL2, offsetof(struct kvm_nvhe_init_params, mair_el2));
  124. DEFINE(NVHE_INIT_TCR_EL2, offsetof(struct kvm_nvhe_init_params, tcr_el2));
  125. DEFINE(NVHE_INIT_TPIDR_EL2, offsetof(struct kvm_nvhe_init_params, tpidr_el2));
  126. DEFINE(NVHE_INIT_STACK_HYP_VA, offsetof(struct kvm_nvhe_init_params, stack_hyp_va));
  127. DEFINE(NVHE_INIT_PGD_PA, offsetof(struct kvm_nvhe_init_params, pgd_pa));
  128. DEFINE(NVHE_INIT_HCR_EL2, offsetof(struct kvm_nvhe_init_params, hcr_el2));
  129. DEFINE(NVHE_INIT_HFGWTR_EL2, offsetof(struct kvm_nvhe_init_params, hfgwtr_el2));
  130. DEFINE(NVHE_INIT_VTTBR, offsetof(struct kvm_nvhe_init_params, vttbr));
  131. DEFINE(NVHE_INIT_VTCR, offsetof(struct kvm_nvhe_init_params, vtcr));
  132. #endif
  133. #ifdef CONFIG_CPU_PM
  134. DEFINE(CPU_CTX_SP, offsetof(struct cpu_suspend_ctx, sp));
  135. DEFINE(MPIDR_HASH_MASK, offsetof(struct mpidr_hash, mask));
  136. DEFINE(MPIDR_HASH_SHIFTS, offsetof(struct mpidr_hash, shift_aff));
  137. DEFINE(SLEEP_STACK_DATA_SYSTEM_REGS, offsetof(struct sleep_stack_data, system_regs));
  138. DEFINE(SLEEP_STACK_DATA_CALLEE_REGS, offsetof(struct sleep_stack_data, callee_saved_regs));
  139. #endif
  140. DEFINE(ARM_SMCCC_RES_X0_OFFS, offsetof(struct arm_smccc_res, a0));
  141. DEFINE(ARM_SMCCC_RES_X2_OFFS, offsetof(struct arm_smccc_res, a2));
  142. DEFINE(ARM_SMCCC_QUIRK_ID_OFFS, offsetof(struct arm_smccc_quirk, id));
  143. DEFINE(ARM_SMCCC_QUIRK_STATE_OFFS, offsetof(struct arm_smccc_quirk, state));
  144. DEFINE(ARM_SMCCC_1_2_REGS_X0_OFFS, offsetof(struct arm_smccc_1_2_regs, a0));
  145. DEFINE(ARM_SMCCC_1_2_REGS_X2_OFFS, offsetof(struct arm_smccc_1_2_regs, a2));
  146. DEFINE(ARM_SMCCC_1_2_REGS_X4_OFFS, offsetof(struct arm_smccc_1_2_regs, a4));
  147. DEFINE(ARM_SMCCC_1_2_REGS_X6_OFFS, offsetof(struct arm_smccc_1_2_regs, a6));
  148. DEFINE(ARM_SMCCC_1_2_REGS_X8_OFFS, offsetof(struct arm_smccc_1_2_regs, a8));
  149. DEFINE(ARM_SMCCC_1_2_REGS_X10_OFFS, offsetof(struct arm_smccc_1_2_regs, a10));
  150. DEFINE(ARM_SMCCC_1_2_REGS_X12_OFFS, offsetof(struct arm_smccc_1_2_regs, a12));
  151. DEFINE(ARM_SMCCC_1_2_REGS_X14_OFFS, offsetof(struct arm_smccc_1_2_regs, a14));
  152. DEFINE(ARM_SMCCC_1_2_REGS_X16_OFFS, offsetof(struct arm_smccc_1_2_regs, a16));
  153. BLANK();
  154. DEFINE(HIBERN_PBE_ORIG, offsetof(struct pbe, orig_address));
  155. DEFINE(HIBERN_PBE_ADDR, offsetof(struct pbe, address));
  156. DEFINE(HIBERN_PBE_NEXT, offsetof(struct pbe, next));
  157. DEFINE(ARM64_FTR_SYSVAL, offsetof(struct arm64_ftr_reg, sys_val));
  158. BLANK();
  159. #ifdef CONFIG_UNMAP_KERNEL_AT_EL0
  160. DEFINE(TRAMP_VALIAS, TRAMP_VALIAS);
  161. #endif
  162. #ifdef CONFIG_ARM_SDE_INTERFACE
  163. DEFINE(SDEI_EVENT_INTREGS, offsetof(struct sdei_registered_event, interrupted_regs));
  164. DEFINE(SDEI_EVENT_PRIORITY, offsetof(struct sdei_registered_event, priority));
  165. #endif
  166. #ifdef CONFIG_ARM64_PTR_AUTH
  167. DEFINE(PTRAUTH_USER_KEY_APIA, offsetof(struct ptrauth_keys_user, apia));
  168. #ifdef CONFIG_ARM64_PTR_AUTH_KERNEL
  169. DEFINE(PTRAUTH_KERNEL_KEY_APIA, offsetof(struct ptrauth_keys_kernel, apia));
  170. #endif
  171. BLANK();
  172. #endif
  173. #ifdef CONFIG_KEXEC_CORE
  174. DEFINE(KIMAGE_ARCH_DTB_MEM, offsetof(struct kimage, arch.dtb_mem));
  175. DEFINE(KIMAGE_ARCH_EL2_VECTORS, offsetof(struct kimage, arch.el2_vectors));
  176. DEFINE(KIMAGE_ARCH_ZERO_PAGE, offsetof(struct kimage, arch.zero_page));
  177. DEFINE(KIMAGE_ARCH_PHYS_OFFSET, offsetof(struct kimage, arch.phys_offset));
  178. DEFINE(KIMAGE_ARCH_TTBR1, offsetof(struct kimage, arch.ttbr1));
  179. DEFINE(KIMAGE_HEAD, offsetof(struct kimage, head));
  180. DEFINE(KIMAGE_START, offsetof(struct kimage, start));
  181. BLANK();
  182. #endif
  183. return 0;
  184. }