module.h 2.8 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * Copyright (C) 2012 ARM Ltd.
  4. */
  5. #ifndef __ASM_MODULE_H
  6. #define __ASM_MODULE_H
  7. #include <asm-generic/module.h>
  8. #ifdef CONFIG_ARM64_MODULE_PLTS
  9. struct mod_plt_sec {
  10. int plt_shndx;
  11. int plt_num_entries;
  12. int plt_max_entries;
  13. };
  14. #define ARM64_MODULE_PLTS_ARCHDATA \
  15. struct mod_plt_sec core; \
  16. struct mod_plt_sec init; \
  17. \
  18. /* for CONFIG_DYNAMIC_FTRACE */ \
  19. struct plt_entry *ftrace_trampolines;
  20. #else
  21. #define ARM64_MODULE_PLTS_ARCHDATA
  22. #endif
  23. #ifdef CONFIG_KVM
  24. struct pkvm_module_section {
  25. void *start;
  26. void *end;
  27. };
  28. typedef s32 kvm_nvhe_reloc_t;
  29. struct pkvm_module_ops;
  30. struct pkvm_el2_module {
  31. struct pkvm_module_section text;
  32. struct pkvm_module_section bss;
  33. struct pkvm_module_section rodata;
  34. struct pkvm_module_section data;
  35. kvm_nvhe_reloc_t *relocs;
  36. unsigned int nr_relocs;
  37. int (*init)(const struct pkvm_module_ops *ops);
  38. };
  39. void kvm_apply_hyp_module_relocations(void *mod_start, void *hyp_va,
  40. kvm_nvhe_reloc_t *begin,
  41. kvm_nvhe_reloc_t *end);
  42. #define ARM64_MODULE_KVM_ARCHDATA \
  43. /* For pKVM hypervisor modules */ \
  44. struct pkvm_el2_module hyp;
  45. #else
  46. #define ARM64_MODULE_KVM_ARCHDATA
  47. #endif
  48. #ifdef CONFIG_HAVE_MOD_ARCH_SPECIFIC
  49. struct mod_arch_specific {
  50. ARM64_MODULE_PLTS_ARCHDATA
  51. ARM64_MODULE_KVM_ARCHDATA
  52. };
  53. #endif
  54. u64 module_emit_plt_entry(struct module *mod, Elf64_Shdr *sechdrs,
  55. void *loc, const Elf64_Rela *rela,
  56. Elf64_Sym *sym);
  57. u64 module_emit_veneer_for_adrp(struct module *mod, Elf64_Shdr *sechdrs,
  58. void *loc, u64 val);
  59. #ifdef CONFIG_RANDOMIZE_BASE
  60. extern u64 module_alloc_base;
  61. #else
  62. #define module_alloc_base ((u64)_etext - MODULES_VSIZE)
  63. #endif
  64. struct plt_entry {
  65. /*
  66. * A program that conforms to the AArch64 Procedure Call Standard
  67. * (AAPCS64) must assume that a veneer that alters IP0 (x16) and/or
  68. * IP1 (x17) may be inserted at any branch instruction that is
  69. * exposed to a relocation that supports long branches. Since that
  70. * is exactly what we are dealing with here, we are free to use x16
  71. * as a scratch register in the PLT veneers.
  72. */
  73. __le32 adrp; /* adrp x16, .... */
  74. __le32 add; /* add x16, x16, #0x.... */
  75. __le32 br; /* br x16 */
  76. };
  77. static inline bool is_forbidden_offset_for_adrp(void *place)
  78. {
  79. return IS_ENABLED(CONFIG_ARM64_ERRATUM_843419) &&
  80. cpus_have_const_cap(ARM64_WORKAROUND_843419) &&
  81. ((u64)place & 0xfff) >= 0xff8;
  82. }
  83. struct plt_entry get_plt_entry(u64 dst, void *pc);
  84. static inline const Elf_Shdr *find_section(const Elf_Ehdr *hdr,
  85. const Elf_Shdr *sechdrs,
  86. const char *name)
  87. {
  88. const Elf_Shdr *s, *se;
  89. const char *secstrs = (void *)hdr + sechdrs[hdr->e_shstrndx].sh_offset;
  90. for (s = sechdrs, se = sechdrs + hdr->e_shnum; s < se; s++) {
  91. if (strcmp(name, secstrs + s->sh_name) == 0)
  92. return s;
  93. }
  94. return NULL;
  95. }
  96. #endif /* __ASM_MODULE_H */