zynqmp-zcu102-revB.dts 831 B

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * dts file for Xilinx ZynqMP ZCU102 RevB
  4. *
  5. * (C) Copyright 2016 - 2021, Xilinx, Inc.
  6. *
  7. * Michal Simek <[email protected]>
  8. */
  9. #include "zynqmp-zcu102-revA.dts"
  10. / {
  11. model = "ZynqMP ZCU102 RevB";
  12. compatible = "xlnx,zynqmp-zcu102-revB", "xlnx,zynqmp-zcu102", "xlnx,zynqmp";
  13. };
  14. &gem3 {
  15. phy-handle = <&phyc>;
  16. phyc: ethernet-phy@c {
  17. reg = <0xc>;
  18. ti,rx-internal-delay = <0x8>;
  19. ti,tx-internal-delay = <0xa>;
  20. ti,fifo-depth = <0x1>;
  21. ti,dp83867-rxctrl-strap-quirk;
  22. /* reset-gpios = <&tca6416_u97 6 GPIO_ACTIVE_LOW>; */
  23. };
  24. /* Cleanup from RevA */
  25. /delete-node/ ethernet-phy@21;
  26. };
  27. /* Fix collision with u61 */
  28. &i2c0 {
  29. i2c-mux@75 {
  30. i2c@2 {
  31. max15303@1b { /* u8 */
  32. compatible = "maxim,max15303";
  33. reg = <0x1b>;
  34. };
  35. /delete-node/ max15303@20;
  36. };
  37. };
  38. };