123456789101112131415161718192021222324252627282930313233343536 |
- // SPDX-License-Identifier: GPL-2.0+
- /*
- * dts file for Xilinx ZynqMP ZCU102 Rev1.0
- *
- * (C) Copyright 2016 - 2018, Xilinx, Inc.
- *
- * Michal Simek <[email protected]>
- */
- #include "zynqmp-zcu102-revB.dts"
- / {
- model = "ZynqMP ZCU102 Rev1.0";
- compatible = "xlnx,zynqmp-zcu102-rev1.0", "xlnx,zynqmp-zcu102", "xlnx,zynqmp";
- };
- &eeprom {
- #address-cells = <1>;
- #size-cells = <1>;
- board_sn: board-sn@0 {
- reg = <0x0 0x14>;
- };
- eth_mac: eth-mac@20 {
- reg = <0x20 0x6>;
- };
- board_name: board-name@d0 {
- reg = <0xd0 0x6>;
- };
- board_revision: board-revision@e0 {
- reg = <0xe0 0x3>;
- };
- };
|