zynqmp-zcu100-revC.dts 11 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * dts file for Xilinx ZynqMP ZCU100 revC
  4. *
  5. * (C) Copyright 2016 - 2021, Xilinx, Inc.
  6. *
  7. * Michal Simek <[email protected]>
  8. * Nathalie Chan King Choy
  9. */
  10. /dts-v1/;
  11. #include "zynqmp.dtsi"
  12. #include "zynqmp-clk-ccf.dtsi"
  13. #include <dt-bindings/input/input.h>
  14. #include <dt-bindings/interrupt-controller/irq.h>
  15. #include <dt-bindings/gpio/gpio.h>
  16. #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
  17. #include <dt-bindings/phy/phy.h>
  18. / {
  19. model = "ZynqMP ZCU100 RevC";
  20. compatible = "xlnx,zynqmp-zcu100-revC", "xlnx,zynqmp-zcu100", "xlnx,zynqmp";
  21. aliases {
  22. i2c0 = &i2c1;
  23. rtc0 = &rtc;
  24. serial0 = &uart1;
  25. serial1 = &uart0;
  26. serial2 = &dcc;
  27. spi0 = &spi0;
  28. spi1 = &spi1;
  29. usb0 = &usb0;
  30. usb1 = &usb1;
  31. mmc0 = &sdhci0;
  32. mmc1 = &sdhci1;
  33. };
  34. chosen {
  35. bootargs = "earlycon";
  36. stdout-path = "serial0:115200n8";
  37. };
  38. memory@0 {
  39. device_type = "memory";
  40. reg = <0x0 0x0 0x0 0x80000000>;
  41. };
  42. gpio-keys {
  43. compatible = "gpio-keys";
  44. autorepeat;
  45. switch-4 {
  46. label = "sw4";
  47. gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
  48. linux,code = <KEY_POWER>;
  49. wakeup-source;
  50. autorepeat;
  51. };
  52. };
  53. leds {
  54. compatible = "gpio-leds";
  55. led-ds2 {
  56. label = "ds2";
  57. gpios = <&gpio 20 GPIO_ACTIVE_HIGH>;
  58. linux,default-trigger = "heartbeat";
  59. };
  60. led-ds3 {
  61. label = "ds3";
  62. gpios = <&gpio 19 GPIO_ACTIVE_HIGH>;
  63. linux,default-trigger = "phy0tx"; /* WLAN tx */
  64. default-state = "off";
  65. };
  66. led-ds4 {
  67. label = "ds4";
  68. gpios = <&gpio 18 GPIO_ACTIVE_HIGH>;
  69. linux,default-trigger = "phy0rx"; /* WLAN rx */
  70. default-state = "off";
  71. };
  72. led-ds5 {
  73. label = "ds5";
  74. gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;
  75. linux,default-trigger = "bluetooth-power";
  76. };
  77. vbus-det { /* U5 USB5744 VBUS detection via MIO25 */
  78. label = "vbus_det";
  79. gpios = <&gpio 25 GPIO_ACTIVE_HIGH>;
  80. default-state = "on";
  81. };
  82. };
  83. wmmcsdio_fixed: fixedregulator-mmcsdio {
  84. compatible = "regulator-fixed";
  85. regulator-name = "wmmcsdio_fixed";
  86. regulator-min-microvolt = <3300000>;
  87. regulator-max-microvolt = <3300000>;
  88. regulator-always-on;
  89. regulator-boot-on;
  90. };
  91. sdio_pwrseq: sdio-pwrseq {
  92. compatible = "mmc-pwrseq-simple";
  93. reset-gpios = <&gpio 7 GPIO_ACTIVE_LOW>; /* WIFI_EN */
  94. post-power-on-delay-ms = <10>;
  95. };
  96. ina226 {
  97. compatible = "iio-hwmon";
  98. io-channels = <&u35 0>, <&u35 1>, <&u35 2>, <&u35 3>;
  99. };
  100. si5335_0: si5335_0 { /* clk0_usb - u23 */
  101. compatible = "fixed-clock";
  102. #clock-cells = <0>;
  103. clock-frequency = <26000000>;
  104. };
  105. si5335_1: si5335_1 { /* clk1_dp - u23 */
  106. compatible = "fixed-clock";
  107. #clock-cells = <0>;
  108. clock-frequency = <27000000>;
  109. };
  110. };
  111. &dcc {
  112. status = "okay";
  113. };
  114. &gpio {
  115. status = "okay";
  116. gpio-line-names = "UART1_TX", "UART1_RX", "UART0_RX", "UART0_TX", "I2C1_SCL",
  117. "I2C1_SDA", "SPI1_SCLK", "WLAN_EN", "BT_EN", "SPI1_CS",
  118. "SPI1_MISO", "SPI1_MOSI", "I2C_MUX_RESET", "SD0_DAT0", "SD0_DAT1",
  119. "SD0_DAT2", "SD0_DAT3", "PS_LED3", "PS_LED2", "PS_LED1",
  120. "PS_LED0", "SD0_CMD", "SD0_CLK", "GPIO_PB", "SD0_DETECT",
  121. "VBUS_DET", "POWER_INT", "DP_AUX", "DP_HPD", "DP_OE",
  122. "DP_AUX_IN", "INA226_ALERT", "PS_FP_PWR_EN", "PL_PWR_EN", "POWER_KILL",
  123. "", "GPIO-A", "GPIO-B", "SPI0_SCLK", "GPIO-C",
  124. "GPIO-D", "SPI0_CS", "SPI0_MISO", "SPI_MOSI", "GPIO-E",
  125. "GPIO-F", "SD1_D0", "SD1_D1", "SD1_D2", "SD1_D3",
  126. "SD1_CMD", "SD1_CLK", "USB0_CLK", "USB0_DIR", "USB0_DATA2",
  127. "USB0_NXT", "USB0_DATA0", "USB0_DATA1", "USB0_STP", "USB0_DATA3",
  128. "USB0_DATA4", "USB0_DATA5", "USB0_DATA6", "USB0_DATA7", "USB1_CLK",
  129. "USB1_DIR", "USB1_DATA2", "USB1_NXT", "USB1_DATA0", "USB1_DATA1",
  130. "USB1_STP", "USB1_DATA3", "USB1_DATA4", "USB1_DATA5", "USB1_DATA6",
  131. "USB_DATA7", "WLAN_IRQ", "PMIC_IRQ", /* MIO end and EMIO start */
  132. "", "",
  133. "", "", "", "", "", "", "", "", "", "",
  134. "", "", "", "", "", "", "", "", "", "",
  135. "", "", "", "", "", "", "", "", "", "",
  136. "", "", "", "", "", "", "", "", "", "",
  137. "", "", "", "", "", "", "", "", "", "",
  138. "", "", "", "", "", "", "", "", "", "",
  139. "", "", "", "", "", "", "", "", "", "",
  140. "", "", "", "", "", "", "", "", "", "",
  141. "", "", "", "", "", "", "", "", "", "",
  142. "", "", "", "";
  143. };
  144. &i2c1 {
  145. status = "okay";
  146. pinctrl-names = "default", "gpio";
  147. pinctrl-0 = <&pinctrl_i2c1_default>;
  148. pinctrl-1 = <&pinctrl_i2c1_gpio>;
  149. scl-gpios = <&gpio 4 GPIO_ACTIVE_HIGH>;
  150. sda-gpios = <&gpio 5 GPIO_ACTIVE_HIGH>;
  151. clock-frequency = <100000>;
  152. i2c-mux@75 { /* u11 */
  153. compatible = "nxp,pca9548";
  154. #address-cells = <1>;
  155. #size-cells = <0>;
  156. reg = <0x75>;
  157. i2csw_0: i2c@0 {
  158. #address-cells = <1>;
  159. #size-cells = <0>;
  160. reg = <0>;
  161. label = "LS-I2C0";
  162. };
  163. i2csw_1: i2c@1 {
  164. #address-cells = <1>;
  165. #size-cells = <0>;
  166. reg = <1>;
  167. label = "LS-I2C1";
  168. };
  169. i2csw_2: i2c@2 {
  170. #address-cells = <1>;
  171. #size-cells = <0>;
  172. reg = <2>;
  173. label = "HS-I2C2";
  174. };
  175. i2csw_3: i2c@3 {
  176. #address-cells = <1>;
  177. #size-cells = <0>;
  178. reg = <3>;
  179. label = "HS-I2C3";
  180. };
  181. i2csw_4: i2c@4 {
  182. #address-cells = <1>;
  183. #size-cells = <0>;
  184. reg = <0x4>;
  185. pmic: pmic@5e { /* Custom TI PMIC u33 */
  186. compatible = "ti,tps65086";
  187. reg = <0x5e>;
  188. interrupt-parent = <&gpio>;
  189. interrupts = <77 IRQ_TYPE_LEVEL_LOW>;
  190. #gpio-cells = <2>;
  191. gpio-controller;
  192. };
  193. };
  194. i2csw_5: i2c@5 {
  195. #address-cells = <1>;
  196. #size-cells = <0>;
  197. reg = <5>;
  198. /* PS_PMBUS */
  199. u35: ina226@40 { /* u35 */
  200. compatible = "ti,ina226";
  201. #io-channel-cells = <1>;
  202. reg = <0x40>;
  203. shunt-resistor = <10000>;
  204. /* MIO31 is alert which should be routed to PMUFW */
  205. };
  206. };
  207. i2csw_6: i2c@6 {
  208. #address-cells = <1>;
  209. #size-cells = <0>;
  210. reg = <6>;
  211. /*
  212. * Not Connected
  213. */
  214. };
  215. i2csw_7: i2c@7 {
  216. #address-cells = <1>;
  217. #size-cells = <0>;
  218. reg = <7>;
  219. /*
  220. * usb5744 (DNP) - U5
  221. * 100kHz - this is default freq for us
  222. */
  223. };
  224. };
  225. };
  226. &pinctrl0 {
  227. status = "okay";
  228. pinctrl_i2c1_default: i2c1-default {
  229. mux {
  230. groups = "i2c1_1_grp";
  231. function = "i2c1";
  232. };
  233. conf {
  234. groups = "i2c1_1_grp";
  235. bias-pull-up;
  236. slew-rate = <SLEW_RATE_SLOW>;
  237. power-source = <IO_STANDARD_LVCMOS18>;
  238. };
  239. };
  240. pinctrl_i2c1_gpio: i2c1-gpio {
  241. mux {
  242. groups = "gpio0_4_grp", "gpio0_5_grp";
  243. function = "gpio0";
  244. };
  245. conf {
  246. groups = "gpio0_4_grp", "gpio0_5_grp";
  247. slew-rate = <SLEW_RATE_SLOW>;
  248. power-source = <IO_STANDARD_LVCMOS18>;
  249. };
  250. };
  251. pinctrl_sdhci0_default: sdhci0-default {
  252. mux {
  253. groups = "sdio0_3_grp";
  254. function = "sdio0";
  255. };
  256. conf {
  257. groups = "sdio0_3_grp";
  258. slew-rate = <SLEW_RATE_SLOW>;
  259. power-source = <IO_STANDARD_LVCMOS18>;
  260. bias-disable;
  261. };
  262. mux-cd {
  263. groups = "sdio0_cd_0_grp";
  264. function = "sdio0_cd";
  265. };
  266. conf-cd {
  267. groups = "sdio0_cd_0_grp";
  268. bias-high-impedance;
  269. bias-pull-up;
  270. slew-rate = <SLEW_RATE_SLOW>;
  271. power-source = <IO_STANDARD_LVCMOS18>;
  272. };
  273. };
  274. pinctrl_sdhci1_default: sdhci1-default {
  275. mux {
  276. groups = "sdio1_2_grp";
  277. function = "sdio1";
  278. };
  279. conf {
  280. groups = "sdio1_2_grp";
  281. slew-rate = <SLEW_RATE_SLOW>;
  282. power-source = <IO_STANDARD_LVCMOS18>;
  283. bias-disable;
  284. };
  285. };
  286. pinctrl_spi0_default: spi0-default {
  287. mux {
  288. groups = "spi0_3_grp";
  289. function = "spi0";
  290. };
  291. conf {
  292. groups = "spi0_3_grp";
  293. bias-disable;
  294. slew-rate = <SLEW_RATE_SLOW>;
  295. power-source = <IO_STANDARD_LVCMOS18>;
  296. };
  297. mux-cs {
  298. groups = "spi0_ss_9_grp";
  299. function = "spi0_ss";
  300. };
  301. conf-cs {
  302. groups = "spi0_ss_9_grp";
  303. bias-disable;
  304. };
  305. };
  306. pinctrl_spi1_default: spi1-default {
  307. mux {
  308. groups = "spi1_0_grp";
  309. function = "spi1";
  310. };
  311. conf {
  312. groups = "spi1_0_grp";
  313. bias-disable;
  314. slew-rate = <SLEW_RATE_SLOW>;
  315. power-source = <IO_STANDARD_LVCMOS18>;
  316. };
  317. mux-cs {
  318. groups = "spi1_ss_0_grp";
  319. function = "spi1_ss";
  320. };
  321. conf-cs {
  322. groups = "spi1_ss_0_grp";
  323. bias-disable;
  324. };
  325. };
  326. pinctrl_uart0_default: uart0-default {
  327. mux {
  328. groups = "uart0_0_grp";
  329. function = "uart0";
  330. };
  331. conf {
  332. groups = "uart0_0_grp";
  333. slew-rate = <SLEW_RATE_SLOW>;
  334. power-source = <IO_STANDARD_LVCMOS18>;
  335. };
  336. conf-rx {
  337. pins = "MIO3";
  338. bias-high-impedance;
  339. };
  340. conf-tx {
  341. pins = "MIO2";
  342. bias-disable;
  343. };
  344. };
  345. pinctrl_uart1_default: uart1-default {
  346. mux {
  347. groups = "uart1_0_grp";
  348. function = "uart1";
  349. };
  350. conf {
  351. groups = "uart1_0_grp";
  352. slew-rate = <SLEW_RATE_SLOW>;
  353. power-source = <IO_STANDARD_LVCMOS18>;
  354. };
  355. conf-rx {
  356. pins = "MIO1";
  357. bias-high-impedance;
  358. };
  359. conf-tx {
  360. pins = "MIO0";
  361. bias-disable;
  362. };
  363. };
  364. pinctrl_usb0_default: usb0-default {
  365. mux {
  366. groups = "usb0_0_grp";
  367. function = "usb0";
  368. };
  369. conf {
  370. groups = "usb0_0_grp";
  371. slew-rate = <SLEW_RATE_SLOW>;
  372. power-source = <IO_STANDARD_LVCMOS18>;
  373. };
  374. conf-rx {
  375. pins = "MIO52", "MIO53", "MIO55";
  376. bias-high-impedance;
  377. };
  378. conf-tx {
  379. pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59",
  380. "MIO60", "MIO61", "MIO62", "MIO63";
  381. bias-disable;
  382. };
  383. };
  384. pinctrl_usb1_default: usb1-default {
  385. mux {
  386. groups = "usb1_0_grp";
  387. function = "usb1";
  388. };
  389. conf {
  390. groups = "usb1_0_grp";
  391. slew-rate = <SLEW_RATE_SLOW>;
  392. power-source = <IO_STANDARD_LVCMOS18>;
  393. };
  394. conf-rx {
  395. pins = "MIO64", "MIO65", "MIO67";
  396. bias-high-impedance;
  397. };
  398. conf-tx {
  399. pins = "MIO66", "MIO68", "MIO69", "MIO70", "MIO71",
  400. "MIO72", "MIO73", "MIO74", "MIO75";
  401. bias-disable;
  402. };
  403. };
  404. };
  405. &psgtr {
  406. status = "okay";
  407. /* usb3, dp */
  408. clocks = <&si5335_0>, <&si5335_1>;
  409. clock-names = "ref0", "ref1";
  410. };
  411. &rtc {
  412. status = "okay";
  413. };
  414. /* SD0 only supports 3.3V, no level shifter */
  415. &sdhci0 {
  416. status = "okay";
  417. no-1-8-v;
  418. disable-wp;
  419. pinctrl-names = "default";
  420. pinctrl-0 = <&pinctrl_sdhci0_default>;
  421. xlnx,mio-bank = <0>;
  422. };
  423. &sdhci1 {
  424. status = "okay";
  425. bus-width = <0x4>;
  426. pinctrl-names = "default";
  427. pinctrl-0 = <&pinctrl_sdhci1_default>;
  428. xlnx,mio-bank = <0>;
  429. non-removable;
  430. disable-wp;
  431. cap-power-off-card;
  432. mmc-pwrseq = <&sdio_pwrseq>;
  433. vqmmc-supply = <&wmmcsdio_fixed>;
  434. #address-cells = <1>;
  435. #size-cells = <0>;
  436. wlcore: wifi@2 {
  437. compatible = "ti,wl1831";
  438. reg = <2>;
  439. interrupt-parent = <&gpio>;
  440. interrupts = <76 IRQ_TYPE_EDGE_RISING>; /* MIO76 WLAN_IRQ 1V8 */
  441. };
  442. };
  443. &spi0 { /* Low Speed connector */
  444. status = "okay";
  445. label = "LS-SPI0";
  446. num-cs = <1>;
  447. pinctrl-names = "default";
  448. pinctrl-0 = <&pinctrl_spi0_default>;
  449. };
  450. &spi1 { /* High Speed connector */
  451. status = "okay";
  452. label = "HS-SPI1";
  453. num-cs = <1>;
  454. pinctrl-names = "default";
  455. pinctrl-0 = <&pinctrl_spi1_default>;
  456. };
  457. &uart0 {
  458. status = "okay";
  459. pinctrl-names = "default";
  460. pinctrl-0 = <&pinctrl_uart0_default>;
  461. bluetooth {
  462. compatible = "ti,wl1831-st";
  463. enable-gpios = <&gpio 8 GPIO_ACTIVE_HIGH>;
  464. };
  465. };
  466. &uart1 {
  467. status = "okay";
  468. pinctrl-names = "default";
  469. pinctrl-0 = <&pinctrl_uart1_default>;
  470. };
  471. /* ULPI SMSC USB3320 */
  472. &usb0 {
  473. status = "okay";
  474. pinctrl-names = "default";
  475. pinctrl-0 = <&pinctrl_usb0_default>;
  476. phy-names = "usb3-phy";
  477. phys = <&psgtr 2 PHY_TYPE_USB3 0 0>;
  478. };
  479. &dwc3_0 {
  480. status = "okay";
  481. dr_mode = "peripheral";
  482. maximum-speed = "super-speed";
  483. };
  484. /* ULPI SMSC USB3320 */
  485. &usb1 {
  486. status = "okay";
  487. pinctrl-names = "default";
  488. pinctrl-0 = <&pinctrl_usb1_default>;
  489. phy-names = "usb3-phy";
  490. phys = <&psgtr 3 PHY_TYPE_USB3 1 0>;
  491. };
  492. &dwc3_1 {
  493. status = "okay";
  494. dr_mode = "host";
  495. maximum-speed = "super-speed";
  496. };
  497. &watchdog0 {
  498. status = "okay";
  499. };
  500. &zynqmp_dpdma {
  501. status = "okay";
  502. };
  503. &zynqmp_dpsub {
  504. status = "okay";
  505. phy-names = "dp-phy0", "dp-phy1";
  506. phys = <&psgtr 1 PHY_TYPE_DP 0 1>,
  507. <&psgtr 0 PHY_TYPE_DP 1 1>;
  508. };