k3-j7200-common-proc-board.dts 8.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/
  4. */
  5. /dts-v1/;
  6. #include "k3-j7200-som-p0.dtsi"
  7. #include <dt-bindings/gpio/gpio.h>
  8. #include <dt-bindings/net/ti-dp83867.h>
  9. #include <dt-bindings/mux/ti-serdes.h>
  10. #include <dt-bindings/phy/phy.h>
  11. / {
  12. compatible = "ti,j7200-evm", "ti,j7200";
  13. model = "Texas Instruments J7200 EVM";
  14. chosen {
  15. stdout-path = "serial2:115200n8";
  16. bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000";
  17. };
  18. evm_12v0: fixedregulator-evm12v0 {
  19. /* main supply */
  20. compatible = "regulator-fixed";
  21. regulator-name = "evm_12v0";
  22. regulator-min-microvolt = <12000000>;
  23. regulator-max-microvolt = <12000000>;
  24. regulator-always-on;
  25. regulator-boot-on;
  26. };
  27. vsys_3v3: fixedregulator-vsys3v3 {
  28. /* Output of LM5140 */
  29. compatible = "regulator-fixed";
  30. regulator-name = "vsys_3v3";
  31. regulator-min-microvolt = <3300000>;
  32. regulator-max-microvolt = <3300000>;
  33. vin-supply = <&evm_12v0>;
  34. regulator-always-on;
  35. regulator-boot-on;
  36. };
  37. vsys_5v0: fixedregulator-vsys5v0 {
  38. /* Output of LM5140 */
  39. compatible = "regulator-fixed";
  40. regulator-name = "vsys_5v0";
  41. regulator-min-microvolt = <5000000>;
  42. regulator-max-microvolt = <5000000>;
  43. vin-supply = <&evm_12v0>;
  44. regulator-always-on;
  45. regulator-boot-on;
  46. };
  47. vdd_mmc1: fixedregulator-sd {
  48. /* Output of TPS22918 */
  49. compatible = "regulator-fixed";
  50. regulator-name = "vdd_mmc1";
  51. regulator-min-microvolt = <3300000>;
  52. regulator-max-microvolt = <3300000>;
  53. regulator-boot-on;
  54. enable-active-high;
  55. vin-supply = <&vsys_3v3>;
  56. gpio = <&exp2 2 GPIO_ACTIVE_HIGH>;
  57. };
  58. vdd_sd_dv: gpio-regulator-TLV71033 {
  59. /* Output of TLV71033 */
  60. compatible = "regulator-gpio";
  61. regulator-name = "tlv71033";
  62. pinctrl-names = "default";
  63. pinctrl-0 = <&vdd_sd_dv_pins_default>;
  64. regulator-min-microvolt = <1800000>;
  65. regulator-max-microvolt = <3300000>;
  66. regulator-boot-on;
  67. vin-supply = <&vsys_5v0>;
  68. gpios = <&main_gpio0 55 GPIO_ACTIVE_HIGH>;
  69. states = <1800000 0x0>,
  70. <3300000 0x1>;
  71. };
  72. };
  73. &wkup_pmx2 {
  74. mcu_cpsw_pins_default: mcu-cpsw-pins-default {
  75. pinctrl-single,pins = <
  76. J721E_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* MCU_RGMII1_TX_CTL */
  77. J721E_WKUP_IOPAD(0x0004, PIN_INPUT, 0) /* MCU_RGMII1_RX_CTL */
  78. J721E_WKUP_IOPAD(0x0008, PIN_OUTPUT, 0) /* MCU_RGMII1_TD3 */
  79. J721E_WKUP_IOPAD(0x000c, PIN_OUTPUT, 0) /* MCU_RGMII1_TD2 */
  80. J721E_WKUP_IOPAD(0x0010, PIN_OUTPUT, 0) /* MCU_RGMII1_TD1 */
  81. J721E_WKUP_IOPAD(0x0014, PIN_OUTPUT, 0) /* MCU_RGMII1_TD0 */
  82. J721E_WKUP_IOPAD(0x0020, PIN_INPUT, 0) /* MCU_RGMII1_RD3 */
  83. J721E_WKUP_IOPAD(0x0024, PIN_INPUT, 0) /* MCU_RGMII1_RD2 */
  84. J721E_WKUP_IOPAD(0x0028, PIN_INPUT, 0) /* MCU_RGMII1_RD1 */
  85. J721E_WKUP_IOPAD(0x002c, PIN_INPUT, 0) /* MCU_RGMII1_RD0 */
  86. J721E_WKUP_IOPAD(0x0018, PIN_OUTPUT, 0) /* MCU_RGMII1_TXC */
  87. J721E_WKUP_IOPAD(0x001c, PIN_INPUT, 0) /* MCU_RGMII1_RXC */
  88. >;
  89. };
  90. mcu_mdio_pins_default: mcu-mdio1-pins-default {
  91. pinctrl-single,pins = <
  92. J721E_WKUP_IOPAD(0x0034, PIN_OUTPUT, 0) /* (L1) MCU_MDIO0_MDC */
  93. J721E_WKUP_IOPAD(0x0030, PIN_INPUT, 0) /* (L4) MCU_MDIO0_MDIO */
  94. >;
  95. };
  96. };
  97. &main_pmx0 {
  98. main_i2c0_pins_default: main-i2c0-pins-default {
  99. pinctrl-single,pins = <
  100. J721E_IOPAD(0xd4, PIN_INPUT_PULLUP, 0) /* (V3) I2C0_SCL */
  101. J721E_IOPAD(0xd8, PIN_INPUT_PULLUP, 0) /* (W2) I2C0_SDA */
  102. >;
  103. };
  104. main_i2c1_pins_default: main-i2c1-pins-default {
  105. pinctrl-single,pins = <
  106. J721E_IOPAD(0xdc, PIN_INPUT_PULLUP, 3) /* (U3) ECAP0_IN_APWM_OUT.I2C1_SCL */
  107. J721E_IOPAD(0xe0, PIN_INPUT_PULLUP, 3) /* (T3) EXT_REFCLK1.I2C1_SDA */
  108. >;
  109. };
  110. main_mmc1_pins_default: main-mmc1-pins-default {
  111. pinctrl-single,pins = <
  112. J721E_IOPAD(0x104, PIN_INPUT, 0) /* (M20) MMC1_CMD */
  113. J721E_IOPAD(0x100, PIN_INPUT, 0) /* (P21) MMC1_CLK */
  114. J721E_IOPAD(0xfc, PIN_INPUT, 0) /* (P25) MMC1_CLKLB */
  115. J721E_IOPAD(0xf8, PIN_INPUT, 0) /* (M19) MMC1_DAT0 */
  116. J721E_IOPAD(0xf4, PIN_INPUT, 0) /* (N21) MMC1_DAT1 */
  117. J721E_IOPAD(0xf0, PIN_INPUT, 0) /* (N20) MMC1_DAT2 */
  118. J721E_IOPAD(0xec, PIN_INPUT, 0) /* (N19) MMC1_DAT3 */
  119. J721E_IOPAD(0xe4, PIN_INPUT, 8) /* (V1) TIMER_IO0.MMC1_SDCD */
  120. >;
  121. };
  122. vdd_sd_dv_pins_default: vdd-sd-dv-pins-default {
  123. pinctrl-single,pins = <
  124. J721E_IOPAD(0xd0, PIN_OUTPUT, 7) /* (T5) SPI0_D1.GPIO0_55 */
  125. >;
  126. };
  127. };
  128. &main_pmx1 {
  129. main_usbss0_pins_default: main-usbss0-pins-default {
  130. pinctrl-single,pins = <
  131. J721E_IOPAD(0x04, PIN_OUTPUT, 0) /* (T4) USB0_DRVVBUS */
  132. >;
  133. };
  134. };
  135. &wkup_uart0 {
  136. /* Wakeup UART is used by System firmware */
  137. status = "reserved";
  138. };
  139. &main_uart0 {
  140. /* Shared with ATF on this platform */
  141. power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
  142. };
  143. &main_uart2 {
  144. /* MAIN UART 2 is used by R5F firmware */
  145. status = "reserved";
  146. };
  147. &main_uart3 {
  148. /* UART not brought out */
  149. status = "disabled";
  150. };
  151. &main_uart4 {
  152. /* UART not brought out */
  153. status = "disabled";
  154. };
  155. &main_uart5 {
  156. /* UART not brought out */
  157. status = "disabled";
  158. };
  159. &main_uart6 {
  160. /* UART not brought out */
  161. status = "disabled";
  162. };
  163. &main_uart7 {
  164. /* UART not brought out */
  165. status = "disabled";
  166. };
  167. &main_uart8 {
  168. /* UART not brought out */
  169. status = "disabled";
  170. };
  171. &main_uart9 {
  172. /* UART not brought out */
  173. status = "disabled";
  174. };
  175. &main_gpio2 {
  176. status = "disabled";
  177. };
  178. &main_gpio4 {
  179. status = "disabled";
  180. };
  181. &main_gpio6 {
  182. status = "disabled";
  183. };
  184. &wkup_gpio1 {
  185. status = "disabled";
  186. };
  187. &mcu_cpsw {
  188. pinctrl-names = "default";
  189. pinctrl-0 = <&mcu_cpsw_pins_default &mcu_mdio_pins_default>;
  190. };
  191. &davinci_mdio {
  192. phy0: ethernet-phy@0 {
  193. reg = <0>;
  194. ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
  195. ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
  196. };
  197. };
  198. &cpsw_port1 {
  199. phy-mode = "rgmii-rxid";
  200. phy-handle = <&phy0>;
  201. };
  202. &main_i2c0 {
  203. pinctrl-names = "default";
  204. pinctrl-0 = <&main_i2c0_pins_default>;
  205. clock-frequency = <400000>;
  206. exp1: gpio@20 {
  207. compatible = "ti,tca6416";
  208. reg = <0x20>;
  209. gpio-controller;
  210. #gpio-cells = <2>;
  211. };
  212. exp2: gpio@22 {
  213. compatible = "ti,tca6424";
  214. reg = <0x22>;
  215. gpio-controller;
  216. #gpio-cells = <2>;
  217. };
  218. };
  219. /*
  220. * The j7200 CPB board is identical to the CPB used for J721E, the SOMs can be
  221. * swapped on the CPB.
  222. *
  223. * main_i2c1 of J7200 is connected to the CPB i2c bus labeled as i2c3.
  224. * The i2c1 of the CPB (as it is labeled) is not connected to j7200.
  225. */
  226. &main_i2c1 {
  227. pinctrl-names = "default";
  228. pinctrl-0 = <&main_i2c1_pins_default>;
  229. clock-frequency = <400000>;
  230. exp3: gpio@20 {
  231. compatible = "ti,tca6408";
  232. reg = <0x20>;
  233. gpio-controller;
  234. #gpio-cells = <2>;
  235. gpio-line-names = "CODEC_RSTz", "CODEC_SPARE1", "UB926_RESETn",
  236. "UB926_LOCK", "UB926_PWR_SW_CNTRL",
  237. "UB926_TUNER_RESET", "UB926_GPIO_SPARE", "";
  238. };
  239. };
  240. &main_sdhci0 {
  241. /* eMMC */
  242. non-removable;
  243. ti,driver-strength-ohm = <50>;
  244. disable-wp;
  245. };
  246. &main_sdhci1 {
  247. /* SD card */
  248. pinctrl-0 = <&main_mmc1_pins_default>;
  249. pinctrl-names = "default";
  250. vmmc-supply = <&vdd_mmc1>;
  251. vqmmc-supply = <&vdd_sd_dv>;
  252. ti,driver-strength-ohm = <50>;
  253. disable-wp;
  254. };
  255. &serdes_ln_ctrl {
  256. idle-states = <J7200_SERDES0_LANE0_PCIE1_LANE0>, <J7200_SERDES0_LANE1_PCIE1_LANE1>,
  257. <J7200_SERDES0_LANE2_QSGMII_LANE1>, <J7200_SERDES0_LANE3_IP4_UNUSED>;
  258. };
  259. &usb_serdes_mux {
  260. idle-states = <1>; /* USB0 to SERDES lane 3 */
  261. };
  262. &usbss0 {
  263. pinctrl-names = "default";
  264. pinctrl-0 = <&main_usbss0_pins_default>;
  265. ti,vbus-divider;
  266. ti,usb2-only;
  267. };
  268. &usb0 {
  269. dr_mode = "otg";
  270. maximum-speed = "high-speed";
  271. };
  272. &tscadc0 {
  273. adc {
  274. ti,adc-channels = <0 1 2 3 4 5 6 7>;
  275. };
  276. };
  277. &serdes_refclk {
  278. clock-frequency = <100000000>;
  279. };
  280. &serdes0 {
  281. serdes0_pcie_link: phy@0 {
  282. reg = <0>;
  283. cdns,num-lanes = <2>;
  284. #phy-cells = <0>;
  285. cdns,phy-type = <PHY_TYPE_PCIE>;
  286. resets = <&serdes_wiz0 1>, <&serdes_wiz0 2>;
  287. };
  288. serdes0_qsgmii_link: phy@1 {
  289. reg = <2>;
  290. cdns,num-lanes = <1>;
  291. #phy-cells = <0>;
  292. cdns,phy-type = <PHY_TYPE_QSGMII>;
  293. resets = <&serdes_wiz0 3>;
  294. };
  295. };
  296. &pcie1_rc {
  297. reset-gpios = <&exp1 2 GPIO_ACTIVE_HIGH>;
  298. phys = <&serdes0_pcie_link>;
  299. phy-names = "pcie-phy";
  300. num-lanes = <2>;
  301. };
  302. &pcie1_ep {
  303. phys = <&serdes0_pcie_link>;
  304. phy-names = "pcie-phy";
  305. num-lanes = <2>;
  306. status = "disabled";
  307. };