k3-am62-mcu.dtsi 2.3 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Device Tree Source for AM625 SoC Family MCU Domain peripherals
  4. *
  5. * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/
  6. */
  7. &cbass_mcu {
  8. mcu_pmx0: pinctrl@4084000 {
  9. compatible = "pinctrl-single";
  10. reg = <0x00 0x04084000 0x00 0x88>;
  11. #pinctrl-cells = <1>;
  12. pinctrl-single,register-width = <32>;
  13. pinctrl-single,function-mask = <0xffffffff>;
  14. };
  15. mcu_uart0: serial@4a00000 {
  16. compatible = "ti,am64-uart", "ti,am654-uart";
  17. reg = <0x00 0x04a00000 0x00 0x100>;
  18. interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>;
  19. power-domains = <&k3_pds 149 TI_SCI_PD_EXCLUSIVE>;
  20. clocks = <&k3_clks 149 0>;
  21. clock-names = "fclk";
  22. };
  23. mcu_i2c0: i2c@4900000 {
  24. compatible = "ti,am64-i2c", "ti,omap4-i2c";
  25. reg = <0x00 0x04900000 0x00 0x100>;
  26. interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
  27. #address-cells = <1>;
  28. #size-cells = <0>;
  29. power-domains = <&k3_pds 106 TI_SCI_PD_EXCLUSIVE>;
  30. clocks = <&k3_clks 106 2>;
  31. clock-names = "fck";
  32. };
  33. mcu_spi0: spi@4b00000 {
  34. compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
  35. reg = <0x00 0x04b00000 0x00 0x400>;
  36. interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
  37. #address-cells = <1>;
  38. #size-cells = <0>;
  39. power-domains = <&k3_pds 147 TI_SCI_PD_EXCLUSIVE>;
  40. clocks = <&k3_clks 147 0>;
  41. status = "disabled";
  42. };
  43. mcu_spi1: spi@4b10000 {
  44. compatible = "ti,am654-mcspi","ti,omap4-mcspi";
  45. reg = <0x00 0x04b10000 0x00 0x400>;
  46. interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>;
  47. #address-cells = <1>;
  48. #size-cells = <0>;
  49. power-domains = <&k3_pds 148 TI_SCI_PD_EXCLUSIVE>;
  50. clocks = <&k3_clks 148 0>;
  51. status = "disabled";
  52. };
  53. mcu_gpio_intr: interrupt-controller@4210000 {
  54. compatible = "ti,sci-intr";
  55. reg = <0x00 0x04210000 0x00 0x200>;
  56. ti,intr-trigger-type = <1>;
  57. interrupt-controller;
  58. interrupt-parent = <&gic500>;
  59. #interrupt-cells = <1>;
  60. ti,sci = <&dmsc>;
  61. ti,sci-dev-id = <5>;
  62. ti,interrupt-ranges = <0 104 4>;
  63. };
  64. mcu_gpio0: gpio@4201000 {
  65. compatible = "ti,am64-gpio", "ti,keystone-gpio";
  66. reg = <0x00 0x4201000 0x00 0x100>;
  67. gpio-controller;
  68. #gpio-cells = <2>;
  69. interrupt-parent = <&mcu_gpio_intr>;
  70. interrupts = <30>, <31>;
  71. interrupt-controller;
  72. #interrupt-cells = <2>;
  73. ti,ngpio = <24>;
  74. ti,davinci-gpio-unbanked = <0>;
  75. power-domains = <&k3_pds 79 TI_SCI_PD_EXCLUSIVE>;
  76. clocks = <&k3_clks 79 0>;
  77. clock-names = "gpio";
  78. };
  79. };