rk3566-soquartz.dtsi 13 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618
  1. // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2. /dts-v1/;
  3. #include <dt-bindings/gpio/gpio.h>
  4. #include <dt-bindings/pinctrl/rockchip.h>
  5. #include "rk3566.dtsi"
  6. / {
  7. model = "Pine64 RK3566 SoQuartz SOM";
  8. compatible = "pine64,soquartz", "rockchip,rk3566";
  9. aliases {
  10. ethernet0 = &gmac1;
  11. mmc0 = &sdmmc0;
  12. mmc1 = &sdhci;
  13. mmc2 = &sdmmc1;
  14. };
  15. chosen: chosen {
  16. stdout-path = "serial2:1500000n8";
  17. };
  18. gmac1_clkin: external-gmac1-clock {
  19. compatible = "fixed-clock";
  20. clock-frequency = <125000000>;
  21. clock-output-names = "gmac1_clkin";
  22. #clock-cells = <0>;
  23. };
  24. leds {
  25. compatible = "gpio-leds";
  26. led_diy: led-diy {
  27. label = "diy-led";
  28. default-state = "on";
  29. gpios = <&gpio0 RK_PC1 GPIO_ACTIVE_LOW>;
  30. linux,default-trigger = "heartbeat";
  31. pinctrl-names = "default";
  32. pinctrl-0 = <&diy_led_enable_h>;
  33. retain-state-suspended;
  34. status = "disabled";
  35. };
  36. led_work: led-work {
  37. label = "work-led";
  38. default-state = "off";
  39. gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_LOW>;
  40. pinctrl-names = "default";
  41. pinctrl-0 = <&work_led_enable_h>;
  42. retain-state-suspended;
  43. status = "disabled";
  44. };
  45. };
  46. sdio_pwrseq: sdio-pwrseq {
  47. status = "okay";
  48. compatible = "mmc-pwrseq-simple";
  49. clocks = <&rk809 1>;
  50. clock-names = "ext_clock";
  51. pinctrl-names = "default";
  52. pinctrl-0 = <&wifi_enable_h>;
  53. reset-gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_LOW>;
  54. };
  55. vbus: vbus-regulator {
  56. compatible = "regulator-fixed";
  57. regulator-name = "vbus";
  58. regulator-always-on;
  59. regulator-boot-on;
  60. regulator-min-microvolt = <5000000>;
  61. regulator-max-microvolt = <5000000>;
  62. };
  63. /* sourced from vbus, vbus is provided by the carrier board */
  64. vcc5v0_sys: vcc5v0-sys-regulator {
  65. compatible = "regulator-fixed";
  66. regulator-name = "vcc5v0_sys";
  67. regulator-always-on;
  68. regulator-boot-on;
  69. regulator-min-microvolt = <5000000>;
  70. regulator-max-microvolt = <5000000>;
  71. vin-supply = <&vbus>;
  72. };
  73. vcc3v3_sys: vcc3v3-sys-regulator {
  74. compatible = "regulator-fixed";
  75. regulator-name = "vcc3v3_sys";
  76. regulator-always-on;
  77. regulator-boot-on;
  78. regulator-min-microvolt = <3300000>;
  79. regulator-max-microvolt = <3300000>;
  80. vin-supply = <&vcc5v0_sys>;
  81. };
  82. };
  83. &cpu0 {
  84. cpu-supply = <&vdd_cpu>;
  85. };
  86. &cpu1 {
  87. cpu-supply = <&vdd_cpu>;
  88. };
  89. &cpu2 {
  90. cpu-supply = <&vdd_cpu>;
  91. };
  92. &cpu3 {
  93. cpu-supply = <&vdd_cpu>;
  94. };
  95. &gmac1 {
  96. assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>;
  97. assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>, <&gmac1_clkin>;
  98. clock_in_out = "input";
  99. phy-supply = <&vcc_3v3>;
  100. phy-mode = "rgmii";
  101. pinctrl-names = "default";
  102. pinctrl-0 = <&gmac1m0_miim
  103. &gmac1m0_tx_bus2
  104. &gmac1m0_rx_bus2
  105. &gmac1m0_rgmii_clk
  106. &gmac1m0_clkinout
  107. &gmac1m0_rgmii_bus>;
  108. snps,reset-gpio = <&gpio0 RK_PC3 GPIO_ACTIVE_LOW>;
  109. snps,reset-active-low;
  110. /* Reset time is 20ms, 100ms for rtl8211f, also works well here */
  111. snps,reset-delays-us = <0 20000 100000>;
  112. tx_delay = <0x30>;
  113. rx_delay = <0x10>;
  114. phy-handle = <&rgmii_phy1>;
  115. status = "disabled";
  116. };
  117. &gpio0 {
  118. nextrst-hog {
  119. gpio-hog;
  120. /*
  121. * GPIO_ACTIVE_LOW + output-low here means that the pin is set
  122. * to high, because output-low decides the value pre-inversion.
  123. */
  124. gpios = <RK_PA5 GPIO_ACTIVE_LOW>;
  125. line-name = "nEXTRST";
  126. output-low;
  127. };
  128. };
  129. &gpu {
  130. mali-supply = <&vdd_gpu>;
  131. status = "okay";
  132. };
  133. &i2c0 {
  134. status = "okay";
  135. vdd_cpu: regulator@1c {
  136. compatible = "tcs,tcs4525";
  137. reg = <0x1c>;
  138. fcs,suspend-voltage-selector = <1>;
  139. regulator-name = "vdd_cpu";
  140. regulator-min-microvolt = <800000>;
  141. regulator-max-microvolt = <1150000>;
  142. regulator-ramp-delay = <2300>;
  143. regulator-always-on;
  144. regulator-boot-on;
  145. vin-supply = <&vcc5v0_sys>;
  146. regulator-state-mem {
  147. regulator-off-in-suspend;
  148. };
  149. };
  150. rk809: pmic@20 {
  151. compatible = "rockchip,rk809";
  152. reg = <0x20>;
  153. interrupt-parent = <&gpio0>;
  154. interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
  155. #clock-cells = <1>;
  156. clock-output-names = "rk808-clkout1", "rk808-clkout2";
  157. pinctrl-names = "default";
  158. pinctrl-0 = <&pmic_int_l>;
  159. rockchip,system-power-controller;
  160. wakeup-source;
  161. vcc1-supply = <&vcc3v3_sys>;
  162. vcc2-supply = <&vcc3v3_sys>;
  163. vcc3-supply = <&vcc3v3_sys>;
  164. vcc4-supply = <&vcc3v3_sys>;
  165. vcc5-supply = <&vcc3v3_sys>;
  166. vcc6-supply = <&vcc3v3_sys>;
  167. vcc7-supply = <&vcc3v3_sys>;
  168. vcc8-supply = <&vcc3v3_sys>;
  169. vcc9-supply = <&vcc3v3_sys>;
  170. regulators {
  171. vdd_logic: DCDC_REG1 {
  172. regulator-name = "vdd_logic";
  173. regulator-always-on;
  174. regulator-boot-on;
  175. regulator-min-microvolt = <500000>;
  176. regulator-max-microvolt = <1350000>;
  177. regulator-init-microvolt = <900000>;
  178. regulator-ramp-delay = <6001>;
  179. regulator-initial-mode = <0x2>;
  180. regulator-state-mem {
  181. regulator-on-in-suspend;
  182. regulator-suspend-microvolt = <900000>;
  183. };
  184. };
  185. vdd_gpu: DCDC_REG2 {
  186. regulator-name = "vdd_gpu";
  187. regulator-always-on;
  188. regulator-boot-on;
  189. regulator-min-microvolt = <500000>;
  190. regulator-max-microvolt = <1350000>;
  191. regulator-init-microvolt = <900000>;
  192. regulator-ramp-delay = <6001>;
  193. regulator-initial-mode = <0x2>;
  194. regulator-state-mem {
  195. regulator-off-in-suspend;
  196. };
  197. };
  198. vcc_ddr: DCDC_REG3 {
  199. regulator-always-on;
  200. regulator-boot-on;
  201. regulator-initial-mode = <0x2>;
  202. regulator-name = "vcc_ddr";
  203. regulator-state-mem {
  204. regulator-on-in-suspend;
  205. };
  206. };
  207. vdd_npu: DCDC_REG4 {
  208. regulator-always-on;
  209. regulator-boot-on;
  210. regulator-min-microvolt = <500000>;
  211. regulator-max-microvolt = <1350000>;
  212. regulator-init-microvolt = <900000>;
  213. regulator-initial-mode = <0x2>;
  214. regulator-name = "vdd_npu";
  215. regulator-state-mem {
  216. regulator-off-in-suspend;
  217. };
  218. };
  219. vcc_1v8: DCDC_REG5 {
  220. regulator-name = "vcc_1v8";
  221. regulator-always-on;
  222. regulator-boot-on;
  223. regulator-min-microvolt = <1800000>;
  224. regulator-max-microvolt = <1800000>;
  225. regulator-state-mem {
  226. regulator-on-in-suspend;
  227. regulator-suspend-microvolt = <1800000>;
  228. };
  229. };
  230. vdda0v9_image: LDO_REG1 {
  231. regulator-always-on;
  232. regulator-boot-on;
  233. regulator-min-microvolt = <900000>;
  234. regulator-max-microvolt = <900000>;
  235. regulator-name = "vdda0v9_image";
  236. regulator-state-mem {
  237. regulator-on-in-suspend;
  238. regulator-suspend-microvolt = <900000>;
  239. };
  240. };
  241. vdda_0v9: LDO_REG2 {
  242. regulator-always-on;
  243. regulator-boot-on;
  244. regulator-min-microvolt = <900000>;
  245. regulator-max-microvolt = <900000>;
  246. regulator-name = "vdda_0v9";
  247. regulator-state-mem {
  248. regulator-off-in-suspend;
  249. };
  250. };
  251. vdda0v9_pmu: LDO_REG3 {
  252. regulator-always-on;
  253. regulator-boot-on;
  254. regulator-min-microvolt = <900000>;
  255. regulator-max-microvolt = <900000>;
  256. regulator-name = "vdda0v9_pmu";
  257. regulator-state-mem {
  258. regulator-on-in-suspend;
  259. regulator-suspend-microvolt = <900000>;
  260. };
  261. };
  262. vccio_acodec: LDO_REG4 {
  263. regulator-always-on;
  264. regulator-boot-on;
  265. regulator-min-microvolt = <3300000>;
  266. regulator-max-microvolt = <3300000>;
  267. regulator-name = "vccio_acodec";
  268. regulator-state-mem {
  269. regulator-off-in-suspend;
  270. };
  271. };
  272. vccio_sd: LDO_REG5 {
  273. regulator-always-on;
  274. regulator-boot-on;
  275. regulator-min-microvolt = <1800000>;
  276. regulator-max-microvolt = <3300000>;
  277. regulator-name = "vccio_sd";
  278. regulator-state-mem {
  279. regulator-off-in-suspend;
  280. };
  281. };
  282. vcc3v3_pmu: LDO_REG6 {
  283. regulator-always-on;
  284. regulator-boot-on;
  285. regulator-min-microvolt = <3300000>;
  286. regulator-max-microvolt = <3300000>;
  287. regulator-name = "vcc3v3_pmu";
  288. regulator-state-mem {
  289. regulator-on-in-suspend;
  290. regulator-suspend-microvolt = <3300000>;
  291. };
  292. };
  293. vcca_1v8: LDO_REG7 {
  294. regulator-always-on;
  295. regulator-boot-on;
  296. regulator-min-microvolt = <1800000>;
  297. regulator-max-microvolt = <1800000>;
  298. regulator-name = "vcca_1v8";
  299. regulator-state-mem {
  300. regulator-off-in-suspend;
  301. };
  302. };
  303. vcca1v8_pmu: LDO_REG8 {
  304. regulator-always-on;
  305. regulator-boot-on;
  306. regulator-min-microvolt = <1800000>;
  307. regulator-max-microvolt = <1800000>;
  308. regulator-name = "vcca1v8_pmu";
  309. regulator-state-mem {
  310. regulator-off-in-suspend;
  311. };
  312. };
  313. vcca1v8_image: LDO_REG9 {
  314. regulator-always-on;
  315. regulator-boot-on;
  316. regulator-min-microvolt = <1800000>;
  317. regulator-max-microvolt = <1800000>;
  318. regulator-name = "vcca1v8_image";
  319. regulator-state-mem {
  320. regulator-off-in-suspend;
  321. };
  322. };
  323. vcc_3v3: SWITCH_REG1 {
  324. regulator-name = "vcc_3v3";
  325. regulator-state-mem {
  326. regulator-off-in-suspend;
  327. };
  328. };
  329. vcc3v3_sd: SWITCH_REG2 {
  330. regulator-name = "vcc3v3_sd";
  331. status = "disabled";
  332. regulator-state-mem {
  333. regulator-on-in-suspend;
  334. };
  335. };
  336. };
  337. };
  338. };
  339. /*
  340. * i2c1 is exposed on CM1 / Module1A
  341. * pin 80 - i2c1_scl_m0, pullup to vcc3v3_pmu
  342. * pin 82 - i2c1_sda_m0, pullup to vcc3v3_pmu
  343. */
  344. &i2c1 {
  345. status = "disabled";
  346. };
  347. /*
  348. * i2c2 is exposed on CM1 / Module1A
  349. * pin 56 - i2c2_scl_m1, pullup to vcc_3v3, shared with i2s1_8ch
  350. * pin 58 - i2c2_sda_m1, pullup to vcc_3v3
  351. */
  352. &i2c2 {
  353. pinctrl-names = "default";
  354. pinctrl-0 = <&i2c2m1_xfer>;
  355. status = "disabled";
  356. };
  357. /*
  358. * i2c3 is exposed on CM1 / Module1A
  359. * pin 35 - i2c3_scl_m0, pullup to vcc_3v3
  360. * pin 36 - i2c3_sda_m0, pullup to vcc_3v3
  361. */
  362. &i2c3 {
  363. status = "disabled";
  364. };
  365. /*
  366. * i2c4 is exposed on CM2 / Module1B
  367. * pin 45 - i2c4_scl_m1
  368. * pin 47 - i2c4_sda_m1
  369. */
  370. &i2c4 {
  371. pinctrl-names = "default";
  372. pinctrl-0 = <&i2c4m1_xfer>;
  373. status = "disabled";
  374. };
  375. /*
  376. * i2s1_8ch is exposed on CM1 / Module1A
  377. * pin 24 - i2s1_sdi1_m1
  378. * pin 25 - i2s1_sdo0_m1
  379. * pin 26 - i2s1_lrck_tx_m1
  380. * pin 27 - i2s1_sdi0_m1
  381. * pin 29 - i2s1_sdi3_m1
  382. * pin 30 - i2s1_sdi2_m1
  383. * pin 40 - i2s1_sdo1_m1, shared with spi3
  384. * pin 41 - i2s1_sdo2_m1
  385. * pin 49 - i2s1_sclk_tx_m1
  386. * pin 50 - i2s1_mclk_m1
  387. * pin 56 - i2s1_sdo3_m1, shared with i2c2
  388. */
  389. &i2s1_8ch {
  390. pinctrl-names = "default";
  391. pinctrl-0 = <&i2s1m1_sclktx &i2s1m1_sclkrx
  392. &i2s1m1_lrcktx &i2s1m1_lrckrx
  393. &i2s1m1_sdi0 &i2s1m1_sdi1
  394. &i2s1m1_sdi2 &i2s1m1_sdi3
  395. &i2s1m1_sdo0 &i2s1m1_sdo1
  396. &i2s1m1_sdo2 &i2s1m1_sdo3>;
  397. status = "disabled";
  398. };
  399. &mdio1 {
  400. rgmii_phy1: ethernet-phy@0 {
  401. compatible = "ethernet-phy-ieee802.3-c22";
  402. reg = <0>;
  403. status = "disabled";
  404. };
  405. };
  406. &pinctrl {
  407. bt {
  408. bt_enable_h: bt-enable-h {
  409. rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
  410. };
  411. bt_host_wake_l: bt-host-wake-l {
  412. rockchip,pins = <2 RK_PC0 RK_FUNC_GPIO &pcfg_pull_down>;
  413. };
  414. bt_wake_l: bt-wake-l {
  415. rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
  416. };
  417. };
  418. leds {
  419. work_led_enable_h: work-led-enable-h {
  420. rockchip,pins = <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
  421. };
  422. diy_led_enable_h: diy-led-enable-h {
  423. rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
  424. };
  425. };
  426. pmic {
  427. pmic_int_l: pmic-int-l {
  428. rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
  429. };
  430. };
  431. sdio-pwrseq {
  432. wifi_enable_h: wifi-enable-h {
  433. rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
  434. };
  435. };
  436. };
  437. &pmu_io_domains {
  438. pmuio1-supply = <&vcc3v3_pmu>;
  439. pmuio2-supply = <&vcc3v3_pmu>;
  440. vccio1-supply = <&vcc_3v3>;
  441. vccio2-supply = <&vcc_1v8>;
  442. vccio3-supply = <&vccio_sd>;
  443. vccio4-supply = <&vcc_1v8>;
  444. vccio5-supply = <&vcc_3v3>;
  445. vccio6-supply = <&vcc_3v3>;
  446. vccio7-supply = <&vcc_3v3>;
  447. status = "okay";
  448. };
  449. /*
  450. * saradc is exposed on CM1 / Module1A
  451. * pin 94 - saradc_vin3
  452. * pin 96 - saradc_vin2
  453. */
  454. &saradc {
  455. vref-supply = <&vcca_1v8>;
  456. status = "disabled";
  457. };
  458. &sdhci {
  459. bus-width = <8>;
  460. mmc-hs200-1_8v;
  461. non-removable;
  462. vmmc-supply = <&vcc_3v3>;
  463. vqmmc-supply = <&vcc_1v8>;
  464. status = "okay";
  465. };
  466. &sdmmc0 {
  467. broken-cd;
  468. bus-width = <4>;
  469. cap-sd-highspeed;
  470. disable-wp;
  471. pinctrl-names = "default";
  472. pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
  473. vqmmc-supply = <&vccio_sd>;
  474. status = "disabled";
  475. };
  476. &sdmmc1 {
  477. bus-width = <4>;
  478. cap-sd-highspeed;
  479. cap-sdio-irq;
  480. keep-power-in-suspend;
  481. mmc-pwrseq = <&sdio_pwrseq>;
  482. non-removable;
  483. pinctrl-names = "default";
  484. pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
  485. sd-uhs-sdr50;
  486. vmmc-supply = <&vcc3v3_sys>;
  487. vqmmc-supply = <&vcc_1v8>;
  488. status = "okay";
  489. };
  490. /*
  491. * spi3 is exposed on CM1 / Module1A
  492. * pin 37 - spi3_cs1_m0
  493. * pin 38 - spi3_clk_m0
  494. * pin 39 - spi3_cs0_m0
  495. * pin 40 - spi3_miso_m0, shared with i2s1_8ch
  496. * pin 44 - spi3_mosi_m0
  497. */
  498. &spi3 {
  499. status = "disabled";
  500. };
  501. &tsadc {
  502. status = "okay";
  503. };
  504. &uart1 {
  505. pinctrl-names = "default";
  506. pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn &uart1m0_rtsn>;
  507. uart-has-rtscts;
  508. status = "okay";
  509. bluetooth {
  510. compatible = "brcm,bcm43438-bt";
  511. clocks = <&rk809 1>;
  512. clock-names = "lpo";
  513. device-wakeup-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
  514. host-wakeup-gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
  515. shutdown-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
  516. pinctrl-names = "default";
  517. pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>;
  518. vbat-supply = <&vcc3v3_sys>;
  519. vddio-supply = <&vcca1v8_pmu>;
  520. };
  521. };
  522. /*
  523. * uart2 is exposed on CM1 / Module1A
  524. * pin 51 - uart2_rx_m0
  525. * pin 55 - uart2_tx_m0
  526. */
  527. &uart2 {
  528. status = "disabled";
  529. };
  530. /*
  531. * uart7 is exposed on CM1 / Module1A
  532. * pin 46 - uart7_tx_m2
  533. * pin 47 - uart7_rx_m2
  534. */
  535. &uart7 {
  536. pinctrl-names = "default";
  537. pinctrl-0 = <&uart7m2_xfer>;
  538. status = "disabled";
  539. };
  540. /* dwc3_otg is the only usb port available */
  541. &usb2phy0 {
  542. status = "disabled";
  543. };
  544. &usb2phy0_otg {
  545. status = "disabled";
  546. };
  547. &usb_host0_xhci {
  548. status = "disabled";
  549. };