rk3566-quartz64-b.dts 15 KB

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  1. // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2. /dts-v1/;
  3. #include <dt-bindings/gpio/gpio.h>
  4. #include <dt-bindings/pinctrl/rockchip.h>
  5. #include <dt-bindings/soc/rockchip,vop2.h>
  6. #include "rk3566.dtsi"
  7. / {
  8. model = "Pine64 RK3566 Quartz64-B Board";
  9. compatible = "pine64,quartz64-b", "rockchip,rk3566";
  10. aliases {
  11. ethernet0 = &gmac1;
  12. mmc0 = &sdmmc0;
  13. mmc1 = &sdhci;
  14. mmc2 = &sdmmc1;
  15. };
  16. chosen: chosen {
  17. stdout-path = "serial2:1500000n8";
  18. };
  19. gmac1_clkin: external-gmac1-clock {
  20. compatible = "fixed-clock";
  21. clock-frequency = <125000000>;
  22. clock-output-names = "gmac1_clkin";
  23. #clock-cells = <0>;
  24. };
  25. hdmi-con {
  26. compatible = "hdmi-connector";
  27. type = "a";
  28. port {
  29. hdmi_con_in: endpoint {
  30. remote-endpoint = <&hdmi_out_con>;
  31. };
  32. };
  33. };
  34. leds {
  35. compatible = "gpio-leds";
  36. led-user {
  37. label = "user-led";
  38. default-state = "on";
  39. gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
  40. linux,default-trigger = "heartbeat";
  41. pinctrl-names = "default";
  42. pinctrl-0 = <&user_led_enable_h>;
  43. retain-state-suspended;
  44. };
  45. };
  46. sound {
  47. compatible = "simple-audio-card";
  48. simple-audio-card,format = "i2s";
  49. simple-audio-card,name = "Analog RK809";
  50. simple-audio-card,mclk-fs = <256>;
  51. simple-audio-card,cpu {
  52. sound-dai = <&i2s1_8ch>;
  53. };
  54. simple-audio-card,codec {
  55. sound-dai = <&rk809>;
  56. };
  57. };
  58. sdio_pwrseq: sdio-pwrseq {
  59. status = "okay";
  60. compatible = "mmc-pwrseq-simple";
  61. clocks = <&rk809 1>;
  62. clock-names = "ext_clock";
  63. pinctrl-names = "default";
  64. pinctrl-0 = <&wifi_enable_h>;
  65. reset-gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_LOW>;
  66. post-power-on-delay-ms = <100>;
  67. power-off-delay-us = <5000000>;
  68. };
  69. vcc3v3_pcie_p: vcc3v3-pcie-p-regulator {
  70. compatible = "regulator-fixed";
  71. enable-active-high;
  72. gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
  73. pinctrl-names = "default";
  74. pinctrl-0 = <&pcie_enable_h>;
  75. regulator-name = "vcc3v3_pcie_p";
  76. regulator-min-microvolt = <3300000>;
  77. regulator-max-microvolt = <3300000>;
  78. vin-supply = <&vcc_3v3>;
  79. };
  80. vcc5v0_in: vcc5v0-in-regulator {
  81. compatible = "regulator-fixed";
  82. regulator-name = "vcc5v0_in";
  83. regulator-always-on;
  84. regulator-boot-on;
  85. regulator-min-microvolt = <5000000>;
  86. regulator-max-microvolt = <5000000>;
  87. };
  88. vcc5v0_sys: vcc5v0-sys-regulator {
  89. compatible = "regulator-fixed";
  90. regulator-name = "vcc5v0_sys";
  91. regulator-always-on;
  92. regulator-boot-on;
  93. regulator-min-microvolt = <5000000>;
  94. regulator-max-microvolt = <5000000>;
  95. vin-supply = <&vcc5v0_in>;
  96. };
  97. vcc3v3_sys: vcc3v3-sys-regulator {
  98. compatible = "regulator-fixed";
  99. regulator-name = "vcc3v3_sys";
  100. regulator-min-microvolt = <3300000>;
  101. regulator-max-microvolt = <3300000>;
  102. regulator-always-on;
  103. vin-supply = <&vcc5v0_sys>;
  104. };
  105. vcc5v0_usb30_host: vcc5v0-usb30-host-regulator {
  106. compatible = "regulator-fixed";
  107. regulator-name = "vcc5v0_usb30_host";
  108. enable-active-high;
  109. gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
  110. pinctrl-names = "default";
  111. pinctrl-0 = <&vcc5v0_usb30_host_en_h>;
  112. regulator-always-on;
  113. regulator-min-microvolt = <5000000>;
  114. regulator-max-microvolt = <5000000>;
  115. vin-supply = <&vcc5v0_sys>;
  116. };
  117. vcc5v0_usb_otg: vcc5v0-usb-otg-regulator {
  118. compatible = "regulator-fixed";
  119. regulator-name = "vcc5v0_usb_otg";
  120. enable-active-high;
  121. gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
  122. pinctrl-names = "default";
  123. pinctrl-0 = <&vcc5v0_usb_otg_en_h>;
  124. regulator-always-on;
  125. regulator-min-microvolt = <5000000>;
  126. regulator-max-microvolt = <5000000>;
  127. vin-supply = <&vcc5v0_sys>;
  128. };
  129. };
  130. &combphy1 {
  131. status = "okay";
  132. };
  133. &combphy2 {
  134. status = "okay";
  135. };
  136. &cpu0 {
  137. cpu-supply = <&vdd_cpu>;
  138. };
  139. &cpu1 {
  140. cpu-supply = <&vdd_cpu>;
  141. };
  142. &cpu2 {
  143. cpu-supply = <&vdd_cpu>;
  144. };
  145. &cpu3 {
  146. cpu-supply = <&vdd_cpu>;
  147. };
  148. &gmac1 {
  149. assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>;
  150. assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>, <&gmac1_clkin>;
  151. clock_in_out = "input";
  152. phy-mode = "rgmii";
  153. phy-supply = <&vcc_3v3>;
  154. pinctrl-names = "default";
  155. pinctrl-0 = <&gmac1m1_miim
  156. &gmac1m1_tx_bus2
  157. &gmac1m1_rx_bus2
  158. &gmac1m1_rgmii_clk
  159. &gmac1m1_clkinout
  160. &gmac1m1_rgmii_bus>;
  161. snps,reset-gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>;
  162. snps,reset-active-low;
  163. /* Reset time is 20ms, 100ms for rtl8211f, also works well here */
  164. snps,reset-delays-us = <0 20000 100000>;
  165. tx_delay = <0x4f>;
  166. rx_delay = <0x24>;
  167. phy-handle = <&rgmii_phy1>;
  168. status = "okay";
  169. };
  170. &gpu {
  171. mali-supply = <&vdd_gpu>;
  172. status = "okay";
  173. };
  174. &hdmi {
  175. avdd-0v9-supply = <&vdda0v9_image>;
  176. avdd-1v8-supply = <&vcca1v8_image>;
  177. status = "okay";
  178. };
  179. &hdmi_in {
  180. hdmi_in_vp0: endpoint {
  181. remote-endpoint = <&vp0_out_hdmi>;
  182. };
  183. };
  184. &hdmi_out {
  185. hdmi_out_con: endpoint {
  186. remote-endpoint = <&hdmi_con_in>;
  187. };
  188. };
  189. &hdmi_sound {
  190. status = "okay";
  191. };
  192. &i2c0 {
  193. status = "okay";
  194. vdd_cpu: regulator@1c {
  195. compatible = "tcs,tcs4525";
  196. reg = <0x1c>;
  197. fcs,suspend-voltage-selector = <1>;
  198. regulator-name = "vdd_cpu";
  199. regulator-min-microvolt = <800000>;
  200. regulator-max-microvolt = <1150000>;
  201. regulator-ramp-delay = <2300>;
  202. regulator-always-on;
  203. regulator-boot-on;
  204. vin-supply = <&vcc5v0_sys>;
  205. regulator-state-mem {
  206. regulator-off-in-suspend;
  207. };
  208. };
  209. rk809: pmic@20 {
  210. compatible = "rockchip,rk809";
  211. reg = <0x20>;
  212. interrupt-parent = <&gpio0>;
  213. interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
  214. assigned-clocks = <&cru I2S1_MCLKOUT_TX>;
  215. assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>;
  216. clock-names = "mclk";
  217. clocks = <&cru I2S1_MCLKOUT_TX>;
  218. clock-output-names = "rk808-clkout1", "rk808-clkout2";
  219. pinctrl-names = "default";
  220. pinctrl-0 = <&pmic_int>, <&i2s1m0_mclk>;
  221. rockchip,system-power-controller;
  222. #sound-dai-cells = <0>;
  223. wakeup-source;
  224. #clock-cells = <1>;
  225. vcc1-supply = <&vcc3v3_sys>;
  226. vcc2-supply = <&vcc3v3_sys>;
  227. vcc3-supply = <&vcc3v3_sys>;
  228. vcc4-supply = <&vcc3v3_sys>;
  229. vcc5-supply = <&vcc3v3_sys>;
  230. vcc6-supply = <&vcc3v3_sys>;
  231. vcc7-supply = <&vcc3v3_sys>;
  232. vcc8-supply = <&vcc3v3_sys>;
  233. vcc9-supply = <&vcc3v3_sys>;
  234. regulators {
  235. vdd_log: DCDC_REG1 {
  236. regulator-name = "vdd_log";
  237. regulator-always-on;
  238. regulator-boot-on;
  239. regulator-min-microvolt = <500000>;
  240. regulator-max-microvolt = <1350000>;
  241. regulator-init-microvolt = <900000>;
  242. regulator-ramp-delay = <6001>;
  243. regulator-state-mem {
  244. regulator-on-in-suspend;
  245. regulator-suspend-microvolt = <900000>;
  246. };
  247. };
  248. vdd_gpu: DCDC_REG2 {
  249. regulator-name = "vdd_gpu";
  250. regulator-always-on;
  251. regulator-boot-on;
  252. regulator-min-microvolt = <900000>;
  253. regulator-max-microvolt = <1350000>;
  254. regulator-init-microvolt = <900000>;
  255. regulator-ramp-delay = <6001>;
  256. regulator-state-mem {
  257. regulator-off-in-suspend;
  258. regulator-suspend-microvolt = <900000>;
  259. };
  260. };
  261. vcc_ddr: DCDC_REG3 {
  262. regulator-name = "vcc_ddr";
  263. regulator-always-on;
  264. regulator-boot-on;
  265. regulator-initial-mode = <0x2>;
  266. regulator-state-mem {
  267. regulator-on-in-suspend;
  268. };
  269. };
  270. vdd_npu: DCDC_REG4 {
  271. regulator-name = "vdd_npu";
  272. regulator-min-microvolt = <900000>;
  273. regulator-max-microvolt = <1350000>;
  274. regulator-initial-mode = <0x2>;
  275. regulator-state-mem {
  276. regulator-off-in-suspend;
  277. };
  278. };
  279. vcc_1v8: DCDC_REG5 {
  280. regulator-name = "vcc_1v8";
  281. regulator-always-on;
  282. regulator-boot-on;
  283. regulator-min-microvolt = <1800000>;
  284. regulator-max-microvolt = <1800000>;
  285. regulator-state-mem {
  286. regulator-on-in-suspend;
  287. regulator-suspend-microvolt = <1800000>;
  288. };
  289. };
  290. vdda0v9_image: LDO_REG1 {
  291. regulator-name = "vdda0v9_image";
  292. regulator-always-on;
  293. regulator-boot-on;
  294. regulator-min-microvolt = <900000>;
  295. regulator-max-microvolt = <900000>;
  296. regulator-state-mem {
  297. regulator-on-in-suspend;
  298. regulator-suspend-microvolt = <900000>;
  299. };
  300. };
  301. vdda_0v9: LDO_REG2 {
  302. regulator-name = "vdda_0v9";
  303. regulator-always-on;
  304. regulator-boot-on;
  305. regulator-min-microvolt = <900000>;
  306. regulator-max-microvolt = <900000>;
  307. regulator-state-mem {
  308. regulator-on-in-suspend;
  309. regulator-suspend-microvolt = <900000>;
  310. };
  311. };
  312. vdda0v9_pmu: LDO_REG3 {
  313. regulator-name = "vdda0v9_pmu";
  314. regulator-always-on;
  315. regulator-boot-on;
  316. regulator-min-microvolt = <900000>;
  317. regulator-max-microvolt = <900000>;
  318. regulator-state-mem {
  319. regulator-on-in-suspend;
  320. regulator-suspend-microvolt = <900000>;
  321. };
  322. };
  323. vccio_acodec: LDO_REG4 {
  324. regulator-name = "vccio_acodec";
  325. regulator-always-on;
  326. regulator-boot-on;
  327. regulator-min-microvolt = <3300000>;
  328. regulator-max-microvolt = <3300000>;
  329. regulator-state-mem {
  330. regulator-on-in-suspend;
  331. regulator-suspend-microvolt = <3300000>;
  332. };
  333. };
  334. vccio_sd: LDO_REG5 {
  335. regulator-name = "vccio_sd";
  336. regulator-always-on;
  337. regulator-boot-on;
  338. regulator-min-microvolt = <1800000>;
  339. regulator-max-microvolt = <3300000>;
  340. regulator-state-mem {
  341. regulator-on-in-suspend;
  342. regulator-suspend-microvolt = <3300000>;
  343. };
  344. };
  345. vcc3v3_pmu: LDO_REG6 {
  346. regulator-name = "vcc3v3_pmu";
  347. regulator-always-on;
  348. regulator-boot-on;
  349. regulator-min-microvolt = <3300000>;
  350. regulator-max-microvolt = <3300000>;
  351. regulator-state-mem {
  352. regulator-on-in-suspend;
  353. regulator-suspend-microvolt = <3300000>;
  354. };
  355. };
  356. vcca_1v8: LDO_REG7 {
  357. regulator-name = "vcca_1v8";
  358. regulator-always-on;
  359. regulator-boot-on;
  360. regulator-min-microvolt = <1800000>;
  361. regulator-max-microvolt = <1800000>;
  362. regulator-state-mem {
  363. regulator-on-in-suspend;
  364. regulator-suspend-microvolt = <1800000>;
  365. };
  366. };
  367. vcca1v8_pmu: LDO_REG8 {
  368. regulator-name = "vcca1v8_pmu";
  369. regulator-always-on;
  370. regulator-boot-on;
  371. regulator-min-microvolt = <1800000>;
  372. regulator-max-microvolt = <1800000>;
  373. regulator-state-mem {
  374. regulator-on-in-suspend;
  375. regulator-suspend-microvolt = <1800000>;
  376. };
  377. };
  378. vcca1v8_image: LDO_REG9 {
  379. regulator-name = "vcca1v8_image";
  380. regulator-always-on;
  381. regulator-boot-on;
  382. regulator-min-microvolt = <1800000>;
  383. regulator-max-microvolt = <1800000>;
  384. regulator-state-mem {
  385. regulator-on-in-suspend;
  386. regulator-suspend-microvolt = <1800000>;
  387. };
  388. };
  389. vcc_3v3: SWITCH_REG1 {
  390. regulator-boot-on;
  391. regulator-name = "vcc_3v3";
  392. };
  393. vcc3v3_sd: SWITCH_REG2 {
  394. regulator-name = "vcc3v3_sd";
  395. };
  396. };
  397. };
  398. };
  399. /* i2c2_m1 exposed on csi port, pulled up to vcc_3v3 */
  400. &i2c2 {
  401. pinctrl-names = "default";
  402. pinctrl-0 = <&i2c2m1_xfer>;
  403. status = "okay";
  404. };
  405. /* i2c3_m1 exposed on dsi port, pulled up to vcc_3v3 */
  406. &i2c3 {
  407. pinctrl-names = "default";
  408. pinctrl-0 = <&i2c3m1_xfer>;
  409. status = "okay";
  410. };
  411. /*
  412. * i2c4_m0 is exposed on PI40, pulled up to vcc_3v3
  413. * pin 27 - i2c4_sda_m0
  414. * pin 28 - i2c4_scl_m0
  415. */
  416. &i2c4 {
  417. status = "okay";
  418. };
  419. /*
  420. * i2c5_m0 is exposed on PI40
  421. * pin 29 - i2c5_scl_m0
  422. * pin 31 - i2c5_sda_m0
  423. */
  424. &i2c5 {
  425. status = "disabled";
  426. };
  427. &i2s0_8ch {
  428. status = "okay";
  429. };
  430. &i2s1_8ch {
  431. pinctrl-names = "default";
  432. pinctrl-0 = <&i2s1m0_sclktx
  433. &i2s1m0_lrcktx
  434. &i2s1m0_sdi0
  435. &i2s1m0_sdo0>;
  436. rockchip,trcm-sync-tx-only;
  437. status = "okay";
  438. };
  439. &mdio1 {
  440. rgmii_phy1: ethernet-phy@1 {
  441. compatible = "ethernet-phy-ieee802.3-c22";
  442. reg = <0x1>;
  443. };
  444. };
  445. &pcie2x1 {
  446. pinctrl-names = "default";
  447. pinctrl-0 = <&pcie_reset_h>;
  448. reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
  449. vpcie3v3-supply = <&vcc3v3_pcie_p>;
  450. status = "okay";
  451. };
  452. &pinctrl {
  453. bt {
  454. bt_enable_h: bt-enable-h {
  455. rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
  456. };
  457. bt_host_wake_l: bt-host-wake-l {
  458. rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_down>;
  459. };
  460. bt_wake_l: bt-wake-l {
  461. rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
  462. };
  463. };
  464. leds {
  465. user_led_enable_h: user-led-enable-h {
  466. rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
  467. };
  468. };
  469. pcie {
  470. pcie_enable_h: pcie-enable-h {
  471. rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
  472. };
  473. pcie_reset_h: pcie-reset-h {
  474. rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
  475. };
  476. };
  477. pmic {
  478. pmic_int: pmic_int {
  479. rockchip,pins =
  480. <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
  481. };
  482. };
  483. sdio-pwrseq {
  484. wifi_enable_h: wifi-enable-h {
  485. rockchip,pins = <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
  486. };
  487. };
  488. usb {
  489. vcc5v0_usb30_host_en_h: vcc5v0-usb30-host-en_h {
  490. rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
  491. };
  492. vcc5v0_usb_otg_en_h: vcc5v0-usb-otg-en_h {
  493. rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
  494. };
  495. };
  496. };
  497. &pmu_io_domains {
  498. status = "okay";
  499. pmuio1-supply = <&vcc3v3_pmu>;
  500. pmuio2-supply = <&vcca1v8_pmu>;
  501. vccio1-supply = <&vccio_acodec>;
  502. vccio2-supply = <&vcc_1v8>;
  503. vccio3-supply = <&vccio_sd>;
  504. vccio4-supply = <&vcca1v8_pmu>;
  505. vccio5-supply = <&vcc_3v3>;
  506. vccio6-supply = <&vcc_3v3>;
  507. vccio7-supply = <&vcc_3v3>;
  508. };
  509. &saradc {
  510. vref-supply = <&vcca_1v8>;
  511. status = "okay";
  512. };
  513. &sdhci {
  514. bus-width = <8>;
  515. mmc-hs200-1_8v;
  516. non-removable;
  517. vmmc-supply = <&vcc_3v3>;
  518. vqmmc-supply = <&vcc_1v8>;
  519. status = "okay";
  520. };
  521. &sdmmc0 {
  522. bus-width = <4>;
  523. cap-sd-highspeed;
  524. cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
  525. disable-wp;
  526. pinctrl-names = "default";
  527. pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
  528. sd-uhs-sdr50;
  529. vmmc-supply = <&vcc3v3_sd>;
  530. vqmmc-supply = <&vccio_sd>;
  531. status = "okay";
  532. };
  533. &sdmmc1 {
  534. bus-width = <4>;
  535. cap-sd-highspeed;
  536. cap-sdio-irq;
  537. keep-power-in-suspend;
  538. mmc-pwrseq = <&sdio_pwrseq>;
  539. non-removable;
  540. pinctrl-names = "default";
  541. pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
  542. vmmc-supply = <&vcc3v3_sys>;
  543. vqmmc-supply = <&vcca1v8_pmu>;
  544. status = "okay";
  545. };
  546. &sfc {
  547. pinctrl-0 = <&fspi_pins>;
  548. pinctrl-names = "default";
  549. #address-cells = <1>;
  550. #size-cells = <0>;
  551. status = "okay";
  552. flash@0 {
  553. compatible = "jedec,spi-nor";
  554. reg = <0>;
  555. spi-max-frequency = <24000000>;
  556. spi-rx-bus-width = <4>;
  557. spi-tx-bus-width = <1>;
  558. };
  559. };
  560. &tsadc {
  561. status = "okay";
  562. };
  563. &uart1 {
  564. pinctrl-names = "default";
  565. pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn &uart1m0_rtsn>;
  566. status = "okay";
  567. uart-has-rtscts;
  568. bluetooth {
  569. compatible = "brcm,bcm4345c5";
  570. clocks = <&rk809 1>;
  571. clock-names = "lpo";
  572. device-wakeup-gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>;
  573. host-wakeup-gpios = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>;
  574. shutdown-gpios = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>;
  575. pinctrl-names = "default";
  576. pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>;
  577. vbat-supply = <&vcc3v3_sys>;
  578. vddio-supply = <&vcca1v8_pmu>;
  579. };
  580. };
  581. /*
  582. * uart2_m0 is exposed on PI40
  583. * pin 8 - uart2_tx_m0
  584. * pin 10 - uart2_rx_m0
  585. */
  586. &uart2 {
  587. status = "okay";
  588. };
  589. &usb2phy0_host {
  590. phy-supply = <&vcc5v0_usb30_host>;
  591. status = "okay";
  592. };
  593. &usb2phy0_otg {
  594. phy-supply = <&vcc5v0_usb_otg>;
  595. status = "okay";
  596. };
  597. &usb2phy1_otg {
  598. phy-supply = <&vcc5v0_usb30_host>;
  599. status = "okay";
  600. };
  601. &usb2phy0 {
  602. status = "okay";
  603. };
  604. &usb2phy1 {
  605. status = "okay";
  606. };
  607. &usb_host0_xhci {
  608. status = "okay";
  609. };
  610. &usb_host1_xhci {
  611. status = "okay";
  612. };
  613. &usb_host0_ehci {
  614. status = "okay";
  615. };
  616. &usb_host0_ohci {
  617. status = "okay";
  618. };
  619. &vop {
  620. assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
  621. assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
  622. status = "okay";
  623. };
  624. &vop_mmu {
  625. status = "okay";
  626. };
  627. &vp0 {
  628. vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
  629. reg = <ROCKCHIP_VOP2_EP_HDMI0>;
  630. remote-endpoint = <&hdmi_in_vp0>;
  631. };
  632. };