rk3566-quartz64-a.dts 17 KB

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  1. // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2. /dts-v1/;
  3. #include <dt-bindings/gpio/gpio.h>
  4. #include <dt-bindings/pinctrl/rockchip.h>
  5. #include <dt-bindings/soc/rockchip,vop2.h>
  6. #include "rk3566.dtsi"
  7. / {
  8. model = "Pine64 RK3566 Quartz64-A Board";
  9. compatible = "pine64,quartz64-a", "rockchip,rk3566";
  10. aliases {
  11. ethernet0 = &gmac1;
  12. mmc0 = &sdmmc0;
  13. mmc1 = &sdhci;
  14. };
  15. chosen: chosen {
  16. stdout-path = "serial2:1500000n8";
  17. };
  18. gmac1_clkin: external-gmac1-clock {
  19. compatible = "fixed-clock";
  20. clock-frequency = <125000000>;
  21. clock-output-names = "gmac1_clkin";
  22. #clock-cells = <0>;
  23. };
  24. fan: gpio_fan {
  25. compatible = "gpio-fan";
  26. gpios = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
  27. gpio-fan,speed-map = <0 0
  28. 4500 1>;
  29. pinctrl-names = "default";
  30. pinctrl-0 = <&fan_en_h>;
  31. #cooling-cells = <2>;
  32. };
  33. hdmi-con {
  34. compatible = "hdmi-connector";
  35. type = "a";
  36. port {
  37. hdmi_con_in: endpoint {
  38. remote-endpoint = <&hdmi_out_con>;
  39. };
  40. };
  41. };
  42. leds {
  43. compatible = "gpio-leds";
  44. led-work {
  45. label = "work-led";
  46. default-state = "off";
  47. gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>;
  48. pinctrl-names = "default";
  49. pinctrl-0 = <&work_led_enable_h>;
  50. retain-state-suspended;
  51. };
  52. led-diy {
  53. label = "diy-led";
  54. default-state = "on";
  55. gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
  56. linux,default-trigger = "heartbeat";
  57. pinctrl-names = "default";
  58. pinctrl-0 = <&diy_led_enable_h>;
  59. retain-state-suspended;
  60. };
  61. };
  62. rk817-sound {
  63. compatible = "simple-audio-card";
  64. simple-audio-card,format = "i2s";
  65. simple-audio-card,name = "Analog RK817";
  66. simple-audio-card,mclk-fs = <256>;
  67. simple-audio-card,cpu {
  68. sound-dai = <&i2s1_8ch>;
  69. };
  70. simple-audio-card,codec {
  71. sound-dai = <&rk817>;
  72. };
  73. };
  74. sdio_pwrseq: sdio-pwrseq {
  75. compatible = "mmc-pwrseq-simple";
  76. clocks = <&rk817 1>;
  77. clock-names = "ext_clock";
  78. pinctrl-names = "default";
  79. pinctrl-0 = <&wifi_enable_h>;
  80. post-power-on-delay-ms = <100>;
  81. power-off-delay-us = <5000000>;
  82. reset-gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_LOW>;
  83. };
  84. spdif_dit: spdif-dit {
  85. compatible = "linux,spdif-dit";
  86. #sound-dai-cells = <0>;
  87. };
  88. spdif_sound: spdif-sound {
  89. compatible = "simple-audio-card";
  90. simple-audio-card,name = "SPDIF";
  91. simple-audio-card,cpu {
  92. sound-dai = <&spdif>;
  93. };
  94. simple-audio-card,codec {
  95. sound-dai = <&spdif_dit>;
  96. };
  97. };
  98. vcc12v_dcin: vcc12v_dcin {
  99. compatible = "regulator-fixed";
  100. regulator-name = "vcc12v_dcin";
  101. regulator-always-on;
  102. regulator-boot-on;
  103. regulator-min-microvolt = <12000000>;
  104. regulator-max-microvolt = <12000000>;
  105. };
  106. /* vbus feeds the rk817 usb input.
  107. * With no battery attached, also feeds vcc_bat+
  108. * via ON/OFF_BAT jumper
  109. */
  110. vbus: vbus {
  111. compatible = "regulator-fixed";
  112. regulator-name = "vbus";
  113. regulator-always-on;
  114. regulator-boot-on;
  115. regulator-min-microvolt = <5000000>;
  116. regulator-max-microvolt = <5000000>;
  117. vin-supply = <&vcc12v_dcin>;
  118. };
  119. vcc3v3_pcie_p: vcc3v3-pcie-p-regulator {
  120. compatible = "regulator-fixed";
  121. enable-active-high;
  122. gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
  123. pinctrl-names = "default";
  124. pinctrl-0 = <&pcie_enable_h>;
  125. regulator-name = "vcc3v3_pcie_p";
  126. regulator-min-microvolt = <3300000>;
  127. regulator-max-microvolt = <3300000>;
  128. vin-supply = <&vcc_3v3>;
  129. };
  130. vcc5v0_usb: vcc5v0_usb {
  131. compatible = "regulator-fixed";
  132. regulator-name = "vcc5v0_usb";
  133. regulator-always-on;
  134. regulator-boot-on;
  135. regulator-min-microvolt = <5000000>;
  136. regulator-max-microvolt = <5000000>;
  137. vin-supply = <&vcc12v_dcin>;
  138. };
  139. /* all four ports are controlled by one gpio
  140. * the host ports are sourced from vcc5v0_usb
  141. * the otg port is sourced from vcc5v0_midu
  142. */
  143. vcc5v0_usb20_host: vcc5v0_usb20_host {
  144. compatible = "regulator-fixed";
  145. enable-active-high;
  146. gpio = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>;
  147. pinctrl-names = "default";
  148. pinctrl-0 = <&vcc5v0_usb20_host_en>;
  149. regulator-name = "vcc5v0_usb20_host";
  150. regulator-min-microvolt = <5000000>;
  151. regulator-max-microvolt = <5000000>;
  152. vin-supply = <&vcc5v0_usb>;
  153. };
  154. vcc5v0_usb20_otg: vcc5v0_usb20_otg {
  155. compatible = "regulator-fixed";
  156. enable-active-high;
  157. gpio = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>;
  158. regulator-name = "vcc5v0_usb20_otg";
  159. regulator-min-microvolt = <5000000>;
  160. regulator-max-microvolt = <5000000>;
  161. vin-supply = <&dcdc_boost>;
  162. };
  163. vcc3v3_sd: vcc3v3_sd {
  164. compatible = "regulator-fixed";
  165. gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
  166. pinctrl-names = "default";
  167. pinctrl-0 = <&vcc_sd_h>;
  168. regulator-boot-on;
  169. regulator-name = "vcc3v3_sd";
  170. regulator-min-microvolt = <3300000>;
  171. regulator-max-microvolt = <3300000>;
  172. vin-supply = <&vcc_3v3>;
  173. };
  174. /* sourced from vbus and vcc_bat+ via rk817 sw5 */
  175. vcc_sys: vcc_sys {
  176. compatible = "regulator-fixed";
  177. regulator-name = "vcc_sys";
  178. regulator-always-on;
  179. regulator-boot-on;
  180. regulator-min-microvolt = <4400000>;
  181. regulator-max-microvolt = <4400000>;
  182. vin-supply = <&vbus>;
  183. };
  184. /* sourced from vcc_sys, sdio module operates internally at 3.3v */
  185. vcc_wl: vcc_wl {
  186. compatible = "regulator-fixed";
  187. regulator-name = "vcc_wl";
  188. regulator-always-on;
  189. regulator-boot-on;
  190. regulator-min-microvolt = <3300000>;
  191. regulator-max-microvolt = <3300000>;
  192. vin-supply = <&vcc_sys>;
  193. };
  194. };
  195. &combphy1 {
  196. status = "okay";
  197. };
  198. &combphy2 {
  199. status = "okay";
  200. };
  201. &cpu0 {
  202. cpu-supply = <&vdd_cpu>;
  203. };
  204. &cpu1 {
  205. cpu-supply = <&vdd_cpu>;
  206. };
  207. &cpu2 {
  208. cpu-supply = <&vdd_cpu>;
  209. };
  210. &cpu3 {
  211. cpu-supply = <&vdd_cpu>;
  212. };
  213. &cpu_thermal {
  214. trips {
  215. cpu_hot: cpu_hot {
  216. temperature = <55000>;
  217. hysteresis = <2000>;
  218. type = "active";
  219. };
  220. };
  221. cooling-maps {
  222. map1 {
  223. trip = <&cpu_hot>;
  224. cooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
  225. };
  226. };
  227. };
  228. &gmac1 {
  229. assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>;
  230. assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>, <&gmac1_clkin>;
  231. clock_in_out = "input";
  232. phy-supply = <&vcc_3v3>;
  233. phy-mode = "rgmii";
  234. pinctrl-names = "default";
  235. pinctrl-0 = <&gmac1m0_miim
  236. &gmac1m0_tx_bus2
  237. &gmac1m0_rx_bus2
  238. &gmac1m0_rgmii_clk
  239. &gmac1m0_clkinout
  240. &gmac1m0_rgmii_bus>;
  241. snps,reset-gpio = <&gpio0 RK_PC3 GPIO_ACTIVE_LOW>;
  242. snps,reset-active-low;
  243. /* Reset time is 20ms, 100ms for rtl8211f */
  244. snps,reset-delays-us = <0 20000 100000>;
  245. tx_delay = <0x30>;
  246. rx_delay = <0x10>;
  247. phy-handle = <&rgmii_phy1>;
  248. status = "okay";
  249. };
  250. &gpu {
  251. mali-supply = <&vdd_gpu>;
  252. status = "okay";
  253. };
  254. &hdmi {
  255. avdd-0v9-supply = <&vdda_0v9>;
  256. avdd-1v8-supply = <&vcc_1v8>;
  257. status = "okay";
  258. };
  259. &hdmi_in {
  260. hdmi_in_vp0: endpoint {
  261. remote-endpoint = <&vp0_out_hdmi>;
  262. };
  263. };
  264. &hdmi_out {
  265. hdmi_out_con: endpoint {
  266. remote-endpoint = <&hdmi_con_in>;
  267. };
  268. };
  269. &hdmi_sound {
  270. status = "okay";
  271. };
  272. &i2c0 {
  273. status = "okay";
  274. vdd_cpu: regulator@1c {
  275. compatible = "tcs,tcs4525";
  276. reg = <0x1c>;
  277. fcs,suspend-voltage-selector = <1>;
  278. regulator-name = "vdd_cpu";
  279. regulator-min-microvolt = <800000>;
  280. regulator-max-microvolt = <1150000>;
  281. regulator-ramp-delay = <2300>;
  282. regulator-always-on;
  283. regulator-boot-on;
  284. vin-supply = <&vcc_sys>;
  285. regulator-state-mem {
  286. regulator-off-in-suspend;
  287. };
  288. };
  289. rk817: pmic@20 {
  290. compatible = "rockchip,rk817";
  291. reg = <0x20>;
  292. interrupt-parent = <&gpio0>;
  293. interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
  294. assigned-clocks = <&cru I2S1_MCLKOUT_TX>;
  295. assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>;
  296. clock-names = "mclk";
  297. clocks = <&cru I2S1_MCLKOUT_TX>;
  298. clock-output-names = "rk808-clkout1", "rk808-clkout2";
  299. #clock-cells = <1>;
  300. pinctrl-names = "default";
  301. pinctrl-0 = <&pmic_int_l>, <&i2s1m0_mclk>;
  302. rockchip,system-power-controller;
  303. #sound-dai-cells = <0>;
  304. wakeup-source;
  305. vcc1-supply = <&vcc_sys>;
  306. vcc2-supply = <&vcc_sys>;
  307. vcc3-supply = <&vcc_sys>;
  308. vcc4-supply = <&vcc_sys>;
  309. vcc5-supply = <&vcc_sys>;
  310. vcc6-supply = <&vcc_sys>;
  311. vcc7-supply = <&vcc_sys>;
  312. vcc8-supply = <&vcc_sys>;
  313. vcc9-supply = <&dcdc_boost>;
  314. regulators {
  315. vdd_logic: DCDC_REG1 {
  316. regulator-always-on;
  317. regulator-boot-on;
  318. regulator-min-microvolt = <500000>;
  319. regulator-max-microvolt = <1350000>;
  320. regulator-init-microvolt = <900000>;
  321. regulator-ramp-delay = <6001>;
  322. regulator-initial-mode = <0x2>;
  323. regulator-name = "vdd_logic";
  324. regulator-state-mem {
  325. regulator-on-in-suspend;
  326. regulator-suspend-microvolt = <900000>;
  327. };
  328. };
  329. vdd_gpu: DCDC_REG2 {
  330. regulator-always-on;
  331. regulator-boot-on;
  332. regulator-min-microvolt = <500000>;
  333. regulator-max-microvolt = <1350000>;
  334. regulator-init-microvolt = <900000>;
  335. regulator-ramp-delay = <6001>;
  336. regulator-initial-mode = <0x2>;
  337. regulator-name = "vdd_gpu";
  338. regulator-state-mem {
  339. regulator-off-in-suspend;
  340. };
  341. };
  342. vcc_ddr: DCDC_REG3 {
  343. regulator-always-on;
  344. regulator-boot-on;
  345. regulator-initial-mode = <0x2>;
  346. regulator-name = "vcc_ddr";
  347. regulator-state-mem {
  348. regulator-on-in-suspend;
  349. };
  350. };
  351. vcc_3v3: DCDC_REG4 {
  352. regulator-always-on;
  353. regulator-boot-on;
  354. regulator-min-microvolt = <3300000>;
  355. regulator-max-microvolt = <3300000>;
  356. regulator-initial-mode = <0x2>;
  357. regulator-name = "vcc_3v3";
  358. regulator-state-mem {
  359. regulator-off-in-suspend;
  360. };
  361. };
  362. vcca1v8_pmu: LDO_REG1 {
  363. regulator-always-on;
  364. regulator-boot-on;
  365. regulator-min-microvolt = <1800000>;
  366. regulator-max-microvolt = <1800000>;
  367. regulator-name = "vcca1v8_pmu";
  368. regulator-state-mem {
  369. regulator-on-in-suspend;
  370. regulator-suspend-microvolt = <1800000>;
  371. };
  372. };
  373. vdda_0v9: LDO_REG2 {
  374. regulator-always-on;
  375. regulator-boot-on;
  376. regulator-min-microvolt = <900000>;
  377. regulator-max-microvolt = <900000>;
  378. regulator-name = "vdda_0v9";
  379. regulator-state-mem {
  380. regulator-off-in-suspend;
  381. };
  382. };
  383. vdda0v9_pmu: LDO_REG3 {
  384. regulator-always-on;
  385. regulator-boot-on;
  386. regulator-min-microvolt = <900000>;
  387. regulator-max-microvolt = <900000>;
  388. regulator-name = "vdda0v9_pmu";
  389. regulator-state-mem {
  390. regulator-on-in-suspend;
  391. regulator-suspend-microvolt = <900000>;
  392. };
  393. };
  394. vccio_acodec: LDO_REG4 {
  395. regulator-always-on;
  396. regulator-boot-on;
  397. regulator-min-microvolt = <3300000>;
  398. regulator-max-microvolt = <3300000>;
  399. regulator-name = "vccio_acodec";
  400. regulator-state-mem {
  401. regulator-off-in-suspend;
  402. };
  403. };
  404. vccio_sd: LDO_REG5 {
  405. regulator-always-on;
  406. regulator-boot-on;
  407. regulator-min-microvolt = <1800000>;
  408. regulator-max-microvolt = <3300000>;
  409. regulator-name = "vccio_sd";
  410. regulator-state-mem {
  411. regulator-off-in-suspend;
  412. };
  413. };
  414. vcc3v3_pmu: LDO_REG6 {
  415. regulator-always-on;
  416. regulator-boot-on;
  417. regulator-min-microvolt = <3300000>;
  418. regulator-max-microvolt = <3300000>;
  419. regulator-name = "vcc3v3_pmu";
  420. regulator-state-mem {
  421. regulator-on-in-suspend;
  422. regulator-suspend-microvolt = <3300000>;
  423. };
  424. };
  425. vcc_1v8: LDO_REG7 {
  426. regulator-always-on;
  427. regulator-boot-on;
  428. regulator-min-microvolt = <1800000>;
  429. regulator-max-microvolt = <1800000>;
  430. regulator-name = "vcc_1v8";
  431. regulator-state-mem {
  432. regulator-off-in-suspend;
  433. };
  434. };
  435. vcc1v8_dvp: LDO_REG8 {
  436. regulator-always-on;
  437. regulator-boot-on;
  438. regulator-min-microvolt = <1800000>;
  439. regulator-max-microvolt = <1800000>;
  440. regulator-name = "vcc1v8_dvp";
  441. regulator-state-mem {
  442. regulator-off-in-suspend;
  443. };
  444. };
  445. vcc2v8_dvp: LDO_REG9 {
  446. regulator-always-on;
  447. regulator-boot-on;
  448. regulator-min-microvolt = <2800000>;
  449. regulator-max-microvolt = <2800000>;
  450. regulator-name = "vcc2v8_dvp";
  451. regulator-state-mem {
  452. regulator-off-in-suspend;
  453. };
  454. };
  455. dcdc_boost: BOOST {
  456. regulator-always-on;
  457. regulator-boot-on;
  458. regulator-min-microvolt = <5000000>;
  459. regulator-max-microvolt = <5000000>;
  460. regulator-name = "boost";
  461. regulator-state-mem {
  462. regulator-off-in-suspend;
  463. };
  464. };
  465. otg_switch: OTG_SWITCH {
  466. regulator-name = "otg_switch";
  467. regulator-state-mem {
  468. regulator-off-in-suspend;
  469. };
  470. };
  471. };
  472. };
  473. };
  474. /* i2c3 is exposed on con40
  475. * pin 3 - i2c3_sda_m0, pullup to vcc_3v3
  476. * pin 5 - i2c3_scl_m0, pullup to vcc_3v3
  477. */
  478. &i2c3 {
  479. status = "okay";
  480. };
  481. &i2s0_8ch {
  482. status = "okay";
  483. };
  484. &i2s1_8ch {
  485. pinctrl-names = "default";
  486. pinctrl-0 = <&i2s1m0_sclktx
  487. &i2s1m0_lrcktx
  488. &i2s1m0_sdi0
  489. &i2s1m0_sdo0>;
  490. rockchip,trcm-sync-tx-only;
  491. status = "okay";
  492. };
  493. &mdio1 {
  494. rgmii_phy1: ethernet-phy@0 {
  495. compatible = "ethernet-phy-ieee802.3-c22";
  496. reg = <0>;
  497. };
  498. };
  499. &pcie2x1 {
  500. pinctrl-names = "default";
  501. pinctrl-0 = <&pcie_reset_h>;
  502. reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
  503. vpcie3v3-supply = <&vcc3v3_pcie_p>;
  504. status = "okay";
  505. };
  506. &pinctrl {
  507. bt {
  508. bt_enable_h: bt-enable-h {
  509. rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
  510. };
  511. bt_host_wake_l: bt-host-wake-l {
  512. rockchip,pins = <2 RK_PC0 RK_FUNC_GPIO &pcfg_pull_down>;
  513. };
  514. bt_wake_l: bt-wake-l {
  515. rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
  516. };
  517. };
  518. fan {
  519. fan_en_h: fan-en-h {
  520. rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
  521. };
  522. };
  523. leds {
  524. work_led_enable_h: work-led-enable-h {
  525. rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
  526. };
  527. diy_led_enable_h: diy-led-enable-h {
  528. rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
  529. };
  530. };
  531. pcie {
  532. pcie_enable_h: pcie-enable-h {
  533. rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
  534. };
  535. pcie_reset_h: pcie-reset-h {
  536. rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
  537. };
  538. };
  539. pmic {
  540. pmic_int_l: pmic-int-l {
  541. rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
  542. };
  543. };
  544. usb2 {
  545. vcc5v0_usb20_host_en: vcc5v0-usb20-host-en {
  546. rockchip,pins = <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
  547. };
  548. };
  549. sdio-pwrseq {
  550. wifi_enable_h: wifi-enable-h {
  551. rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
  552. };
  553. };
  554. vcc_sd {
  555. vcc_sd_h: vcc-sd-h {
  556. rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
  557. };
  558. };
  559. };
  560. &pmu_io_domains {
  561. pmuio1-supply = <&vcc3v3_pmu>;
  562. pmuio2-supply = <&vcc3v3_pmu>;
  563. vccio1-supply = <&vccio_acodec>;
  564. vccio2-supply = <&vcc_1v8>;
  565. vccio3-supply = <&vccio_sd>;
  566. vccio4-supply = <&vcc_1v8>;
  567. vccio5-supply = <&vcc_3v3>;
  568. vccio6-supply = <&vcc1v8_dvp>;
  569. vccio7-supply = <&vcc_3v3>;
  570. status = "okay";
  571. };
  572. &sdhci {
  573. bus-width = <8>;
  574. mmc-hs200-1_8v;
  575. non-removable;
  576. vmmc-supply = <&vcc_3v3>;
  577. vqmmc-supply = <&vcc_1v8>;
  578. status = "okay";
  579. };
  580. &sdmmc0 {
  581. bus-width = <4>;
  582. cap-sd-highspeed;
  583. cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
  584. disable-wp;
  585. pinctrl-names = "default";
  586. pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
  587. sd-uhs-sdr104;
  588. vmmc-supply = <&vcc3v3_sd>;
  589. vqmmc-supply = <&vccio_sd>;
  590. status = "okay";
  591. };
  592. &sdmmc1 {
  593. bus-width = <4>;
  594. cap-sd-highspeed;
  595. cap-sdio-irq;
  596. keep-power-in-suspend;
  597. mmc-pwrseq = <&sdio_pwrseq>;
  598. non-removable;
  599. pinctrl-names = "default";
  600. pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
  601. sd-uhs-sdr104;
  602. vmmc-supply = <&vcc_wl>;
  603. vqmmc-supply = <&vcc_1v8>;
  604. status = "okay";
  605. };
  606. &sfc {
  607. pinctrl-0 = <&fspi_pins>;
  608. pinctrl-names = "default";
  609. #address-cells = <1>;
  610. #size-cells = <0>;
  611. status = "disabled";
  612. flash@0 {
  613. compatible = "jedec,spi-nor";
  614. reg = <0>;
  615. spi-max-frequency = <24000000>;
  616. spi-rx-bus-width = <4>;
  617. spi-tx-bus-width = <1>;
  618. };
  619. };
  620. /* spdif is exposed on con40 pin 18 */
  621. &spdif {
  622. status = "okay";
  623. };
  624. /* spi1 is exposed on con40
  625. * pin 11 - spi1_mosi_m1
  626. * pin 13 - spi1_miso_m1
  627. * pin 15 - spi1_clk_m1
  628. * pin 17 - spi1_cs0_m1
  629. */
  630. &spi1 {
  631. pinctrl-names = "default";
  632. pinctrl-0 = <&spi1m1_cs0 &spi1m1_pins>;
  633. };
  634. &tsadc {
  635. /* tshut mode 0:CRU 1:GPIO */
  636. rockchip,hw-tshut-mode = <1>;
  637. /* tshut polarity 0:LOW 1:HIGH */
  638. rockchip,hw-tshut-polarity = <0>;
  639. status = "okay";
  640. };
  641. /* uart0 is exposed on con40
  642. * pin 12 - uart0_tx
  643. * pin 14 - uart0_rx
  644. */
  645. &uart0 {
  646. pinctrl-names = "default";
  647. pinctrl-0 = <&uart0_xfer>;
  648. status = "okay";
  649. };
  650. &uart1 {
  651. pinctrl-names = "default";
  652. pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn &uart1m0_rtsn>;
  653. status = "okay";
  654. uart-has-rtscts;
  655. bluetooth {
  656. compatible = "brcm,bcm43438-bt";
  657. clocks = <&rk817 1>;
  658. clock-names = "lpo";
  659. host-wakeup-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
  660. device-wakeup-gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
  661. shutdown-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
  662. pinctrl-names = "default";
  663. pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>;
  664. vbat-supply = <&vcc_sys>;
  665. vddio-supply = <&vcca1v8_pmu>;
  666. max-speed = <3000000>;
  667. };
  668. };
  669. /* uart2 is exposed on con40
  670. * pin 8 - uart2_tx_m0_debug
  671. * pin 10 - uart2_rx_m0_debug
  672. */
  673. &uart2 {
  674. status = "okay";
  675. };
  676. &usb_host0_ehci {
  677. status = "okay";
  678. };
  679. &usb_host0_ohci {
  680. status = "okay";
  681. };
  682. &usb_host1_ehci {
  683. status = "okay";
  684. };
  685. &usb_host1_ohci {
  686. status = "okay";
  687. };
  688. &usb_host0_xhci {
  689. dr_mode = "host";
  690. status = "okay";
  691. };
  692. /* usb3 controller is muxed with sata1 */
  693. &usb_host1_xhci {
  694. status = "okay";
  695. };
  696. &usb2phy0 {
  697. status = "okay";
  698. };
  699. &usb2phy0_host {
  700. phy-supply = <&vcc5v0_usb20_host>;
  701. status = "okay";
  702. };
  703. &usb2phy0_otg {
  704. phy-supply = <&vcc5v0_usb20_otg>;
  705. status = "okay";
  706. };
  707. &usb2phy1 {
  708. status = "okay";
  709. };
  710. &usb2phy1_host {
  711. phy-supply = <&vcc5v0_usb20_host>;
  712. status = "okay";
  713. };
  714. &usb2phy1_otg {
  715. phy-supply = <&vcc5v0_usb20_host>;
  716. status = "okay";
  717. };
  718. &vop {
  719. assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
  720. assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
  721. status = "okay";
  722. };
  723. &vop_mmu {
  724. status = "okay";
  725. };
  726. &vp0 {
  727. vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
  728. reg = <ROCKCHIP_VOP2_EP_HDMI0>;
  729. remote-endpoint = <&hdmi_in_vp0>;
  730. };
  731. };