rk3399-sapphire.dtsi 12 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653
  1. // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2. /*
  3. * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
  4. */
  5. #include "dt-bindings/pwm/pwm.h"
  6. #include "dt-bindings/input/input.h"
  7. #include "rk3399.dtsi"
  8. #include "rk3399-opp.dtsi"
  9. / {
  10. compatible = "rockchip,rk3399-sapphire", "rockchip,rk3399";
  11. aliases {
  12. mmc0 = &sdmmc;
  13. mmc1 = &sdhci;
  14. };
  15. chosen {
  16. stdout-path = "serial2:1500000n8";
  17. };
  18. clkin_gmac: external-gmac-clock {
  19. compatible = "fixed-clock";
  20. clock-frequency = <125000000>;
  21. clock-output-names = "clkin_gmac";
  22. #clock-cells = <0>;
  23. };
  24. dc_12v: dc-12v {
  25. compatible = "regulator-fixed";
  26. regulator-name = "dc_12v";
  27. regulator-always-on;
  28. regulator-boot-on;
  29. regulator-min-microvolt = <12000000>;
  30. regulator-max-microvolt = <12000000>;
  31. };
  32. /*
  33. * The fan power supply comes from the baseboard.
  34. * For the standalone Sapphire one option is to connect a wire
  35. * from R90030 DNP R0805 pin2 to C90002 10uF C0805 pin1 (vcc_sys).
  36. */
  37. fan0: gpio-fan {
  38. #cooling-cells = <2>;
  39. compatible = "gpio-fan";
  40. gpio-fan,speed-map = <0 0 3000 1>;
  41. gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_HIGH>;
  42. status = "okay";
  43. };
  44. keys: gpio-keys {
  45. compatible = "gpio-keys";
  46. autorepeat;
  47. key-power {
  48. debounce-interval = <100>;
  49. gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
  50. label = "GPIO Power";
  51. linux,code = <KEY_POWER>;
  52. linux,input-type = <1>;
  53. pinctrl-names = "default";
  54. pinctrl-0 = <&pwr_btn>;
  55. wakeup-source;
  56. };
  57. };
  58. /* switched by pmic_sleep */
  59. vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 {
  60. compatible = "regulator-fixed";
  61. regulator-name = "vcc1v8_s3";
  62. regulator-always-on;
  63. regulator-boot-on;
  64. regulator-min-microvolt = <1800000>;
  65. regulator-max-microvolt = <1800000>;
  66. vin-supply = <&vcc_1v8>;
  67. };
  68. vcc3v0_sd: vcc3v0-sd {
  69. compatible = "regulator-fixed";
  70. enable-active-high;
  71. gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>;
  72. pinctrl-names = "default";
  73. pinctrl-0 = <&sdmmc0_pwr_h>;
  74. regulator-always-on;
  75. regulator-max-microvolt = <3000000>;
  76. regulator-min-microvolt = <3000000>;
  77. regulator-name = "vcc3v0_sd";
  78. vin-supply = <&vcc3v3_sys>;
  79. };
  80. vcc3v3_sys: vcc3v3-sys {
  81. compatible = "regulator-fixed";
  82. regulator-name = "vcc3v3_sys";
  83. regulator-always-on;
  84. regulator-boot-on;
  85. regulator-min-microvolt = <3300000>;
  86. regulator-max-microvolt = <3300000>;
  87. vin-supply = <&vcc_sys>;
  88. };
  89. vcc5v0_host: vcc5v0-host-regulator {
  90. compatible = "regulator-fixed";
  91. enable-active-high;
  92. gpio = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>;
  93. pinctrl-names = "default";
  94. pinctrl-0 = <&vcc5v0_host_en>;
  95. regulator-name = "vcc5v0_host";
  96. regulator-always-on;
  97. vin-supply = <&vcc_sys>;
  98. };
  99. vcc5v0_typec0: vcc5v0-typec0-regulator {
  100. compatible = "regulator-fixed";
  101. enable-active-high;
  102. gpio = <&gpio2 RK_PA0 GPIO_ACTIVE_HIGH>;
  103. pinctrl-names = "default";
  104. pinctrl-0 = <&vcc5v0_typec0_en>;
  105. regulator-name = "vcc5v0_typec0";
  106. vin-supply = <&vcc_sys>;
  107. };
  108. vcc_sys: vcc-sys {
  109. compatible = "regulator-fixed";
  110. regulator-name = "vcc_sys";
  111. regulator-always-on;
  112. regulator-boot-on;
  113. regulator-min-microvolt = <5000000>;
  114. regulator-max-microvolt = <5000000>;
  115. vin-supply = <&dc_12v>;
  116. };
  117. vdd_log: vdd-log {
  118. compatible = "pwm-regulator";
  119. pwms = <&pwm2 0 25000 1>;
  120. pwm-supply = <&vcc_sys>;
  121. regulator-name = "vdd_log";
  122. regulator-always-on;
  123. regulator-boot-on;
  124. regulator-min-microvolt = <800000>;
  125. regulator-max-microvolt = <1400000>;
  126. };
  127. };
  128. &cpu_l0 {
  129. cpu-supply = <&vdd_cpu_l>;
  130. };
  131. &cpu_l1 {
  132. cpu-supply = <&vdd_cpu_l>;
  133. };
  134. &cpu_l2 {
  135. cpu-supply = <&vdd_cpu_l>;
  136. };
  137. &cpu_l3 {
  138. cpu-supply = <&vdd_cpu_l>;
  139. };
  140. &cpu_b0 {
  141. cpu-supply = <&vdd_cpu_b>;
  142. };
  143. &cpu_b1 {
  144. cpu-supply = <&vdd_cpu_b>;
  145. };
  146. &cpu_thermal {
  147. trips {
  148. cpu_hot: cpu_hot {
  149. hysteresis = <10000>;
  150. temperature = <55000>;
  151. type = "active";
  152. };
  153. };
  154. cooling-maps {
  155. map2 {
  156. cooling-device =
  157. <&fan0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
  158. trip = <&cpu_hot>;
  159. };
  160. };
  161. };
  162. &emmc_phy {
  163. status = "okay";
  164. };
  165. &gmac {
  166. assigned-clocks = <&cru SCLK_RMII_SRC>;
  167. assigned-clock-parents = <&clkin_gmac>;
  168. clock_in_out = "input";
  169. phy-supply = <&vcc_lan>;
  170. phy-mode = "rgmii";
  171. pinctrl-names = "default";
  172. pinctrl-0 = <&rgmii_pins>;
  173. snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
  174. snps,reset-active-low;
  175. snps,reset-delays-us = <0 10000 50000>;
  176. tx_delay = <0x28>;
  177. rx_delay = <0x11>;
  178. status = "okay";
  179. };
  180. &gpu {
  181. mali-supply = <&vdd_gpu>;
  182. status = "okay";
  183. };
  184. &hdmi {
  185. ddc-i2c-bus = <&i2c3>;
  186. status = "okay";
  187. };
  188. &hdmi_sound {
  189. status = "okay";
  190. };
  191. &i2c0 {
  192. clock-frequency = <400000>;
  193. i2c-scl-rising-time-ns = <168>;
  194. i2c-scl-falling-time-ns = <4>;
  195. status = "okay";
  196. rk808: pmic@1b {
  197. compatible = "rockchip,rk808";
  198. reg = <0x1b>;
  199. interrupt-parent = <&gpio1>;
  200. interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
  201. #clock-cells = <1>;
  202. clock-output-names = "xin32k", "rk808-clkout2";
  203. pinctrl-names = "default";
  204. pinctrl-0 = <&pmic_int_l>;
  205. rockchip,system-power-controller;
  206. wakeup-source;
  207. vcc1-supply = <&vcc_sys>;
  208. vcc2-supply = <&vcc_sys>;
  209. vcc3-supply = <&vcc_sys>;
  210. vcc4-supply = <&vcc_sys>;
  211. vcc6-supply = <&vcc_sys>;
  212. vcc7-supply = <&vcc_sys>;
  213. vcc8-supply = <&vcc3v3_sys>;
  214. vcc9-supply = <&vcc_sys>;
  215. vcc10-supply = <&vcc_sys>;
  216. vcc11-supply = <&vcc_sys>;
  217. vcc12-supply = <&vcc3v3_sys>;
  218. vddio-supply = <&vcc1v8_pmu>;
  219. regulators {
  220. vdd_center: DCDC_REG1 {
  221. regulator-name = "vdd_center";
  222. regulator-always-on;
  223. regulator-boot-on;
  224. regulator-min-microvolt = <750000>;
  225. regulator-max-microvolt = <1350000>;
  226. regulator-ramp-delay = <6001>;
  227. regulator-state-mem {
  228. regulator-off-in-suspend;
  229. };
  230. };
  231. vdd_cpu_l: DCDC_REG2 {
  232. regulator-name = "vdd_cpu_l";
  233. regulator-always-on;
  234. regulator-boot-on;
  235. regulator-min-microvolt = <750000>;
  236. regulator-max-microvolt = <1350000>;
  237. regulator-ramp-delay = <6001>;
  238. regulator-state-mem {
  239. regulator-off-in-suspend;
  240. };
  241. };
  242. vcc_ddr: DCDC_REG3 {
  243. regulator-name = "vcc_ddr";
  244. regulator-always-on;
  245. regulator-boot-on;
  246. regulator-state-mem {
  247. regulator-on-in-suspend;
  248. };
  249. };
  250. vcc_1v8: DCDC_REG4 {
  251. regulator-name = "vcc_1v8";
  252. regulator-always-on;
  253. regulator-boot-on;
  254. regulator-min-microvolt = <1800000>;
  255. regulator-max-microvolt = <1800000>;
  256. regulator-state-mem {
  257. regulator-on-in-suspend;
  258. regulator-suspend-microvolt = <1800000>;
  259. };
  260. };
  261. vcc1v8_dvp: LDO_REG1 {
  262. regulator-name = "vcc1v8_dvp";
  263. regulator-always-on;
  264. regulator-boot-on;
  265. regulator-min-microvolt = <1800000>;
  266. regulator-max-microvolt = <1800000>;
  267. regulator-state-mem {
  268. regulator-off-in-suspend;
  269. };
  270. };
  271. vcc3v0_tp: LDO_REG2 {
  272. regulator-name = "vcc3v0_tp";
  273. regulator-always-on;
  274. regulator-boot-on;
  275. regulator-min-microvolt = <3000000>;
  276. regulator-max-microvolt = <3000000>;
  277. regulator-state-mem {
  278. regulator-off-in-suspend;
  279. };
  280. };
  281. vcc1v8_pmu: LDO_REG3 {
  282. regulator-name = "vcc1v8_pmu";
  283. regulator-always-on;
  284. regulator-boot-on;
  285. regulator-min-microvolt = <1800000>;
  286. regulator-max-microvolt = <1800000>;
  287. regulator-state-mem {
  288. regulator-on-in-suspend;
  289. regulator-suspend-microvolt = <1800000>;
  290. };
  291. };
  292. vcc_sdio: LDO_REG4 {
  293. regulator-name = "vcc_sdio";
  294. regulator-always-on;
  295. regulator-boot-on;
  296. regulator-min-microvolt = <1800000>;
  297. regulator-max-microvolt = <3300000>;
  298. regulator-state-mem {
  299. regulator-on-in-suspend;
  300. regulator-suspend-microvolt = <3000000>;
  301. };
  302. };
  303. vcca3v0_codec: LDO_REG5 {
  304. regulator-name = "vcca3v0_codec";
  305. regulator-always-on;
  306. regulator-boot-on;
  307. regulator-min-microvolt = <3000000>;
  308. regulator-max-microvolt = <3000000>;
  309. regulator-state-mem {
  310. regulator-off-in-suspend;
  311. };
  312. };
  313. vcc_1v5: LDO_REG6 {
  314. regulator-name = "vcc_1v5";
  315. regulator-always-on;
  316. regulator-boot-on;
  317. regulator-min-microvolt = <1500000>;
  318. regulator-max-microvolt = <1500000>;
  319. regulator-state-mem {
  320. regulator-on-in-suspend;
  321. regulator-suspend-microvolt = <1500000>;
  322. };
  323. };
  324. vcca1v8_codec: LDO_REG7 {
  325. regulator-name = "vcca1v8_codec";
  326. regulator-always-on;
  327. regulator-boot-on;
  328. regulator-min-microvolt = <1800000>;
  329. regulator-max-microvolt = <1800000>;
  330. regulator-state-mem {
  331. regulator-off-in-suspend;
  332. };
  333. };
  334. vcc_3v0: LDO_REG8 {
  335. regulator-name = "vcc_3v0";
  336. regulator-always-on;
  337. regulator-boot-on;
  338. regulator-min-microvolt = <3000000>;
  339. regulator-max-microvolt = <3000000>;
  340. regulator-state-mem {
  341. regulator-on-in-suspend;
  342. regulator-suspend-microvolt = <3000000>;
  343. };
  344. };
  345. vcc3v3_s3: vcc_lan: SWITCH_REG1 {
  346. regulator-name = "vcc3v3_s3";
  347. regulator-always-on;
  348. regulator-boot-on;
  349. regulator-state-mem {
  350. regulator-off-in-suspend;
  351. };
  352. };
  353. vcc3v3_s0: SWITCH_REG2 {
  354. regulator-name = "vcc3v3_s0";
  355. regulator-always-on;
  356. regulator-boot-on;
  357. regulator-state-mem {
  358. regulator-off-in-suspend;
  359. };
  360. };
  361. };
  362. };
  363. vdd_cpu_b: regulator@40 {
  364. compatible = "silergy,syr827";
  365. reg = <0x40>;
  366. fcs,suspend-voltage-selector = <1>;
  367. regulator-name = "vdd_cpu_b";
  368. regulator-min-microvolt = <712500>;
  369. regulator-max-microvolt = <1500000>;
  370. regulator-ramp-delay = <1000>;
  371. regulator-always-on;
  372. regulator-boot-on;
  373. vin-supply = <&vcc_sys>;
  374. regulator-state-mem {
  375. regulator-off-in-suspend;
  376. };
  377. };
  378. vdd_gpu: regulator@41 {
  379. compatible = "silergy,syr828";
  380. reg = <0x41>;
  381. fcs,suspend-voltage-selector = <1>;
  382. regulator-name = "vdd_gpu";
  383. regulator-min-microvolt = <712500>;
  384. regulator-max-microvolt = <1500000>;
  385. regulator-ramp-delay = <1000>;
  386. regulator-always-on;
  387. regulator-boot-on;
  388. vin-supply = <&vcc_sys>;
  389. regulator-state-mem {
  390. regulator-off-in-suspend;
  391. };
  392. };
  393. };
  394. &i2c3 {
  395. i2c-scl-rising-time-ns = <450>;
  396. i2c-scl-falling-time-ns = <15>;
  397. status = "okay";
  398. };
  399. &i2s2 {
  400. status = "okay";
  401. };
  402. &io_domains {
  403. status = "okay";
  404. bt656-supply = <&vcc_3v0>;
  405. audio-supply = <&vcca1v8_codec>;
  406. sdmmc-supply = <&vcc_sdio>;
  407. gpio1830-supply = <&vcc_3v0>;
  408. };
  409. &pmu_io_domains {
  410. pmu1830-supply = <&vcc_3v0>;
  411. status = "okay";
  412. };
  413. &pinctrl {
  414. buttons {
  415. pwr_btn: pwr-btn {
  416. rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
  417. };
  418. };
  419. fan {
  420. motor_pwr: motor-pwr {
  421. rockchip,pins =
  422. <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
  423. };
  424. };
  425. pmic {
  426. pmic_int_l: pmic-int-l {
  427. rockchip,pins =
  428. <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
  429. };
  430. vsel1_pin: vsel1-pin {
  431. rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
  432. };
  433. vsel2_pin: vsel2-pin {
  434. rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
  435. };
  436. };
  437. sd {
  438. sdmmc0_pwr_h: sdmmc0-pwr-h {
  439. rockchip,pins =
  440. <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
  441. };
  442. };
  443. usb2 {
  444. vcc5v0_host_en: vcc5v0-host-en {
  445. rockchip,pins =
  446. <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
  447. };
  448. vcc5v0_typec0_en: vcc5v0-typec0-en {
  449. rockchip,pins =
  450. <2 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
  451. };
  452. };
  453. };
  454. &pwm0 {
  455. status = "okay";
  456. };
  457. &pwm2 {
  458. status = "okay";
  459. };
  460. &saradc {
  461. vref-supply = <&vcca1v8_s3>;
  462. status = "okay";
  463. };
  464. &sdhci {
  465. bus-width = <8>;
  466. mmc-hs400-1_8v;
  467. mmc-hs400-enhanced-strobe;
  468. non-removable;
  469. status = "okay";
  470. };
  471. &sdmmc {
  472. broken-cd;
  473. bus-width = <4>;
  474. cap-mmc-highspeed;
  475. cap-sd-highspeed;
  476. clock-frequency = <150000000>;
  477. disable-wp;
  478. max-frequency = <150000000>;
  479. pinctrl-names = "default";
  480. pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
  481. vmmc-supply = <&vcc3v0_sd>;
  482. vqmmc-supply = <&vcc_sdio>;
  483. status = "okay";
  484. };
  485. &tcphy0 {
  486. status = "okay";
  487. };
  488. &tcphy1 {
  489. status = "okay";
  490. };
  491. &tsadc {
  492. /* tshut mode 0:CRU 1:GPIO */
  493. rockchip,hw-tshut-mode = <1>;
  494. /* tshut polarity 0:LOW 1:HIGH */
  495. rockchip,hw-tshut-polarity = <1>;
  496. status = "okay";
  497. };
  498. &u2phy0 {
  499. status = "okay";
  500. u2phy0_otg: otg-port {
  501. status = "okay";
  502. };
  503. u2phy0_host: host-port {
  504. phy-supply = <&vcc5v0_typec0>;
  505. status = "okay";
  506. };
  507. };
  508. &u2phy1 {
  509. status = "okay";
  510. u2phy1_otg: otg-port {
  511. status = "okay";
  512. };
  513. u2phy1_host: host-port {
  514. phy-supply = <&vcc5v0_host>;
  515. status = "okay";
  516. };
  517. };
  518. &uart0 {
  519. pinctrl-names = "default";
  520. pinctrl-0 = <&uart0_xfer &uart0_cts>;
  521. status = "okay";
  522. };
  523. &uart2 {
  524. status = "okay";
  525. };
  526. &usb_host0_ehci {
  527. status = "okay";
  528. };
  529. &usb_host0_ohci {
  530. status = "okay";
  531. };
  532. &usb_host1_ehci {
  533. status = "okay";
  534. };
  535. &usb_host1_ohci {
  536. status = "okay";
  537. };
  538. &usbdrd3_0 {
  539. status = "okay";
  540. };
  541. &usbdrd_dwc3_0 {
  542. status = "okay";
  543. dr_mode = "host";
  544. };
  545. &usbdrd3_1 {
  546. status = "okay";
  547. };
  548. &usbdrd_dwc3_1 {
  549. status = "okay";
  550. dr_mode = "host";
  551. };
  552. &vopb {
  553. status = "okay";
  554. };
  555. &vopb_mmu {
  556. status = "okay";
  557. };
  558. &vopl {
  559. status = "okay";
  560. };
  561. &vopl_mmu {
  562. status = "okay";
  563. };