rk3399-nanopi4.dtsi 15 KB

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  1. // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2. /*
  3. * RK3399-based FriendlyElec boards device tree source
  4. *
  5. * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
  6. *
  7. * Copyright (c) 2018 FriendlyElec Computer Tech. Co., Ltd.
  8. * (http://www.friendlyarm.com)
  9. *
  10. * Copyright (c) 2018 Collabora Ltd.
  11. * Copyright (c) 2019 Arm Ltd.
  12. */
  13. /dts-v1/;
  14. #include <dt-bindings/input/linux-event-codes.h>
  15. #include "rk3399.dtsi"
  16. #include "rk3399-opp.dtsi"
  17. / {
  18. aliases {
  19. mmc0 = &sdio0;
  20. mmc1 = &sdmmc;
  21. mmc2 = &sdhci;
  22. };
  23. chosen {
  24. stdout-path = "serial2:1500000n8";
  25. };
  26. clkin_gmac: external-gmac-clock {
  27. compatible = "fixed-clock";
  28. clock-frequency = <125000000>;
  29. clock-output-names = "clkin_gmac";
  30. #clock-cells = <0>;
  31. };
  32. vcc3v3_sys: vcc3v3-sys {
  33. compatible = "regulator-fixed";
  34. regulator-always-on;
  35. regulator-boot-on;
  36. regulator-min-microvolt = <3300000>;
  37. regulator-max-microvolt = <3300000>;
  38. regulator-name = "vcc3v3_sys";
  39. };
  40. vcc5v0_sys: vcc5v0-sys {
  41. compatible = "regulator-fixed";
  42. regulator-always-on;
  43. regulator-boot-on;
  44. regulator-min-microvolt = <5000000>;
  45. regulator-max-microvolt = <5000000>;
  46. regulator-name = "vcc5v0_sys";
  47. vin-supply = <&vdd_5v>;
  48. };
  49. /* switched by pmic_sleep */
  50. vcc1v8_s3: vcc1v8-s3 {
  51. compatible = "regulator-fixed";
  52. regulator-always-on;
  53. regulator-boot-on;
  54. regulator-min-microvolt = <1800000>;
  55. regulator-max-microvolt = <1800000>;
  56. regulator-name = "vcc1v8_s3";
  57. vin-supply = <&vcc_1v8>;
  58. };
  59. vcc3v0_sd: vcc3v0-sd {
  60. compatible = "regulator-fixed";
  61. enable-active-high;
  62. gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>;
  63. pinctrl-names = "default";
  64. pinctrl-0 = <&sdmmc0_pwr_h>;
  65. regulator-always-on;
  66. regulator-min-microvolt = <3000000>;
  67. regulator-max-microvolt = <3000000>;
  68. regulator-name = "vcc3v0_sd";
  69. vin-supply = <&vcc3v3_sys>;
  70. };
  71. /*
  72. * Really, this is supplied by vcc_1v8, and vcc1v8_s3 only
  73. * drives the enable pin, but we can't quite model that.
  74. */
  75. vcca0v9_s3: vcca0v9-s3 {
  76. compatible = "regulator-fixed";
  77. regulator-min-microvolt = <900000>;
  78. regulator-max-microvolt = <900000>;
  79. regulator-name = "vcca0v9_s3";
  80. vin-supply = <&vcc1v8_s3>;
  81. };
  82. /* As above, actually supplied by vcc3v3_sys */
  83. vcca1v8_s3: vcca1v8-s3 {
  84. compatible = "regulator-fixed";
  85. regulator-min-microvolt = <1800000>;
  86. regulator-max-microvolt = <1800000>;
  87. regulator-name = "vcca1v8_s3";
  88. vin-supply = <&vcc1v8_s3>;
  89. };
  90. vbus_typec: vbus-typec {
  91. compatible = "regulator-fixed";
  92. regulator-min-microvolt = <5000000>;
  93. regulator-max-microvolt = <5000000>;
  94. regulator-name = "vbus_typec";
  95. };
  96. gpio-keys {
  97. compatible = "gpio-keys";
  98. autorepeat;
  99. pinctrl-names = "default";
  100. pinctrl-0 = <&power_key>;
  101. key-power {
  102. debounce-interval = <100>;
  103. gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
  104. label = "GPIO Key Power";
  105. linux,code = <KEY_POWER>;
  106. wakeup-source;
  107. };
  108. };
  109. leds: gpio-leds {
  110. compatible = "gpio-leds";
  111. pinctrl-names = "default";
  112. pinctrl-0 = <&status_led_pin>;
  113. status_led: led-0 {
  114. gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;
  115. label = "status_led";
  116. linux,default-trigger = "heartbeat";
  117. };
  118. };
  119. sdio_pwrseq: sdio-pwrseq {
  120. compatible = "mmc-pwrseq-simple";
  121. clocks = <&rk808 1>;
  122. clock-names = "ext_clock";
  123. pinctrl-names = "default";
  124. pinctrl-0 = <&wifi_reg_on_h>;
  125. reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
  126. };
  127. };
  128. &cpu_b0 {
  129. cpu-supply = <&vdd_cpu_b>;
  130. };
  131. &cpu_b1 {
  132. cpu-supply = <&vdd_cpu_b>;
  133. };
  134. &cpu_l0 {
  135. cpu-supply = <&vdd_cpu_l>;
  136. };
  137. &cpu_l1 {
  138. cpu-supply = <&vdd_cpu_l>;
  139. };
  140. &cpu_l2 {
  141. cpu-supply = <&vdd_cpu_l>;
  142. };
  143. &cpu_l3 {
  144. cpu-supply = <&vdd_cpu_l>;
  145. };
  146. &emmc_phy {
  147. rockchip,enable-strobe-pulldown;
  148. status = "okay";
  149. };
  150. &gmac {
  151. assigned-clock-parents = <&clkin_gmac>;
  152. assigned-clocks = <&cru SCLK_RMII_SRC>;
  153. clock_in_out = "input";
  154. pinctrl-names = "default";
  155. pinctrl-0 = <&rgmii_pins>, <&phy_intb>, <&phy_rstb>;
  156. phy-handle = <&rtl8211e>;
  157. phy-mode = "rgmii";
  158. phy-supply = <&vcc3v3_s3>;
  159. tx_delay = <0x28>;
  160. rx_delay = <0x11>;
  161. status = "okay";
  162. mdio {
  163. compatible = "snps,dwmac-mdio";
  164. #address-cells = <1>;
  165. #size-cells = <0>;
  166. rtl8211e: ethernet-phy@1 {
  167. reg = <1>;
  168. interrupt-parent = <&gpio3>;
  169. interrupts = <RK_PB2 IRQ_TYPE_LEVEL_LOW>;
  170. reset-assert-us = <10000>;
  171. reset-deassert-us = <30000>;
  172. reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
  173. };
  174. };
  175. };
  176. &gpu {
  177. mali-supply = <&vdd_gpu>;
  178. status = "okay";
  179. };
  180. &hdmi {
  181. ddc-i2c-bus = <&i2c7>;
  182. pinctrl-names = "default";
  183. pinctrl-0 = <&hdmi_cec>;
  184. status = "okay";
  185. };
  186. &hdmi_sound {
  187. status = "okay";
  188. };
  189. &i2c0 {
  190. clock-frequency = <400000>;
  191. i2c-scl-rising-time-ns = <160>;
  192. i2c-scl-falling-time-ns = <30>;
  193. status = "okay";
  194. vdd_cpu_b: regulator@40 {
  195. compatible = "silergy,syr827";
  196. reg = <0x40>;
  197. fcs,suspend-voltage-selector = <1>;
  198. pinctrl-names = "default";
  199. pinctrl-0 = <&cpu_b_sleep>;
  200. regulator-always-on;
  201. regulator-boot-on;
  202. regulator-min-microvolt = <712500>;
  203. regulator-max-microvolt = <1500000>;
  204. regulator-name = "vdd_cpu_b";
  205. regulator-ramp-delay = <1000>;
  206. vin-supply = <&vcc3v3_sys>;
  207. regulator-state-mem {
  208. regulator-off-in-suspend;
  209. };
  210. };
  211. vdd_gpu: regulator@41 {
  212. compatible = "silergy,syr828";
  213. reg = <0x41>;
  214. fcs,suspend-voltage-selector = <1>;
  215. pinctrl-names = "default";
  216. pinctrl-0 = <&gpu_sleep>;
  217. regulator-always-on;
  218. regulator-boot-on;
  219. regulator-min-microvolt = <712500>;
  220. regulator-max-microvolt = <1500000>;
  221. regulator-name = "vdd_gpu";
  222. regulator-ramp-delay = <1000>;
  223. vin-supply = <&vcc3v3_sys>;
  224. regulator-state-mem {
  225. regulator-off-in-suspend;
  226. };
  227. };
  228. rk808: pmic@1b {
  229. compatible = "rockchip,rk808";
  230. reg = <0x1b>;
  231. clock-output-names = "xin32k", "rtc_clko_wifi";
  232. #clock-cells = <1>;
  233. interrupt-parent = <&gpio1>;
  234. interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
  235. pinctrl-names = "default";
  236. pinctrl-0 = <&pmic_int_l>, <&ap_pwroff>, <&clk_32k>;
  237. rockchip,system-power-controller;
  238. wakeup-source;
  239. vcc1-supply = <&vcc3v3_sys>;
  240. vcc2-supply = <&vcc3v3_sys>;
  241. vcc3-supply = <&vcc3v3_sys>;
  242. vcc4-supply = <&vcc3v3_sys>;
  243. vcc6-supply = <&vcc3v3_sys>;
  244. vcc7-supply = <&vcc3v3_sys>;
  245. vcc8-supply = <&vcc3v3_sys>;
  246. vcc9-supply = <&vcc3v3_sys>;
  247. vcc10-supply = <&vcc3v3_sys>;
  248. vcc11-supply = <&vcc3v3_sys>;
  249. vcc12-supply = <&vcc3v3_sys>;
  250. vddio-supply = <&vcc_3v0>;
  251. regulators {
  252. vdd_center: DCDC_REG1 {
  253. regulator-always-on;
  254. regulator-boot-on;
  255. regulator-min-microvolt = <750000>;
  256. regulator-max-microvolt = <1350000>;
  257. regulator-name = "vdd_center";
  258. regulator-ramp-delay = <6001>;
  259. regulator-state-mem {
  260. regulator-off-in-suspend;
  261. };
  262. };
  263. vdd_cpu_l: DCDC_REG2 {
  264. regulator-always-on;
  265. regulator-boot-on;
  266. regulator-min-microvolt = <750000>;
  267. regulator-max-microvolt = <1350000>;
  268. regulator-name = "vdd_cpu_l";
  269. regulator-ramp-delay = <6001>;
  270. regulator-state-mem {
  271. regulator-off-in-suspend;
  272. };
  273. };
  274. vcc_ddr: DCDC_REG3 {
  275. regulator-always-on;
  276. regulator-boot-on;
  277. regulator-name = "vcc_ddr";
  278. regulator-state-mem {
  279. regulator-on-in-suspend;
  280. };
  281. };
  282. vcc_1v8: DCDC_REG4 {
  283. regulator-always-on;
  284. regulator-boot-on;
  285. regulator-min-microvolt = <1800000>;
  286. regulator-max-microvolt = <1800000>;
  287. regulator-name = "vcc_1v8";
  288. regulator-state-mem {
  289. regulator-on-in-suspend;
  290. regulator-suspend-microvolt = <1800000>;
  291. };
  292. };
  293. vcc1v8_cam: LDO_REG1 {
  294. regulator-always-on;
  295. regulator-boot-on;
  296. regulator-min-microvolt = <1800000>;
  297. regulator-max-microvolt = <1800000>;
  298. regulator-name = "vcc1v8_cam";
  299. regulator-state-mem {
  300. regulator-off-in-suspend;
  301. };
  302. };
  303. vcc3v0_touch: LDO_REG2 {
  304. regulator-always-on;
  305. regulator-boot-on;
  306. regulator-min-microvolt = <3000000>;
  307. regulator-max-microvolt = <3000000>;
  308. regulator-name = "vcc3v0_touch";
  309. regulator-state-mem {
  310. regulator-off-in-suspend;
  311. };
  312. };
  313. vcc1v8_pmupll: LDO_REG3 {
  314. regulator-always-on;
  315. regulator-boot-on;
  316. regulator-min-microvolt = <1800000>;
  317. regulator-max-microvolt = <1800000>;
  318. regulator-name = "vcc1v8_pmupll";
  319. regulator-state-mem {
  320. regulator-on-in-suspend;
  321. regulator-suspend-microvolt = <1800000>;
  322. };
  323. };
  324. vcc_sdio: LDO_REG4 {
  325. regulator-always-on;
  326. regulator-boot-on;
  327. regulator-init-microvolt = <3000000>;
  328. regulator-min-microvolt = <1800000>;
  329. regulator-max-microvolt = <3300000>;
  330. regulator-name = "vcc_sdio";
  331. regulator-state-mem {
  332. regulator-on-in-suspend;
  333. regulator-suspend-microvolt = <3000000>;
  334. };
  335. };
  336. vcca3v0_codec: LDO_REG5 {
  337. regulator-always-on;
  338. regulator-boot-on;
  339. regulator-min-microvolt = <3000000>;
  340. regulator-max-microvolt = <3000000>;
  341. regulator-name = "vcca3v0_codec";
  342. regulator-state-mem {
  343. regulator-off-in-suspend;
  344. };
  345. };
  346. vcc_1v5: LDO_REG6 {
  347. regulator-always-on;
  348. regulator-boot-on;
  349. regulator-min-microvolt = <1500000>;
  350. regulator-max-microvolt = <1500000>;
  351. regulator-name = "vcc_1v5";
  352. regulator-state-mem {
  353. regulator-on-in-suspend;
  354. regulator-suspend-microvolt = <1500000>;
  355. };
  356. };
  357. vcca1v8_codec: LDO_REG7 {
  358. regulator-always-on;
  359. regulator-boot-on;
  360. regulator-min-microvolt = <1800000>;
  361. regulator-max-microvolt = <1800000>;
  362. regulator-name = "vcca1v8_codec";
  363. regulator-state-mem {
  364. regulator-off-in-suspend;
  365. };
  366. };
  367. vcc_3v0: LDO_REG8 {
  368. regulator-always-on;
  369. regulator-boot-on;
  370. regulator-min-microvolt = <3000000>;
  371. regulator-max-microvolt = <3000000>;
  372. regulator-name = "vcc_3v0";
  373. regulator-state-mem {
  374. regulator-on-in-suspend;
  375. regulator-suspend-microvolt = <3000000>;
  376. };
  377. };
  378. vcc3v3_s3: SWITCH_REG1 {
  379. regulator-always-on;
  380. regulator-boot-on;
  381. regulator-name = "vcc3v3_s3";
  382. regulator-state-mem {
  383. regulator-off-in-suspend;
  384. };
  385. };
  386. vcc3v3_s0: SWITCH_REG2 {
  387. regulator-always-on;
  388. regulator-boot-on;
  389. regulator-name = "vcc3v3_s0";
  390. regulator-state-mem {
  391. regulator-off-in-suspend;
  392. };
  393. };
  394. };
  395. };
  396. };
  397. &i2c1 {
  398. clock-frequency = <200000>;
  399. i2c-scl-rising-time-ns = <150>;
  400. i2c-scl-falling-time-ns = <30>;
  401. status = "okay";
  402. };
  403. &i2c2 {
  404. status = "okay";
  405. };
  406. &i2c4 {
  407. clock-frequency = <400000>;
  408. i2c-scl-rising-time-ns = <160>;
  409. i2c-scl-falling-time-ns = <30>;
  410. status = "okay";
  411. fusb0: typec-portc@22 {
  412. compatible = "fcs,fusb302";
  413. reg = <0x22>;
  414. interrupt-parent = <&gpio1>;
  415. interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>;
  416. pinctrl-names = "default";
  417. pinctrl-0 = <&fusb0_int>;
  418. vbus-supply = <&vbus_typec>;
  419. };
  420. };
  421. &i2c7 {
  422. status = "okay";
  423. };
  424. &i2s2 {
  425. status = "okay";
  426. };
  427. &io_domains {
  428. bt656-supply = <&vcc_1v8>;
  429. audio-supply = <&vcca1v8_codec>;
  430. sdmmc-supply = <&vcc_sdio>;
  431. gpio1830-supply = <&vcc_3v0>;
  432. status = "okay";
  433. };
  434. &pcie_phy {
  435. assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>;
  436. assigned-clock-rates = <100000000>;
  437. assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
  438. status = "okay";
  439. };
  440. &pcie0 {
  441. num-lanes = <2>;
  442. vpcie0v9-supply = <&vcca0v9_s3>;
  443. vpcie1v8-supply = <&vcca1v8_s3>;
  444. status = "okay";
  445. };
  446. &pinctrl {
  447. fusb30x {
  448. fusb0_int: fusb0-int {
  449. rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
  450. };
  451. };
  452. gpio-leds {
  453. status_led_pin: status-led-pin {
  454. rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
  455. };
  456. };
  457. gmac {
  458. phy_intb: phy-intb {
  459. rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
  460. };
  461. phy_rstb: phy-rstb {
  462. rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
  463. };
  464. };
  465. pmic {
  466. cpu_b_sleep: cpu-b-sleep {
  467. rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
  468. };
  469. gpu_sleep: gpu-sleep {
  470. rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
  471. };
  472. pmic_int_l: pmic-int-l {
  473. rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
  474. };
  475. };
  476. rockchip-key {
  477. power_key: power-key {
  478. rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
  479. };
  480. };
  481. sdio {
  482. bt_host_wake_l: bt-host-wake-l {
  483. rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
  484. };
  485. bt_reg_on_h: bt-reg-on-h {
  486. /* external pullup to VCC1V8_PMUPLL */
  487. rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
  488. };
  489. bt_wake_l: bt-wake-l {
  490. rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
  491. };
  492. wifi_reg_on_h: wifi-reg_on-h {
  493. rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
  494. };
  495. };
  496. sdmmc {
  497. sdmmc0_det_l: sdmmc0-det-l {
  498. rockchip,pins = <0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>;
  499. };
  500. sdmmc0_pwr_h: sdmmc0-pwr-h {
  501. rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
  502. };
  503. };
  504. };
  505. &pmu_io_domains {
  506. pmu1830-supply = <&vcc_3v0>;
  507. status = "okay";
  508. };
  509. &pwm0 {
  510. status = "okay";
  511. };
  512. &pwm1 {
  513. status = "okay";
  514. };
  515. &pwm2 {
  516. pinctrl-names = "active";
  517. pinctrl-0 = <&pwm2_pin_pull_down>;
  518. status = "okay";
  519. };
  520. &saradc {
  521. vref-supply = <&vcca1v8_s3>;
  522. status = "okay";
  523. };
  524. &sdhci {
  525. bus-width = <8>;
  526. mmc-hs200-1_8v;
  527. non-removable;
  528. status = "okay";
  529. };
  530. &sdio0 {
  531. bus-width = <4>;
  532. cap-sd-highspeed;
  533. cap-sdio-irq;
  534. keep-power-in-suspend;
  535. mmc-pwrseq = <&sdio_pwrseq>;
  536. non-removable;
  537. pinctrl-names = "default";
  538. pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
  539. sd-uhs-sdr104;
  540. status = "okay";
  541. };
  542. &sdmmc {
  543. bus-width = <4>;
  544. cap-sd-highspeed;
  545. cap-mmc-highspeed;
  546. cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
  547. disable-wp;
  548. pinctrl-names = "default";
  549. pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc0_det_l>;
  550. sd-uhs-sdr104;
  551. vmmc-supply = <&vcc3v0_sd>;
  552. vqmmc-supply = <&vcc_sdio>;
  553. status = "okay";
  554. };
  555. &tcphy0 {
  556. status = "okay";
  557. };
  558. &tcphy1 {
  559. status = "okay";
  560. };
  561. &tsadc {
  562. /* tshut mode 0:CRU 1:GPIO */
  563. rockchip,hw-tshut-mode = <1>;
  564. /* tshut polarity 0:LOW 1:HIGH */
  565. rockchip,hw-tshut-polarity = <1>;
  566. status = "okay";
  567. };
  568. &u2phy0 {
  569. status = "okay";
  570. };
  571. &u2phy0_host {
  572. status = "okay";
  573. };
  574. &u2phy0_otg {
  575. status = "okay";
  576. };
  577. &u2phy1 {
  578. status = "okay";
  579. };
  580. &u2phy1_host {
  581. status = "okay";
  582. };
  583. &u2phy1_otg {
  584. status = "okay";
  585. };
  586. &uart0 {
  587. pinctrl-names = "default";
  588. pinctrl-0 = <&uart0_xfer &uart0_rts &uart0_cts>;
  589. status = "okay";
  590. bluetooth {
  591. compatible = "brcm,bcm43438-bt";
  592. clocks = <&rk808 1>;
  593. clock-names = "lpo";
  594. device-wakeup-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>;
  595. host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
  596. shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
  597. max-speed = <4000000>;
  598. pinctrl-names = "default";
  599. pinctrl-0 = <&bt_reg_on_h &bt_host_wake_l &bt_wake_l>;
  600. vbat-supply = <&vcc3v3_sys>;
  601. vddio-supply = <&vcc_1v8>;
  602. };
  603. };
  604. &uart2 {
  605. status = "okay";
  606. };
  607. &usbdrd3_0 {
  608. status = "okay";
  609. };
  610. &usbdrd3_1 {
  611. status = "okay";
  612. };
  613. &usbdrd_dwc3_0 {
  614. status = "okay";
  615. };
  616. &usbdrd_dwc3_1 {
  617. dr_mode = "host";
  618. status = "okay";
  619. };
  620. &usb_host0_ehci {
  621. status = "okay";
  622. };
  623. &usb_host0_ohci {
  624. status = "okay";
  625. };
  626. &usb_host1_ehci {
  627. status = "okay";
  628. };
  629. &usb_host1_ohci {
  630. status = "okay";
  631. };
  632. &vopb {
  633. status = "okay";
  634. };
  635. &vopb_mmu {
  636. status = "okay";
  637. };
  638. &vopl {
  639. status = "okay";
  640. };
  641. &vopl_mmu {
  642. status = "okay";
  643. };