rk3399-eaidk-610.dts 19 KB

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  1. // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2. /*
  3. * Copyright (c) 2022 Fuzhou Rockchip Electronics Co., Ltd.
  4. */
  5. /dts-v1/;
  6. #include <dt-bindings/input/linux-event-codes.h>
  7. #include <dt-bindings/pwm/pwm.h>
  8. #include <dt-bindings/usb/pd.h>
  9. #include "rk3399.dtsi"
  10. #include "rk3399-opp.dtsi"
  11. / {
  12. model = "OPEN AI LAB EAIDK-610";
  13. compatible = "openailab,eaidk-610", "rockchip,rk3399";
  14. aliases {
  15. mmc0 = &sdio0;
  16. mmc1 = &sdmmc;
  17. mmc2 = &sdhci;
  18. };
  19. backlight: backlight {
  20. compatible = "pwm-backlight";
  21. pwms = <&pwm0 0 25000 0>;
  22. brightness-levels = <
  23. 0 1 2 3 4 5 6 7
  24. 8 9 10 11 12 13 14 15
  25. 16 17 18 19 20 21 22 23
  26. 24 25 26 27 28 29 30 31
  27. 32 33 34 35 36 37 38 39
  28. 40 41 42 43 44 45 46 47
  29. 48 49 50 51 52 53 54 55
  30. 56 57 58 59 60 61 62 63
  31. 64 65 66 67 68 69 70 71
  32. 72 73 74 75 76 77 78 79
  33. 80 81 82 83 84 85 86 87
  34. 88 89 90 91 92 93 94 95
  35. 96 97 98 99 100 101 102 103
  36. 104 105 106 107 108 109 110 111
  37. 112 113 114 115 116 117 118 119
  38. 120 121 122 123 124 125 126 127
  39. 128 129 130 131 132 133 134 135
  40. 136 137 138 139 140 141 142 143
  41. 144 145 146 147 148 149 150 151
  42. 152 153 154 155 156 157 158 159
  43. 160 161 162 163 164 165 166 167
  44. 168 169 170 171 172 173 174 175
  45. 176 177 178 179 180 181 182 183
  46. 184 185 186 187 188 189 190 191
  47. 192 193 194 195 196 197 198 199
  48. 200 201 202 203 204 205 206 207
  49. 208 209 210 211 212 213 214 215
  50. 216 217 218 219 220 221 222 223
  51. 224 225 226 227 228 229 230 231
  52. 232 233 234 235 236 237 238 239
  53. 240 241 242 243 244 245 246 247
  54. 248 249 250 251 252 253 254 255>;
  55. default-brightness-level = <200>;
  56. };
  57. clkin_gmac: external-gmac-clock {
  58. compatible = "fixed-clock";
  59. clock-frequency = <125000000>;
  60. clock-output-names = "clkin_gmac";
  61. #clock-cells = <0>;
  62. };
  63. dc_12v: dc-12v {
  64. compatible = "regulator-fixed";
  65. regulator-name = "dc_12v";
  66. regulator-always-on;
  67. regulator-boot-on;
  68. regulator-min-microvolt = <12000000>;
  69. regulator-max-microvolt = <12000000>;
  70. };
  71. gpio-keys {
  72. compatible = "gpio-keys";
  73. autorepeat;
  74. pinctrl-names = "default";
  75. pinctrl-0 = <&pwrbtn>;
  76. key-power {
  77. debounce-interval = <100>;
  78. gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
  79. label = "GPIO Key Power";
  80. linux,code = <KEY_POWER>;
  81. wakeup-source;
  82. };
  83. };
  84. leds {
  85. compatible = "gpio-leds";
  86. pinctrl-names = "default";
  87. pinctrl-0 = <&work_led_pin>, <&user_led_pin>,
  88. <&heartbeat_led_pin>, <&wlan_active_led_pin>,
  89. <&bt_active_led_pin>;
  90. work_led: led-0 {
  91. label = "blue:work";
  92. default-state = "on";
  93. gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
  94. };
  95. user_led: led-1 {
  96. label = "read:user";
  97. default-state = "off";
  98. gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>;
  99. };
  100. heartbeat_led: led-2 {
  101. label = "green:heartbeat";
  102. linux,default-trigger = "heartbeat";
  103. gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;
  104. };
  105. wlan_active_led: led-3 {
  106. label = "yellow:wlan";
  107. gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>;
  108. linux,default-trigger = "phy0tx";
  109. default-state = "off";
  110. };
  111. bt_active_led: led-4 {
  112. label = "blue:bt";
  113. gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>;
  114. linux,default-trigger = "hci0-power";
  115. default-state = "off";
  116. };
  117. };
  118. rt5651-sound {
  119. compatible = "simple-audio-card";
  120. simple-audio-card,name = "realtek,rt5651-codec";
  121. simple-audio-card,format = "i2s";
  122. simple-audio-card,mclk-fs = <256>;
  123. simple-audio-card,widgets =
  124. "Microphone", "Mic Jack",
  125. "Headphone", "Headphone Jack";
  126. simple-audio-card,routing =
  127. "Mic Jack", "MICBIAS1",
  128. "IN1P", "Mic Jack",
  129. "Headphone Jack", "HPOL",
  130. "Headphone Jack", "HPOR";
  131. simple-audio-card,cpu {
  132. sound-dai = <&i2s1>;
  133. };
  134. simple-audio-card,codec {
  135. sound-dai = <&rt5651>;
  136. };
  137. };
  138. sdio_pwrseq: sdio-pwrseq {
  139. compatible = "mmc-pwrseq-simple";
  140. clocks = <&rk808 1>;
  141. clock-names = "ext_clock";
  142. pinctrl-names = "default";
  143. pinctrl-0 = <&wifi_enable_h>;
  144. /*
  145. * On the module itself this is one of these (depending
  146. * on the actual card populated):
  147. * - SDIO_RESET_L_WL_REG_ON
  148. * - PDN (power down when low)
  149. */
  150. reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
  151. };
  152. /* switched by pmic_sleep */
  153. vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 {
  154. compatible = "regulator-fixed";
  155. regulator-name = "vcc1v8_s3";
  156. regulator-always-on;
  157. regulator-boot-on;
  158. regulator-min-microvolt = <1800000>;
  159. regulator-max-microvolt = <1800000>;
  160. vin-supply = <&vcc_1v8>;
  161. };
  162. vcc3v3_sys: vcc3v3-sys {
  163. compatible = "regulator-fixed";
  164. regulator-name = "vcc3v3_sys";
  165. regulator-always-on;
  166. regulator-boot-on;
  167. regulator-min-microvolt = <3300000>;
  168. regulator-max-microvolt = <3300000>;
  169. vin-supply = <&dc_12v>;
  170. };
  171. vcc5v0_sys: vcc5v0-sys {
  172. compatible = "regulator-fixed";
  173. regulator-name = "vcc5v0_sys";
  174. regulator-always-on;
  175. regulator-boot-on;
  176. regulator-min-microvolt = <5000000>;
  177. regulator-max-microvolt = <5000000>;
  178. vin-supply = <&dc_12v>;
  179. };
  180. /* For USB3.0 Port1/2 */
  181. vcc5v0_host1: vcc5v0-host1-regulator {
  182. compatible = "regulator-fixed";
  183. enable-active-high;
  184. gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
  185. pinctrl-names = "default";
  186. pinctrl-0 = <&vcc5v0_host1_en>;
  187. regulator-name = "vcc5v0_host1";
  188. regulator-always-on;
  189. vin-supply = <&vcc5v0_sys>;
  190. };
  191. /* For USB2.0 Port1/2 */
  192. vcc5v0_host3: vcc5v0-host3-regulator {
  193. compatible = "regulator-fixed";
  194. enable-active-high;
  195. gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>;
  196. pinctrl-names = "default";
  197. pinctrl-0 = <&vcc5v0_host3_en>;
  198. regulator-name = "vcc5v0_host3";
  199. regulator-always-on;
  200. vin-supply = <&vcc5v0_sys>;
  201. };
  202. vcc5v0_typec: vcc5v0-typec-regulator {
  203. compatible = "regulator-fixed";
  204. enable-active-high;
  205. gpio = <&gpio4 RK_PC5 GPIO_ACTIVE_HIGH>;
  206. pinctrl-names = "default";
  207. pinctrl-0 = <&vcc5v0_typec_en>;
  208. regulator-name = "vcc5v0_typec";
  209. regulator-always-on;
  210. vin-supply = <&vcc3v3_sys>;
  211. };
  212. vdd_log: vdd-log {
  213. compatible = "regulator-fixed";
  214. regulator-name = "vdd_log";
  215. regulator-always-on;
  216. regulator-boot-on;
  217. regulator-min-microvolt = <900000>;
  218. regulator-max-microvolt = <900000>;
  219. };
  220. };
  221. &cpu_l0 {
  222. cpu-supply = <&vdd_cpu_l>;
  223. };
  224. &cpu_l1 {
  225. cpu-supply = <&vdd_cpu_l>;
  226. };
  227. &cpu_l2 {
  228. cpu-supply = <&vdd_cpu_l>;
  229. };
  230. &cpu_l3 {
  231. cpu-supply = <&vdd_cpu_l>;
  232. };
  233. &cpu_b0 {
  234. cpu-supply = <&vdd_cpu_b>;
  235. };
  236. &cpu_b1 {
  237. cpu-supply = <&vdd_cpu_b>;
  238. };
  239. &emmc_phy {
  240. status = "okay";
  241. };
  242. &gmac {
  243. assigned-clocks = <&cru SCLK_RMII_SRC>;
  244. assigned-clock-parents = <&clkin_gmac>;
  245. clock_in_out = "input";
  246. phy-supply = <&vcc_lan>;
  247. phy-mode = "rgmii";
  248. pinctrl-names = "default";
  249. pinctrl-0 = <&rgmii_pins>;
  250. snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
  251. snps,reset-active-low;
  252. snps,reset-delays-us = <0 10000 50000>;
  253. tx_delay = <0x28>;
  254. rx_delay = <0x11>;
  255. status = "okay";
  256. };
  257. &gpu {
  258. mali-supply = <&vdd_gpu>;
  259. status = "okay";
  260. };
  261. &hdmi {
  262. ddc-i2c-bus = <&i2c3>;
  263. pinctrl-names = "default";
  264. pinctrl-0 = <&hdmi_cec>;
  265. status = "okay";
  266. };
  267. &i2c0 {
  268. status = "okay";
  269. rk808: pmic@1b {
  270. compatible = "rockchip,rk808";
  271. reg = <0x1b>;
  272. interrupt-parent = <&gpio1>;
  273. interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
  274. pinctrl-names = "default";
  275. pinctrl-0 = <&pmic_int_l>;
  276. rockchip,system-power-controller;
  277. wakeup-source;
  278. #clock-cells = <1>;
  279. clock-output-names = "xin32k", "rk808-clkout2";
  280. vcc1-supply = <&vcc3v3_sys>;
  281. vcc2-supply = <&vcc3v3_sys>;
  282. vcc3-supply = <&vcc3v3_sys>;
  283. vcc4-supply = <&vcc3v3_sys>;
  284. vcc6-supply = <&vcc3v3_sys>;
  285. vcc7-supply = <&vcc3v3_sys>;
  286. vcc8-supply = <&vcc3v3_sys>;
  287. vcc9-supply = <&vcc3v3_sys>;
  288. vcc10-supply = <&vcc3v3_sys>;
  289. vcc11-supply = <&vcc3v3_sys>;
  290. vcc12-supply = <&vcc3v3_sys>;
  291. vddio-supply = <&vcc_3v0>;
  292. regulators {
  293. vdd_center: DCDC_REG1 {
  294. regulator-name = "vdd_center";
  295. regulator-min-microvolt = <750000>;
  296. regulator-max-microvolt = <1350000>;
  297. regulator-ramp-delay = <6001>;
  298. regulator-always-on;
  299. regulator-boot-on;
  300. regulator-state-mem {
  301. regulator-off-in-suspend;
  302. };
  303. };
  304. vdd_cpu_l: DCDC_REG2 {
  305. regulator-name = "vdd_cpu_l";
  306. regulator-min-microvolt = <750000>;
  307. regulator-max-microvolt = <1350000>;
  308. regulator-ramp-delay = <6001>;
  309. regulator-always-on;
  310. regulator-boot-on;
  311. regulator-state-mem {
  312. regulator-off-in-suspend;
  313. };
  314. };
  315. vcc_ddr: DCDC_REG3 {
  316. regulator-name = "vcc_ddr";
  317. regulator-always-on;
  318. regulator-boot-on;
  319. regulator-state-mem {
  320. regulator-on-in-suspend;
  321. };
  322. };
  323. vcc_1v8: DCDC_REG4 {
  324. regulator-name = "vcc_1v8";
  325. regulator-min-microvolt = <1800000>;
  326. regulator-max-microvolt = <1800000>;
  327. regulator-always-on;
  328. regulator-boot-on;
  329. regulator-state-mem {
  330. regulator-on-in-suspend;
  331. regulator-suspend-microvolt = <1800000>;
  332. };
  333. };
  334. vcc1v8_dvp: LDO_REG1 {
  335. regulator-name = "vcc1v8_dvp";
  336. regulator-min-microvolt = <1800000>;
  337. regulator-max-microvolt = <1800000>;
  338. regulator-always-on;
  339. regulator-boot-on;
  340. regulator-state-mem {
  341. regulator-off-in-suspend;
  342. };
  343. };
  344. vcc2v8_dvp: LDO_REG2 {
  345. regulator-name = "vcc2v8_dvp";
  346. regulator-min-microvolt = <2800000>;
  347. regulator-max-microvolt = <2800000>;
  348. regulator-always-on;
  349. regulator-boot-on;
  350. regulator-state-mem {
  351. regulator-off-in-suspend;
  352. };
  353. };
  354. vcc1v8_pmu: LDO_REG3 {
  355. regulator-name = "vcc1v8_pmu";
  356. regulator-min-microvolt = <1800000>;
  357. regulator-max-microvolt = <1800000>;
  358. regulator-always-on;
  359. regulator-boot-on;
  360. regulator-state-mem {
  361. regulator-on-in-suspend;
  362. regulator-suspend-microvolt = <1800000>;
  363. };
  364. };
  365. vcc_sdio: LDO_REG4 {
  366. regulator-name = "vcc_sdio";
  367. regulator-min-microvolt = <1800000>;
  368. regulator-max-microvolt = <3000000>;
  369. regulator-always-on;
  370. regulator-boot-on;
  371. regulator-state-mem {
  372. regulator-on-in-suspend;
  373. regulator-suspend-microvolt = <3000000>;
  374. };
  375. };
  376. vcca3v0_codec: LDO_REG5 {
  377. regulator-name = "vcca3v0_codec";
  378. regulator-min-microvolt = <3000000>;
  379. regulator-max-microvolt = <3000000>;
  380. regulator-always-on;
  381. regulator-boot-on;
  382. regulator-state-mem {
  383. regulator-off-in-suspend;
  384. };
  385. };
  386. vcc_1v5: LDO_REG6 {
  387. regulator-name = "vcc_1v5";
  388. regulator-min-microvolt = <1500000>;
  389. regulator-max-microvolt = <1500000>;
  390. regulator-always-on;
  391. regulator-boot-on;
  392. regulator-state-mem {
  393. regulator-on-in-suspend;
  394. regulator-suspend-microvolt = <1500000>;
  395. };
  396. };
  397. vcca1v8_codec: LDO_REG7 {
  398. regulator-name = "vcca1v8_codec";
  399. regulator-min-microvolt = <1800000>;
  400. regulator-max-microvolt = <1800000>;
  401. regulator-always-on;
  402. regulator-boot-on;
  403. regulator-state-mem {
  404. regulator-off-in-suspend;
  405. };
  406. };
  407. vcc_3v0: LDO_REG8 {
  408. regulator-name = "vcc_3v0";
  409. regulator-min-microvolt = <3000000>;
  410. regulator-max-microvolt = <3000000>;
  411. regulator-always-on;
  412. regulator-boot-on;
  413. regulator-state-mem {
  414. regulator-on-in-suspend;
  415. regulator-suspend-microvolt = <3000000>;
  416. };
  417. };
  418. vcc3v3_s3: vcc_lan: SWITCH_REG1 {
  419. regulator-name = "vcc3v3_s3";
  420. regulator-always-on;
  421. regulator-boot-on;
  422. regulator-state-mem {
  423. regulator-off-in-suspend;
  424. };
  425. };
  426. vcc3v3_s0: SWITCH_REG2 {
  427. regulator-name = "vcc3v3_s0";
  428. regulator-always-on;
  429. regulator-boot-on;
  430. regulator-state-mem {
  431. regulator-off-in-suspend;
  432. };
  433. };
  434. };
  435. };
  436. vdd_cpu_b: regulator@40 {
  437. compatible = "silergy,syr827";
  438. reg = <0x40>;
  439. fcs,suspend-voltage-selector = <1>;
  440. regulator-name = "vdd_cpu_b";
  441. pinctrl-names = "default";
  442. pinctrl-0 = <&vsel1_pin>;
  443. regulator-min-microvolt = <712500>;
  444. regulator-max-microvolt = <1500000>;
  445. regulator-ramp-delay = <1000>;
  446. regulator-always-on;
  447. regulator-boot-on;
  448. vin-supply = <&vcc3v3_sys>;
  449. regulator-state-mem {
  450. regulator-off-in-suspend;
  451. };
  452. };
  453. vdd_gpu: regulator@41 {
  454. compatible = "silergy,syr828";
  455. reg = <0x41>;
  456. fcs,suspend-voltage-selector = <1>;
  457. regulator-name = "vdd_gpu";
  458. pinctrl-names = "default";
  459. pinctrl-0 = <&vsel2_pin>;
  460. regulator-min-microvolt = <712500>;
  461. regulator-max-microvolt = <1500000>;
  462. regulator-ramp-delay = <1000>;
  463. regulator-always-on;
  464. regulator-boot-on;
  465. vin-supply = <&vcc3v3_sys>;
  466. regulator-state-mem {
  467. regulator-off-in-suspend;
  468. };
  469. };
  470. };
  471. &i2c1 {
  472. i2c-scl-rising-time-ns = <300>;
  473. i2c-scl-falling-time-ns = <15>;
  474. status = "okay";
  475. rt5651: audio-codec@1a {
  476. compatible = "rockchip,rt5651";
  477. reg = <0x1a>;
  478. clocks = <&cru SCLK_I2S_8CH_OUT>;
  479. clock-names = "mclk";
  480. hp-det-gpio = <&gpio4 RK_PD4 GPIO_ACTIVE_LOW>;
  481. spk-con-gpio = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>;
  482. #sound-dai-cells = <0>;
  483. };
  484. };
  485. &i2c3 {
  486. i2c-scl-rising-time-ns = <450>;
  487. i2c-scl-falling-time-ns = <15>;
  488. status = "okay";
  489. };
  490. &i2c4 {
  491. i2c-scl-rising-time-ns = <600>;
  492. i2c-scl-falling-time-ns = <20>;
  493. status = "okay";
  494. fusb0: typec-portc@22 {
  495. compatible = "fcs,fusb302";
  496. reg = <0x22>;
  497. interrupt-parent = <&gpio1>;
  498. interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>;
  499. pinctrl-names = "default";
  500. pinctrl-0 = <&fusb0_int>;
  501. vbus-supply = <&vcc5v0_typec>;
  502. ports {
  503. #address-cells = <1>;
  504. #size-cells = <0>;
  505. port@0 {
  506. reg = <0>;
  507. usbc0_role_sw: endpoint@0 {
  508. remote-endpoint = <&dwc3_0_role_switch>;
  509. };
  510. };
  511. };
  512. connector {
  513. compatible = "usb-c-connector";
  514. data-role = "dual";
  515. label = "USB-C";
  516. ports {
  517. #address-cells = <1>;
  518. #size-cells = <0>;
  519. port@0 {
  520. reg = <0>;
  521. usbc_hs: endpoint {
  522. remote-endpoint = <&u2phy0_typec_hs>;
  523. };
  524. };
  525. port@1 {
  526. reg = <1>;
  527. usbc_ss: endpoint {
  528. remote-endpoint = <&tcphy0_typec_ss>;
  529. };
  530. };
  531. };
  532. };
  533. };
  534. };
  535. &i2s1 {
  536. rockchip,playback-channels = <2>;
  537. rockchip,capture-channels = <2>;
  538. status = "okay";
  539. };
  540. &i2s2 {
  541. status = "okay";
  542. };
  543. &io_domains {
  544. status = "okay";
  545. audio-supply = <&vcca1v8_codec>;
  546. bt656-supply = <&vcc_3v0>;
  547. gpio1830-supply = <&vcc_3v0>;
  548. sdmmc-supply = <&vcc_sdio>;
  549. };
  550. &pmu_io_domains {
  551. status = "okay";
  552. pmu1830-supply = <&vcc_3v0>;
  553. };
  554. &pinctrl {
  555. buttons {
  556. pwrbtn: pwrbtn {
  557. rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
  558. };
  559. };
  560. bt {
  561. bt_enable_h: bt-enable-h {
  562. rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
  563. };
  564. bt_host_wake_l: bt-host-wake-l {
  565. rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
  566. };
  567. bt_wake_l: bt-wake-l {
  568. rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
  569. };
  570. };
  571. fusb302x {
  572. fusb0_int: fusb0-int {
  573. rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
  574. };
  575. };
  576. lcd-panel {
  577. lcd_panel_reset: lcd-panel-reset {
  578. rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>;
  579. };
  580. };
  581. leds {
  582. work_led_pin: work-led-pin {
  583. rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
  584. };
  585. user_led_pin: user-led-pin {
  586. rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
  587. };
  588. heartbeat_led_pin: heartbeat-led-pin {
  589. rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
  590. };
  591. wlan_active_led_pin: wlan-led-pin {
  592. rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
  593. };
  594. bt_active_led_pin: bt-led-pin {
  595. rockchip,pins = <2 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
  596. };
  597. };
  598. pmic {
  599. pmic_int_l: pmic-int-l {
  600. rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
  601. };
  602. vsel1_pin: vsel1-pin {
  603. rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
  604. };
  605. vsel2_pin: vsel2-pin {
  606. rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
  607. };
  608. };
  609. rt5651 {
  610. rt5651_hpcon: rt5640-hpcon {
  611. rockchip,pins = <4 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
  612. };
  613. };
  614. sdio-pwrseq {
  615. wifi_enable_h: wifi-enable-h {
  616. rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
  617. };
  618. };
  619. usb-typec {
  620. vcc5v0_typec_en: vcc5v0_typec_en {
  621. rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
  622. };
  623. };
  624. usb2 {
  625. vcc5v0_host3_en: vcc5v0-host3-en {
  626. rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
  627. };
  628. vcc5v0_host1_en: vcc5v0-host1-en {
  629. rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
  630. };
  631. };
  632. wifi {
  633. wifi_host_wake_l: wifi-host-wake-l {
  634. rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
  635. };
  636. };
  637. };
  638. &pwm0 {
  639. status = "okay";
  640. };
  641. &saradc {
  642. vref-supply = <&vcca1v8_s3>;
  643. status = "okay";
  644. };
  645. &sdio0 {
  646. /* WiFi & BT combo module AMPAK AP6255 */
  647. #address-cells = <1>;
  648. #size-cells = <0>;
  649. bus-width = <4>;
  650. clock-frequency = <50000000>;
  651. cap-sdio-irq;
  652. cap-sd-highspeed;
  653. keep-power-in-suspend;
  654. mmc-pwrseq = <&sdio_pwrseq>;
  655. non-removable;
  656. pinctrl-names = "default";
  657. pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
  658. sd-uhs-sdr104;
  659. status = "okay";
  660. brcmf: wifi@1 {
  661. compatible = "brcm,bcm4329-fmac";
  662. reg = <1>;
  663. interrupt-parent = <&gpio0>;
  664. interrupts = <RK_PA3 GPIO_ACTIVE_HIGH>;
  665. interrupt-names = "host-wake";
  666. pinctrl-names = "default";
  667. pinctrl-0 = <&wifi_host_wake_l>;
  668. };
  669. };
  670. &sdmmc {
  671. bus-width = <4>;
  672. cap-mmc-highspeed;
  673. cap-sd-highspeed;
  674. cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
  675. disable-wp;
  676. max-frequency = <150000000>;
  677. pinctrl-names = "default";
  678. pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
  679. status = "okay";
  680. };
  681. &sdhci {
  682. bus-width = <8>;
  683. non-removable;
  684. status = "okay";
  685. };
  686. &tcphy0 {
  687. status = "okay";
  688. };
  689. &tcphy0_usb3 {
  690. orientation-switch;
  691. port {
  692. tcphy0_typec_ss: endpoint {
  693. remote-endpoint = <&usbc_ss>;
  694. };
  695. };
  696. };
  697. &tcphy1 {
  698. status = "okay";
  699. };
  700. &tsadc {
  701. /* tshut mode 0:CRU 1:GPIO */
  702. rockchip,hw-tshut-mode = <1>;
  703. /* tshut polarity 0:LOW 1:HIGH */
  704. rockchip,hw-tshut-polarity = <1>;
  705. status = "okay";
  706. };
  707. &u2phy0 {
  708. status = "okay";
  709. u2phy0_otg: otg-port {
  710. status = "okay";
  711. };
  712. u2phy0_host: host-port {
  713. phy-supply = <&vcc5v0_host3>;
  714. status = "okay";
  715. };
  716. port {
  717. u2phy0_typec_hs: endpoint {
  718. remote-endpoint = <&usbc_hs>;
  719. };
  720. };
  721. };
  722. &u2phy1 {
  723. status = "okay";
  724. u2phy1_otg: otg-port {
  725. status = "okay";
  726. };
  727. u2phy1_host: host-port {
  728. phy-supply = <&vcc5v0_host3>;
  729. status = "okay";
  730. };
  731. };
  732. &uart0 {
  733. pinctrl-names = "default";
  734. pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
  735. status = "okay";
  736. bluetooth {
  737. compatible = "brcm,bcm4345c5";
  738. clocks = <&rk808 1>;
  739. clock-names = "lpo";
  740. device-wakeup-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>;
  741. host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
  742. shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
  743. max-speed = <1500000>;
  744. pinctrl-names = "default";
  745. pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>;
  746. vbat-supply = <&vcc3v3_sys>;
  747. vddio-supply = <&vcc_1v8>;
  748. };
  749. };
  750. &uart2 {
  751. status = "okay";
  752. };
  753. &usb_host0_ehci {
  754. status = "okay";
  755. };
  756. &usb_host0_ohci {
  757. status = "okay";
  758. };
  759. &usb_host1_ehci {
  760. status = "okay";
  761. };
  762. &usb_host1_ohci {
  763. status = "okay";
  764. };
  765. &usbdrd3_0 {
  766. status = "okay";
  767. };
  768. &usbdrd_dwc3_0 {
  769. status = "okay";
  770. usb-role-switch;
  771. port {
  772. #address-cells = <1>;
  773. #size-cells = <0>;
  774. dwc3_0_role_switch: endpoint@0 {
  775. reg = <0>;
  776. remote-endpoint = <&usbc0_role_sw>;
  777. };
  778. };
  779. };
  780. &usbdrd3_1 {
  781. status = "okay";
  782. };
  783. &usbdrd_dwc3_1 {
  784. status = "okay";
  785. dr_mode = "host";
  786. };
  787. &vopb {
  788. status = "okay";
  789. };
  790. &vopb_mmu {
  791. status = "okay";
  792. };
  793. &vopl {
  794. status = "okay";
  795. };
  796. &vopl_mmu {
  797. status = "okay";
  798. };