rzg2lc-smarc-pinfunction.dtsi 2.9 KB

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  1. // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2. /*
  3. * Device Tree Source for the RZ/G2LC SMARC pincontrol parts
  4. *
  5. * Copyright (C) 2021 Renesas Electronics Corp.
  6. */
  7. #include <dt-bindings/gpio/gpio.h>
  8. #include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
  9. &pinctrl {
  10. pinctrl-0 = <&sound_clk_pins>;
  11. pinctrl-names = "default";
  12. #if SW_SCIF_CAN
  13. /* SW8 should be at position 2->1 */
  14. can1_pins: can1 {
  15. pinmux = <RZG2L_PORT_PINMUX(40, 0, 3)>, /* TxD */
  16. <RZG2L_PORT_PINMUX(40, 1, 3)>; /* RxD */
  17. };
  18. #endif
  19. #if SW_RSPI_CAN
  20. /* SW8 should be at position 2->3 so that GPIO9_CAN1_STB line is activated */
  21. can1-stb-hog {
  22. gpio-hog;
  23. gpios = <RZG2L_GPIO(44, 3) GPIO_ACTIVE_HIGH>;
  24. output-low;
  25. line-name = "can1_stb";
  26. };
  27. can1_pins: can1 {
  28. pinmux = <RZG2L_PORT_PINMUX(44, 0, 3)>, /* TxD */
  29. <RZG2L_PORT_PINMUX(44, 1, 3)>; /* RxD */
  30. };
  31. #endif
  32. i2c0_pins: i2c0 {
  33. pins = "RIIC0_SDA", "RIIC0_SCL";
  34. input-enable;
  35. };
  36. i2c1_pins: i2c1 {
  37. pins = "RIIC1_SDA", "RIIC1_SCL";
  38. input-enable;
  39. };
  40. i2c2_pins: i2c2 {
  41. pinmux = <RZG2L_PORT_PINMUX(42, 3, 1)>, /* SDA */
  42. <RZG2L_PORT_PINMUX(42, 4, 1)>; /* SCL */
  43. };
  44. scif0_pins: scif0 {
  45. pinmux = <RZG2L_PORT_PINMUX(38, 0, 1)>, /* TxD */
  46. <RZG2L_PORT_PINMUX(38, 1, 1)>; /* RxD */
  47. };
  48. scif1_pins: scif1 {
  49. pinmux = <RZG2L_PORT_PINMUX(40, 0, 1)>, /* TxD */
  50. <RZG2L_PORT_PINMUX(40, 1, 1)>, /* RxD */
  51. <RZG2L_PORT_PINMUX(41, 0, 1)>, /* CTS# */
  52. <RZG2L_PORT_PINMUX(41, 1, 1)>; /* RTS# */
  53. };
  54. sd1-pwr-en-hog {
  55. gpio-hog;
  56. gpios = <RZG2L_GPIO(39, 2) GPIO_ACTIVE_HIGH>;
  57. output-high;
  58. line-name = "sd1_pwr_en";
  59. };
  60. sdhi1_pins: sd1 {
  61. sd1_data {
  62. pins = "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3";
  63. power-source = <3300>;
  64. };
  65. sd1_ctrl {
  66. pins = "SD1_CLK", "SD1_CMD";
  67. power-source = <3300>;
  68. };
  69. sd1_mux {
  70. pinmux = <RZG2L_PORT_PINMUX(19, 0, 1)>; /* SD1_CD */
  71. };
  72. };
  73. sdhi1_pins_uhs: sd1_uhs {
  74. sd1_data_uhs {
  75. pins = "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3";
  76. power-source = <1800>;
  77. };
  78. sd1_ctrl_uhs {
  79. pins = "SD1_CLK", "SD1_CMD";
  80. power-source = <1800>;
  81. };
  82. sd1_mux_uhs {
  83. pinmux = <RZG2L_PORT_PINMUX(19, 0, 1)>; /* SD1_CD */
  84. };
  85. };
  86. sound_clk_pins: sound_clk {
  87. pins = "AUDIO_CLK1", "AUDIO_CLK2";
  88. input-enable;
  89. };
  90. spi1_pins: spi1 {
  91. pinmux = <RZG2L_PORT_PINMUX(44, 0, 1)>, /* CK */
  92. <RZG2L_PORT_PINMUX(44, 1, 1)>, /* MOSI */
  93. <RZG2L_PORT_PINMUX(44, 2, 1)>, /* MISO */
  94. <RZG2L_PORT_PINMUX(44, 3, 1)>; /* SSL */
  95. };
  96. ssi0_pins: ssi0 {
  97. pinmux = <RZG2L_PORT_PINMUX(45, 0, 1)>, /* BCK */
  98. <RZG2L_PORT_PINMUX(45, 1, 1)>, /* RCK */
  99. <RZG2L_PORT_PINMUX(45, 2, 1)>, /* TXD */
  100. <RZG2L_PORT_PINMUX(45, 3, 1)>; /* RXD */
  101. };
  102. usb0_pins: usb0 {
  103. pinmux = <RZG2L_PORT_PINMUX(4, 0, 1)>, /* VBUS */
  104. <RZG2L_PORT_PINMUX(5, 0, 1)>, /* OVC */
  105. <RZG2L_PORT_PINMUX(5, 1, 1)>; /* OTG_ID */
  106. };
  107. usb1_pins: usb1 {
  108. pinmux = <RZG2L_PORT_PINMUX(42, 0, 1)>, /* VBUS */
  109. <RZG2L_PORT_PINMUX(42, 1, 1)>; /* OVC */
  110. };
  111. };