rzg2l-smarc-pinfunction.dtsi 3.0 KB

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  1. // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2. /*
  3. * Device Tree Source for the RZ/{G2L,V2L} SMARC pincontrol parts
  4. *
  5. * Copyright (C) 2021 Renesas Electronics Corp.
  6. */
  7. #include <dt-bindings/gpio/gpio.h>
  8. #include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
  9. &pinctrl {
  10. pinctrl-0 = <&sound_clk_pins>;
  11. pinctrl-names = "default";
  12. can0_pins: can0 {
  13. pinmux = <RZG2L_PORT_PINMUX(10, 1, 2)>, /* TX */
  14. <RZG2L_PORT_PINMUX(11, 0, 2)>; /* RX */
  15. };
  16. /* SW7 should be at position 2->3 so that GPIO8_CAN0_STB line is activated */
  17. can0-stb-hog {
  18. gpio-hog;
  19. gpios = <RZG2L_GPIO(42, 2) GPIO_ACTIVE_HIGH>;
  20. output-low;
  21. line-name = "can0_stb";
  22. };
  23. can1_pins: can1 {
  24. pinmux = <RZG2L_PORT_PINMUX(12, 1, 2)>, /* TX */
  25. <RZG2L_PORT_PINMUX(13, 0, 2)>; /* RX */
  26. };
  27. /* SW8 should be at position 2->3 so that GPIO9_CAN1_STB line is activated */
  28. can1-stb-hog {
  29. gpio-hog;
  30. gpios = <RZG2L_GPIO(42, 3) GPIO_ACTIVE_HIGH>;
  31. output-low;
  32. line-name = "can1_stb";
  33. };
  34. i2c0_pins: i2c0 {
  35. pins = "RIIC0_SDA", "RIIC0_SCL";
  36. input-enable;
  37. };
  38. i2c1_pins: i2c1 {
  39. pins = "RIIC1_SDA", "RIIC1_SCL";
  40. input-enable;
  41. };
  42. i2c3_pins: i2c3 {
  43. pinmux = <RZG2L_PORT_PINMUX(18, 0, 3)>, /* SDA */
  44. <RZG2L_PORT_PINMUX(18, 1, 3)>; /* SCL */
  45. };
  46. scif0_pins: scif0 {
  47. pinmux = <RZG2L_PORT_PINMUX(38, 0, 1)>, /* TxD */
  48. <RZG2L_PORT_PINMUX(38, 1, 1)>; /* RxD */
  49. };
  50. scif2_pins: scif2 {
  51. pinmux = <RZG2L_PORT_PINMUX(48, 0, 1)>, /* TxD */
  52. <RZG2L_PORT_PINMUX(48, 1, 1)>, /* RxD */
  53. <RZG2L_PORT_PINMUX(48, 3, 1)>, /* CTS# */
  54. <RZG2L_PORT_PINMUX(48, 4, 1)>; /* RTS# */
  55. };
  56. sd1-pwr-en-hog {
  57. gpio-hog;
  58. gpios = <RZG2L_GPIO(39, 2) GPIO_ACTIVE_HIGH>;
  59. output-high;
  60. line-name = "sd1_pwr_en";
  61. };
  62. sdhi1_pins: sd1 {
  63. sd1_data {
  64. pins = "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3";
  65. power-source = <3300>;
  66. };
  67. sd1_ctrl {
  68. pins = "SD1_CLK", "SD1_CMD";
  69. power-source = <3300>;
  70. };
  71. sd1_mux {
  72. pinmux = <RZG2L_PORT_PINMUX(19, 0, 1)>; /* SD1_CD */
  73. };
  74. };
  75. sdhi1_pins_uhs: sd1_uhs {
  76. sd1_data_uhs {
  77. pins = "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3";
  78. power-source = <1800>;
  79. };
  80. sd1_ctrl_uhs {
  81. pins = "SD1_CLK", "SD1_CMD";
  82. power-source = <1800>;
  83. };
  84. sd1_mux_uhs {
  85. pinmux = <RZG2L_PORT_PINMUX(19, 0, 1)>; /* SD1_CD */
  86. };
  87. };
  88. sound_clk_pins: sound_clk {
  89. pins = "AUDIO_CLK1", "AUDIO_CLK2";
  90. input-enable;
  91. };
  92. spi1_pins: spi1 {
  93. pinmux = <RZG2L_PORT_PINMUX(44, 0, 1)>, /* CK */
  94. <RZG2L_PORT_PINMUX(44, 1, 1)>, /* MOSI */
  95. <RZG2L_PORT_PINMUX(44, 2, 1)>, /* MISO */
  96. <RZG2L_PORT_PINMUX(44, 3, 1)>; /* SSL */
  97. };
  98. ssi0_pins: ssi0 {
  99. pinmux = <RZG2L_PORT_PINMUX(45, 0, 1)>, /* BCK */
  100. <RZG2L_PORT_PINMUX(45, 1, 1)>, /* RCK */
  101. <RZG2L_PORT_PINMUX(45, 2, 1)>, /* TXD */
  102. <RZG2L_PORT_PINMUX(45, 3, 1)>; /* RXD */
  103. };
  104. usb0_pins: usb0 {
  105. pinmux = <RZG2L_PORT_PINMUX(4, 0, 1)>, /* VBUS */
  106. <RZG2L_PORT_PINMUX(5, 0, 1)>, /* OVC */
  107. <RZG2L_PORT_PINMUX(5, 1, 1)>; /* OTG_ID */
  108. };
  109. usb1_pins: usb1 {
  110. pinmux = <RZG2L_PORT_PINMUX(42, 0, 1)>, /* VBUS */
  111. <RZG2L_PORT_PINMUX(42, 1, 1)>; /* OVC */
  112. };
  113. };