r9a09g011-v2mevk2.dts 1.5 KB

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  1. // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2. /*
  3. * Device Tree Source for the RZ/V2M (r9a09g011) Evaluation Kit Board
  4. *
  5. * Copyright (C) 2022 Renesas Electronics Corp.
  6. */
  7. /dts-v1/;
  8. #include "r9a09g011.dtsi"
  9. #include <dt-bindings/pinctrl/rzv2m-pinctrl.h>
  10. / {
  11. model = "RZ/V2M Evaluation Kit 2.0";
  12. compatible = "renesas,rzv2mevk2", "renesas,r9a09g011";
  13. aliases {
  14. serial0 = &uart0;
  15. ethernet0 = &avb;
  16. };
  17. chosen {
  18. stdout-path = "serial0:115200n8";
  19. };
  20. memory@58000000 {
  21. device_type = "memory";
  22. /*
  23. * first 1.25GiB is reserved for ISP Firmware,
  24. * next 128MiB is reserved for secure area.
  25. */
  26. reg = <0x0 0x58000000 0x0 0x28000000>;
  27. };
  28. memory@180000000 {
  29. device_type = "memory";
  30. reg = <0x1 0x80000000 0x0 0x80000000>;
  31. };
  32. };
  33. &avb {
  34. renesas,no-ether-link;
  35. phy-handle = <&phy0>;
  36. phy-mode = "gmii";
  37. status = "okay";
  38. phy0: ethernet-phy@0 {
  39. compatible = "ethernet-phy-id001c.c916",
  40. "ethernet-phy-ieee802.3-c22";
  41. reg = <0>;
  42. };
  43. };
  44. &extal_clk {
  45. clock-frequency = <48000000>;
  46. };
  47. &i2c0 {
  48. pinctrl-0 = <&i2c0_pins>;
  49. pinctrl-names = "default";
  50. clock-frequency = <400000>;
  51. status = "okay";
  52. };
  53. &i2c2 {
  54. pinctrl-0 = <&i2c2_pins>;
  55. pinctrl-names = "default";
  56. clock-frequency = <100000>;
  57. status = "okay";
  58. };
  59. &pinctrl {
  60. i2c0_pins: i2c0 {
  61. pinmux = <RZV2M_PORT_PINMUX(5, 0, 2)>, /* SDA */
  62. <RZV2M_PORT_PINMUX(5, 1, 2)>; /* SCL */
  63. };
  64. i2c2_pins: i2c2 {
  65. pinmux = <RZV2M_PORT_PINMUX(3, 8, 2)>, /* SDA */
  66. <RZV2M_PORT_PINMUX(3, 9, 2)>; /* SCL */
  67. };
  68. };
  69. &uart0 {
  70. status = "okay";
  71. };