hihope-common.dtsi 6.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Device Tree Source for the HiHope RZ/G2H Rev.4.0 and
  4. * HiHope RZ/G2[MN] Rev.[2.0/3.0/4.0] main board common parts
  5. *
  6. * Copyright (C) 2019 Renesas Electronics Corp.
  7. */
  8. #include <dt-bindings/gpio/gpio.h>
  9. / {
  10. aliases {
  11. i2c0 = &i2c0;
  12. i2c1 = &i2c1;
  13. i2c2 = &i2c2;
  14. i2c3 = &i2c3;
  15. i2c4 = &i2c4;
  16. i2c5 = &i2c5;
  17. i2c6 = &i2c6;
  18. i2c7 = &iic_pmic;
  19. serial0 = &scif2;
  20. serial1 = &hscif0;
  21. mmc0 = &sdhi3;
  22. mmc1 = &sdhi0;
  23. mmc2 = &sdhi2;
  24. };
  25. chosen {
  26. bootargs = "ignore_loglevel";
  27. stdout-path = "serial0:115200n8";
  28. };
  29. hdmi0-out {
  30. compatible = "hdmi-connector";
  31. type = "a";
  32. port {
  33. hdmi0_con: endpoint {
  34. remote-endpoint = <&rcar_dw_hdmi0_out>;
  35. };
  36. };
  37. };
  38. leds {
  39. compatible = "gpio-leds";
  40. led1 {
  41. gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
  42. };
  43. led2 {
  44. gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
  45. };
  46. led3 {
  47. gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
  48. };
  49. led4 {
  50. gpios = <&gpio6 11 GPIO_ACTIVE_HIGH>;
  51. };
  52. };
  53. reg_1p8v: regulator-1p8v {
  54. compatible = "regulator-fixed";
  55. regulator-name = "fixed-1.8V";
  56. regulator-min-microvolt = <1800000>;
  57. regulator-max-microvolt = <1800000>;
  58. regulator-boot-on;
  59. regulator-always-on;
  60. };
  61. reg_3p3v: regulator-3p3v {
  62. compatible = "regulator-fixed";
  63. regulator-name = "fixed-3.3V";
  64. regulator-min-microvolt = <3300000>;
  65. regulator-max-microvolt = <3300000>;
  66. regulator-boot-on;
  67. regulator-always-on;
  68. };
  69. sound_card: sound {
  70. compatible = "audio-graph-card";
  71. label = "rcar-sound";
  72. dais = <&rsnd_port>;
  73. };
  74. vbus0_usb2: regulator-vbus0-usb2 {
  75. compatible = "regulator-fixed";
  76. regulator-name = "USB20_VBUS0";
  77. regulator-min-microvolt = <5000000>;
  78. regulator-max-microvolt = <5000000>;
  79. gpio = <&gpio6 16 GPIO_ACTIVE_HIGH>;
  80. enable-active-high;
  81. };
  82. vccq_sdhi0: regulator-vccq-sdhi0 {
  83. compatible = "regulator-gpio";
  84. regulator-name = "SDHI0 VccQ";
  85. regulator-min-microvolt = <1800000>;
  86. regulator-max-microvolt = <3300000>;
  87. gpios = <&gpio6 30 GPIO_ACTIVE_HIGH>;
  88. gpios-states = <1>;
  89. states = <3300000 1>, <1800000 0>;
  90. };
  91. x302_clk: x302-clock {
  92. compatible = "fixed-clock";
  93. #clock-cells = <0>;
  94. clock-frequency = <33000000>;
  95. };
  96. x304_clk: x304-clock {
  97. compatible = "fixed-clock";
  98. #clock-cells = <0>;
  99. clock-frequency = <25000000>;
  100. };
  101. };
  102. &audio_clk_a {
  103. clock-frequency = <22579200>;
  104. };
  105. &du {
  106. status = "okay";
  107. };
  108. &ehci0 {
  109. status = "okay";
  110. };
  111. &ehci1 {
  112. status = "okay";
  113. };
  114. &extal_clk {
  115. clock-frequency = <16666666>;
  116. };
  117. &extalr_clk {
  118. clock-frequency = <32768>;
  119. };
  120. &gpio6 {
  121. usb1-reset-hog {
  122. gpio-hog;
  123. gpios = <10 GPIO_ACTIVE_LOW>;
  124. output-low;
  125. line-name = "usb1-reset";
  126. };
  127. };
  128. &hdmi0 {
  129. status = "okay";
  130. ports {
  131. port@1 {
  132. reg = <1>;
  133. rcar_dw_hdmi0_out: endpoint {
  134. remote-endpoint = <&hdmi0_con>;
  135. };
  136. };
  137. port@2 {
  138. reg = <2>;
  139. dw_hdmi0_snd_in: endpoint {
  140. remote-endpoint = <&rsnd_endpoint>;
  141. };
  142. };
  143. };
  144. };
  145. &hscif0 {
  146. pinctrl-0 = <&hscif0_pins>;
  147. pinctrl-names = "default";
  148. uart-has-rtscts;
  149. status = "okay";
  150. };
  151. &hsusb {
  152. dr_mode = "otg";
  153. status = "okay";
  154. };
  155. &i2c4 {
  156. clock-frequency = <400000>;
  157. status = "okay";
  158. versaclock5: clock-generator@6a {
  159. compatible = "idt,5p49v5923";
  160. reg = <0x6a>;
  161. #clock-cells = <1>;
  162. clocks = <&x304_clk>;
  163. clock-names = "xin";
  164. };
  165. };
  166. &ohci0 {
  167. status = "okay";
  168. };
  169. &ohci1 {
  170. status = "okay";
  171. };
  172. &pcie_bus_clk {
  173. clock-frequency = <100000000>;
  174. };
  175. &pfc {
  176. pinctrl-0 = <&scif_clk_pins>;
  177. pinctrl-names = "default";
  178. hscif0_pins: hscif0 {
  179. groups = "hscif0_data", "hscif0_ctrl";
  180. function = "hscif0";
  181. };
  182. scif2_pins: scif2 {
  183. groups = "scif2_data_a";
  184. function = "scif2";
  185. };
  186. scif_clk_pins: scif_clk {
  187. groups = "scif_clk_a";
  188. function = "scif_clk";
  189. };
  190. sdhi0_pins: sd0 {
  191. groups = "sdhi0_data4", "sdhi0_ctrl";
  192. function = "sdhi0";
  193. power-source = <3300>;
  194. };
  195. sdhi0_pins_uhs: sd0_uhs {
  196. groups = "sdhi0_data4", "sdhi0_ctrl";
  197. function = "sdhi0";
  198. power-source = <1800>;
  199. };
  200. sdhi2_pins: sd2 {
  201. groups = "sdhi2_data4", "sdhi2_ctrl";
  202. function = "sdhi2";
  203. power-source = <1800>;
  204. };
  205. sdhi3_pins: sd3 {
  206. groups = "sdhi3_data8", "sdhi3_ctrl", "sdhi3_ds";
  207. function = "sdhi3";
  208. power-source = <1800>;
  209. };
  210. usb0_pins: usb0 {
  211. groups = "usb0";
  212. function = "usb0";
  213. };
  214. usb1_pins: usb1 {
  215. mux {
  216. groups = "usb1";
  217. function = "usb1";
  218. };
  219. ovc {
  220. pins = "GP_6_27";
  221. bias-pull-up;
  222. };
  223. };
  224. usb30_pins: usb30 {
  225. groups = "usb30";
  226. function = "usb30";
  227. };
  228. };
  229. &rwdt {
  230. timeout-sec = <60>;
  231. status = "okay";
  232. };
  233. &scif2 {
  234. pinctrl-0 = <&scif2_pins>;
  235. pinctrl-names = "default";
  236. status = "okay";
  237. };
  238. &scif_clk {
  239. clock-frequency = <14745600>;
  240. };
  241. &sdhi0 {
  242. pinctrl-0 = <&sdhi0_pins>;
  243. pinctrl-1 = <&sdhi0_pins_uhs>;
  244. pinctrl-names = "default", "state_uhs";
  245. vmmc-supply = <&reg_3p3v>;
  246. vqmmc-supply = <&vccq_sdhi0>;
  247. cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
  248. bus-width = <4>;
  249. sd-uhs-sdr50;
  250. sd-uhs-sdr104;
  251. status = "okay";
  252. };
  253. &sdhi2 {
  254. status = "okay";
  255. pinctrl-0 = <&sdhi2_pins>;
  256. pinctrl-names = "default";
  257. vmmc-supply = <&wlan_en_reg>;
  258. bus-width = <4>;
  259. non-removable;
  260. cap-power-off-card;
  261. keep-power-in-suspend;
  262. #address-cells = <1>;
  263. #size-cells = <0>;
  264. wlcore: wlcore@2 {
  265. compatible = "ti,wl1837";
  266. reg = <2>;
  267. interrupt-parent = <&gpio2>;
  268. interrupts = <5 IRQ_TYPE_LEVEL_HIGH>;
  269. };
  270. };
  271. &sdhi3 {
  272. pinctrl-0 = <&sdhi3_pins>;
  273. pinctrl-1 = <&sdhi3_pins>;
  274. pinctrl-names = "default", "state_uhs";
  275. vmmc-supply = <&reg_3p3v>;
  276. vqmmc-supply = <&reg_1p8v>;
  277. bus-width = <8>;
  278. mmc-hs200-1_8v;
  279. no-sd;
  280. no-sdio;
  281. non-removable;
  282. fixed-emmc-driver-type = <1>;
  283. status = "okay";
  284. };
  285. &usb_extal_clk {
  286. clock-frequency = <50000000>;
  287. };
  288. &usb2_phy0 {
  289. pinctrl-0 = <&usb0_pins>;
  290. pinctrl-names = "default";
  291. vbus-supply = <&vbus0_usb2>;
  292. status = "okay";
  293. };
  294. &usb2_phy1 {
  295. pinctrl-0 = <&usb1_pins>;
  296. pinctrl-names = "default";
  297. status = "okay";
  298. };
  299. &usb3_peri0 {
  300. phys = <&usb3_phy0>;
  301. phy-names = "usb";
  302. companion = <&xhci0>;
  303. status = "okay";
  304. };
  305. &usb3_phy0 {
  306. status = "okay";
  307. };
  308. &usb3s0_clk {
  309. clock-frequency = <100000000>;
  310. };
  311. &xhci0 {
  312. pinctrl-0 = <&usb30_pins>;
  313. pinctrl-names = "default";
  314. status = "okay";
  315. };