beacon-renesom-baseboard.dtsi 14 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright 2020, Compass Electronics Group, LLC
  4. */
  5. #include <dt-bindings/gpio/gpio.h>
  6. #include <dt-bindings/input/input.h>
  7. #include <dt-bindings/clock/versaclock.h>
  8. / {
  9. backlight_lvds: backlight-lvds {
  10. compatible = "pwm-backlight";
  11. power-supply = <&reg_lcd>;
  12. enable-gpios = <&gpio_exp1 3 GPIO_ACTIVE_HIGH>;
  13. pwms = <&pwm2 0 25000>;
  14. brightness-levels = <0 4 8 16 32 64 128 255>;
  15. default-brightness-level = <6>;
  16. };
  17. backlight_dpi: backlight-dpi {
  18. compatible = "pwm-backlight";
  19. power-supply = <&reg_lcd>;
  20. enable-gpios = <&gpio_exp1 7 GPIO_ACTIVE_LOW>;
  21. pwms = <&pwm0 0 25000>;
  22. brightness-levels = <0 25 33 50 63 75 88 100>;
  23. default-brightness-level = <6>;
  24. };
  25. hdmi0-out {
  26. compatible = "hdmi-connector";
  27. type = "a";
  28. port {
  29. hdmi0_con: endpoint {
  30. remote-endpoint = <&rcar_dw_hdmi0_out>;
  31. };
  32. };
  33. };
  34. keys {
  35. compatible = "gpio-keys";
  36. key-1 { /* S19 */
  37. gpios = <&gpio4 6 GPIO_ACTIVE_LOW>;
  38. linux,code = <KEY_UP>;
  39. label = "Up";
  40. wakeup-source;
  41. debounce-interval = <20>;
  42. };
  43. key-2 { /*S20 */
  44. gpios = <&gpio3 13 GPIO_ACTIVE_LOW>;
  45. linux,code = <KEY_LEFT>;
  46. label = "Left";
  47. wakeup-source;
  48. debounce-interval = <20>;
  49. };
  50. key-3 { /* S21 */
  51. gpios = <&gpio5 17 GPIO_ACTIVE_LOW>;
  52. linux,code = <KEY_DOWN>;
  53. label = "Down";
  54. wakeup-source;
  55. debounce-interval = <20>;
  56. };
  57. key-4 { /* S22 */
  58. gpios = <&gpio5 20 GPIO_ACTIVE_LOW>;
  59. linux,code = <KEY_RIGHT>;
  60. label = "Right";
  61. wakeup-source;
  62. debounce-interval = <20>;
  63. };
  64. key-5 { /* S23 */
  65. gpios = <&gpio5 22 GPIO_ACTIVE_LOW>;
  66. linux,code = <KEY_ENTER>;
  67. label = "Center";
  68. wakeup-source;
  69. debounce-interval = <20>;
  70. };
  71. };
  72. leds {
  73. compatible = "gpio-leds";
  74. pinctrl-0 = <&led_pins>;
  75. pinctrl-names = "default";
  76. led0 {
  77. gpios = <&gpio0 4 GPIO_ACTIVE_HIGH>;
  78. label = "LED0";
  79. linux,default-trigger = "heartbeat";
  80. };
  81. led1 {
  82. gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>;
  83. label = "LED1";
  84. };
  85. led2 {
  86. gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
  87. label = "LED2";
  88. };
  89. led3 {
  90. gpios = <&gpio7 3 GPIO_ACTIVE_HIGH>;
  91. label = "LED3";
  92. };
  93. };
  94. lvds {
  95. compatible = "panel-lvds";
  96. power-supply = <&reg_lcd_reset>;
  97. width-mm = <223>;
  98. height-mm = <125>;
  99. backlight = <&backlight_lvds>;
  100. data-mapping = "vesa-24";
  101. panel-timing {
  102. /* 800x480@60Hz */
  103. clock-frequency = <30000000>;
  104. hactive = <800>;
  105. vactive = <480>;
  106. hsync-len = <48>;
  107. hfront-porch = <40>;
  108. hback-porch = <40>;
  109. vfront-porch = <13>;
  110. vback-porch = <29>;
  111. vsync-len = <1>;
  112. hsync-active = <1>;
  113. vsync-active = <3>;
  114. de-active = <1>;
  115. pixelclk-active = <0>;
  116. };
  117. port {
  118. panel_in: endpoint {
  119. remote-endpoint = <&lvds0_out>;
  120. };
  121. };
  122. };
  123. rgb {
  124. /* Different LCD with compatible timings */
  125. compatible = "rocktech,rk070er9427";
  126. backlight = <&backlight_dpi>;
  127. enable-gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
  128. power-supply = <&reg_lcd>;
  129. port {
  130. rgb_panel: endpoint {
  131. remote-endpoint = <&du_out_rgb>;
  132. };
  133. };
  134. };
  135. reg_audio: regulator-audio {
  136. compatible = "regulator-fixed";
  137. regulator-name = "audio-1.8V";
  138. regulator-min-microvolt = <1800000>;
  139. regulator-max-microvolt = <1800000>;
  140. gpio = <&gpio_exp4 1 GPIO_ACTIVE_HIGH>;
  141. enable-active-high;
  142. };
  143. reg_lcd: regulator-lcd {
  144. compatible = "regulator-fixed";
  145. regulator-name = "lcd_panel_pwr";
  146. regulator-min-microvolt = <3300000>;
  147. regulator-max-microvolt = <3300000>;
  148. gpio = <&gpio_exp1 1 GPIO_ACTIVE_HIGH>;
  149. enable-active-high;
  150. };
  151. reg_lcd_reset: regulator-lcd-reset {
  152. compatible = "regulator-fixed";
  153. regulator-name = "nLCD_RESET";
  154. regulator-min-microvolt = <3300000>;
  155. regulator-max-microvolt = <3300000>;
  156. gpio = <&gpio5 3 GPIO_ACTIVE_HIGH>;
  157. enable-active-high;
  158. vin-supply = <&reg_lcd>;
  159. };
  160. reg_cam0: regulator-cam0 {
  161. compatible = "regulator-fixed";
  162. regulator-name = "reg_cam0";
  163. regulator-min-microvolt = <1800000>;
  164. regulator-max-microvolt = <1800000>;
  165. gpio = <&gpio_exp2 2 GPIO_ACTIVE_HIGH>;
  166. enable-active-high;
  167. };
  168. reg_cam1: regulator-cam1 {
  169. compatible = "regulator-fixed";
  170. regulator-name = "reg_cam1";
  171. regulator-min-microvolt = <1800000>;
  172. regulator-max-microvolt = <1800000>;
  173. gpio = <&gpio_exp2 5 GPIO_ACTIVE_HIGH>;
  174. enable-active-high;
  175. startup-delay-us = <100000>;
  176. };
  177. sound_card {
  178. compatible = "audio-graph-card";
  179. label = "rcar-sound";
  180. dais = <&rsnd_port0>, <&rsnd_port1>;
  181. widgets = "Microphone", "Mic Jack",
  182. "Line", "Line In Jack",
  183. "Headphone", "Headphone Jack";
  184. mic-det-gpio = <&gpio0 2 GPIO_ACTIVE_LOW>;
  185. routing = "Headphone Jack", "HPOUTL",
  186. "Headphone Jack", "HPOUTR",
  187. "IN3R", "MICBIAS",
  188. "Mic Jack", "IN3R";
  189. };
  190. vccq_sdhi0: regulator-vccq-sdhi0 {
  191. compatible = "regulator-gpio";
  192. regulator-name = "SDHI0 VccQ";
  193. regulator-min-microvolt = <1800000>;
  194. regulator-max-microvolt = <3300000>;
  195. gpios = <&gpio6 30 GPIO_ACTIVE_HIGH>;
  196. gpios-states = <1>;
  197. states = <3300000 1>, <1800000 0>;
  198. };
  199. /* External DU dot clocks */
  200. x302_clk: x302-clock {
  201. compatible = "fixed-clock";
  202. #clock-cells = <0>;
  203. clock-frequency = <33000000>;
  204. };
  205. x304_clk: x304-clock {
  206. compatible = "fixed-clock";
  207. #clock-cells = <0>;
  208. clock-frequency = <25000000>;
  209. };
  210. connector {
  211. compatible = "usb-c-connector";
  212. label = "USB-C";
  213. data-role = "dual";
  214. ports {
  215. #address-cells = <1>;
  216. #size-cells = <0>;
  217. port@0 {
  218. reg = <0>;
  219. hs_ep: endpoint {
  220. remote-endpoint = <&usb3_hs_ep>;
  221. };
  222. };
  223. port@1 {
  224. reg = <1>;
  225. ss_ep: endpoint {
  226. remote-endpoint = <&hd3ss3220_in_ep>;
  227. };
  228. };
  229. };
  230. };
  231. };
  232. &audio_clk_b {
  233. clock-frequency = <22579200>;
  234. };
  235. &can0 {
  236. pinctrl-0 = <&can0_pins>;
  237. pinctrl-names = "default";
  238. renesas,can-clock-select = <0x0>;
  239. status = "okay";
  240. };
  241. &can1 {
  242. pinctrl-0 = <&can1_pins>;
  243. pinctrl-names = "default";
  244. renesas,can-clock-select = <0x0>;
  245. status = "okay";
  246. };
  247. &du {
  248. ports {
  249. port@0 {
  250. du_out_rgb: endpoint {
  251. remote-endpoint = <&rgb_panel>;
  252. };
  253. };
  254. };
  255. };
  256. &ehci0 {
  257. dr_mode = "otg";
  258. status = "okay";
  259. clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>, <&usb2_clksel>, <&versaclock5 3>;
  260. };
  261. &ehci1 {
  262. status = "okay";
  263. clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>, <&usb2_clksel>, <&versaclock5 3>;
  264. };
  265. &hdmi0 {
  266. status = "okay";
  267. ports {
  268. #address-cells = <1>;
  269. #size-cells = <0>;
  270. port@0 {
  271. reg = <0>;
  272. dw_hdmi0_in: endpoint {
  273. remote-endpoint = <&du_out_hdmi0>;
  274. };
  275. };
  276. port@1 {
  277. reg = <1>;
  278. rcar_dw_hdmi0_out: endpoint {
  279. remote-endpoint = <&hdmi0_con>;
  280. };
  281. };
  282. port@2 {
  283. reg = <2>;
  284. dw_hdmi0_snd_in: endpoint {
  285. remote-endpoint = <&rsnd_endpoint1>;
  286. };
  287. };
  288. };
  289. };
  290. &hscif1 {
  291. pinctrl-0 = <&hscif1_pins>;
  292. pinctrl-names = "default";
  293. uart-has-rtscts;
  294. status = "okay";
  295. };
  296. &hsusb {
  297. dr_mode = "otg";
  298. status = "okay";
  299. };
  300. &i2c2 {
  301. status = "okay";
  302. clock-frequency = <400000>;
  303. pinctrl-0 = <&i2c2_pins>;
  304. pinctrl-names = "default";
  305. gpio_exp2: gpio@21 {
  306. compatible = "onnn,pca9654";
  307. reg = <0x21>;
  308. gpio-controller;
  309. #gpio-cells = <2>;
  310. };
  311. gpio_exp3: gpio@22 {
  312. compatible = "onnn,pca9654";
  313. reg = <0x22>;
  314. gpio-controller;
  315. #gpio-cells = <2>;
  316. };
  317. gpio_exp4: gpio@23 {
  318. compatible = "onnn,pca9654";
  319. reg = <0x23>;
  320. gpio-controller;
  321. #gpio-cells = <2>;
  322. };
  323. versaclock6_bb: clock-controller@6a {
  324. compatible = "idt,5p49v6965";
  325. reg = <0x6a>;
  326. #clock-cells = <1>;
  327. clocks = <&x304_clk>;
  328. clock-names = "xin";
  329. assigned-clocks = <&versaclock6_bb 1>, <&versaclock6_bb 2>,
  330. <&versaclock6_bb 3>, <&versaclock6_bb 4>;
  331. assigned-clock-rates = <24000000>, <24000000>, <24000000>,
  332. <24576000>;
  333. OUT1 {
  334. idt,mode = <VC5_CMOS>;
  335. idt,voltage-microvolt = <1800000>;
  336. idt,slew-percent = <100>;
  337. };
  338. OUT2 {
  339. idt,mode = <VC5_CMOS>;
  340. idt,voltage-microvolt = <1800000>;
  341. idt,slew-percent = <100>;
  342. };
  343. OUT3 {
  344. idt,mode = <VC5_CMOS>;
  345. idt,voltage-microvolt = <3300000>;
  346. idt,slew-percent = <100>;
  347. };
  348. OUT4 {
  349. idt,mode = <VC5_CMOS>;
  350. idt,voltage-microvolt = <3300000>;
  351. idt,slew-percent = <100>;
  352. };
  353. };
  354. };
  355. &i2c0 {
  356. status = "okay";
  357. clock-frequency = <400000>;
  358. pinctrl-0 = <&i2c0_pins>;
  359. pinctrl-names = "default";
  360. };
  361. &i2c5 {
  362. status = "okay";
  363. clock-frequency = <400000>;
  364. pinctrl-0 = <&i2c5_pins>;
  365. pinctrl-names = "default";
  366. codec: wm8962@1a {
  367. compatible = "wlf,wm8962";
  368. reg = <0x1a>;
  369. clocks = <&versaclock6_bb 3>;
  370. DCVDD-supply = <&reg_audio>;
  371. DBVDD-supply = <&reg_audio>;
  372. AVDD-supply = <&reg_audio>;
  373. CPVDD-supply = <&reg_audio>;
  374. MICVDD-supply = <&reg_audio>;
  375. PLLVDD-supply = <&reg_audio>;
  376. SPKVDD1-supply = <&reg_audio>;
  377. SPKVDD2-supply = <&reg_audio>;
  378. gpio-cfg = <
  379. 0x0000 /* 0:Default */
  380. 0x0000 /* 1:Default */
  381. 0x0000 /* 2:Default */
  382. 0x0000 /* 3:Default */
  383. 0x0000 /* 4:Default */
  384. 0x0000 /* 5:Default */
  385. >;
  386. port {
  387. wm8962_endpoint: endpoint {
  388. remote-endpoint = <&rsnd_endpoint0>;
  389. };
  390. };
  391. };
  392. touchscreen@26 {
  393. compatible = "ilitek,ili2117";
  394. reg = <0x26>;
  395. interrupt-parent = <&gpio5>;
  396. interrupts = <9 IRQ_TYPE_EDGE_RISING>;
  397. wakeup-source;
  398. };
  399. hd3ss3220@47 {
  400. compatible = "ti,hd3ss3220";
  401. reg = <0x47>;
  402. interrupt-parent = <&gpio6>;
  403. interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
  404. ports {
  405. #address-cells = <1>;
  406. #size-cells = <0>;
  407. port@0 {
  408. reg = <0>;
  409. hd3ss3220_in_ep: endpoint {
  410. remote-endpoint = <&ss_ep>;
  411. };
  412. };
  413. port@1 {
  414. reg = <1>;
  415. hd3ss3220_out_ep: endpoint {
  416. remote-endpoint = <&usb3_role_switch>;
  417. };
  418. };
  419. };
  420. };
  421. gpio_exp1: gpio@70 {
  422. compatible = "nxp,pca9538";
  423. reg = <0x70>;
  424. gpio-controller;
  425. #gpio-cells = <2>;
  426. gpio-line-names = "lcd_reset", "lcd_pwr", "lcd_select",
  427. "backlight-enable", "Touch_shdwn",
  428. "LCD_H_pol", "lcd_V_pol";
  429. };
  430. };
  431. &lvds0 {
  432. status = "okay";
  433. ports {
  434. port@1 {
  435. lvds0_out: endpoint {
  436. remote-endpoint = <&panel_in>;
  437. };
  438. };
  439. };
  440. };
  441. &msiof1 {
  442. pinctrl-0 = <&msiof1_pins>;
  443. pinctrl-names = "default";
  444. status = "okay";
  445. cs-gpios = <&gpio3 10 GPIO_ACTIVE_LOW>;
  446. };
  447. &ohci0 {
  448. dr_mode = "otg";
  449. status = "okay";
  450. };
  451. &ohci1 {
  452. status = "okay";
  453. };
  454. &pciec0 {
  455. status = "okay";
  456. };
  457. &pciec1 {
  458. status = "okay";
  459. };
  460. &pcie_bus_clk {
  461. clock-frequency = <100000000>;
  462. };
  463. &pfc {
  464. can0_pins: can0 {
  465. groups = "can0_data_a";
  466. function = "can0";
  467. };
  468. can1_pins: can1 {
  469. groups = "can1_data";
  470. function = "can1";
  471. };
  472. du_pins: du {
  473. groups = "du_rgb888", "du_sync", "du_clk_out_1", "du_disp";
  474. function = "du";
  475. };
  476. i2c2_pins: i2c2 {
  477. groups = "i2c2_a";
  478. function = "i2c2";
  479. };
  480. i2c5_pins: i2c5 {
  481. groups = "i2c5";
  482. function = "i2c5";
  483. };
  484. led_pins: leds {
  485. /* GP_0_4 , AVS1, AVS2, GP_7_3 */
  486. pins = "GP_0_4", "GP_7_0", "GP_7_1", "GP_7_3";
  487. bias-pull-down;
  488. };
  489. msiof1_pins: msiof1 {
  490. groups = "msiof1_clk_g", "msiof1_rxd_g", "msiof1_txd_g";
  491. function = "msiof1";
  492. };
  493. pwm0_pins: pwm0 {
  494. groups = "pwm0";
  495. function = "pwm0";
  496. };
  497. pwm2_pins: pwm2 {
  498. groups = "pwm2_a";
  499. function = "pwm2";
  500. };
  501. sdhi0_pins: sd0 {
  502. groups = "sdhi0_data4", "sdhi0_ctrl";
  503. function = "sdhi0";
  504. power-source = <3300>;
  505. };
  506. sdhi0_pins_uhs: sd0_uhs {
  507. groups = "sdhi0_data4", "sdhi0_ctrl";
  508. function = "sdhi0";
  509. power-source = <1800>;
  510. };
  511. sound_pins: sound {
  512. groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
  513. function = "ssi";
  514. };
  515. sound_clk_pins: sound_clk {
  516. groups = "audio_clk_a_a", "audio_clk_b_a";
  517. function = "audio_clk";
  518. };
  519. usb0_pins: usb0 {
  520. mux {
  521. groups = "usb0";
  522. function = "usb0";
  523. };
  524. };
  525. usb1_pins: usb1 {
  526. mux {
  527. groups = "usb1";
  528. function = "usb1";
  529. };
  530. };
  531. usb30_pins: usb30 {
  532. mux {
  533. groups = "usb30";
  534. function = "usb30";
  535. };
  536. };
  537. };
  538. &pwm0 {
  539. pinctrl-0 = <&pwm0_pins>;
  540. pinctrl-names = "default";
  541. status = "okay";
  542. };
  543. &pwm2 {
  544. pinctrl-0 = <&pwm2_pins>;
  545. pinctrl-names = "default";
  546. status = "okay";
  547. };
  548. &rcar_sound {
  549. pinctrl-0 = <&sound_pins>, <&sound_clk_pins>;
  550. pinctrl-names = "default";
  551. /* Single DAI */
  552. #sound-dai-cells = <0>;
  553. /* audio_clkout0/1/2/3 */
  554. #clock-cells = <1>;
  555. clock-frequency = <11289600>;
  556. status = "okay";
  557. ports {
  558. #address-cells = <1>;
  559. #size-cells = <0>;
  560. rsnd_port0: port@0 {
  561. reg = <0>;
  562. rsnd_endpoint0: endpoint {
  563. remote-endpoint = <&wm8962_endpoint>;
  564. dai-format = "i2s";
  565. bitclock-master = <&rsnd_endpoint0>;
  566. frame-master = <&rsnd_endpoint0>;
  567. playback = <&ssi1>, <&dvc1>, <&src1>;
  568. capture = <&ssi0>;
  569. };
  570. };
  571. rsnd_port1: port@1 {
  572. reg = <0x01>;
  573. rsnd_endpoint1: endpoint {
  574. remote-endpoint = <&dw_hdmi0_snd_in>;
  575. dai-format = "i2s";
  576. bitclock-master = <&rsnd_endpoint1>;
  577. frame-master = <&rsnd_endpoint1>;
  578. playback = <&ssi2>;
  579. };
  580. };
  581. };
  582. };
  583. &rwdt {
  584. status = "okay";
  585. timeout-sec = <60>;
  586. };
  587. &scif0 {
  588. pinctrl-0 = <&scif0_pins>;
  589. pinctrl-names = "default";
  590. status = "okay";
  591. };
  592. &scif5 {
  593. pinctrl-0 = <&scif5_pins>;
  594. pinctrl-names = "default";
  595. status = "okay";
  596. };
  597. &scif_clk {
  598. clock-frequency = <14745600>;
  599. };
  600. &sdhi0 {
  601. pinctrl-0 = <&sdhi0_pins>;
  602. pinctrl-1 = <&sdhi0_pins_uhs>;
  603. pinctrl-names = "default", "state_uhs";
  604. vmmc-supply = <&reg_3p3v>;
  605. vqmmc-supply = <&vccq_sdhi0>;
  606. cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
  607. bus-width = <4>;
  608. sd-uhs-sdr50;
  609. sd-uhs-sdr104;
  610. status = "okay";
  611. };
  612. &ssi1 {
  613. shared-pin;
  614. };
  615. &tmu0 {
  616. status = "okay";
  617. };
  618. &tmu1 {
  619. status = "okay";
  620. };
  621. &tmu2 {
  622. status = "okay";
  623. };
  624. &tmu3 {
  625. status = "okay";
  626. };
  627. &tmu4 {
  628. status = "okay";
  629. };
  630. &usb2_phy0 {
  631. pinctrl-0 = <&usb0_pins>;
  632. pinctrl-names = "default";
  633. status = "okay";
  634. };
  635. &usb2_phy1 {
  636. pinctrl-0 = <&usb1_pins>;
  637. pinctrl-names = "default";
  638. status = "okay";
  639. };
  640. &usb3_peri0 {
  641. companion = <&xhci0>;
  642. status = "okay";
  643. usb-role-switch;
  644. ports {
  645. #address-cells = <1>;
  646. #size-cells = <0>;
  647. port@0 {
  648. reg = <0>;
  649. usb3_hs_ep: endpoint {
  650. remote-endpoint = <&hs_ep>;
  651. };
  652. };
  653. port@1 {
  654. reg = <1>;
  655. usb3_role_switch: endpoint {
  656. remote-endpoint = <&hd3ss3220_out_ep>;
  657. };
  658. };
  659. };
  660. };
  661. &usb3_phy0 {
  662. status = "okay";
  663. };
  664. &vin0 {
  665. status = "okay";
  666. };
  667. &vin1 {
  668. status = "okay";
  669. };
  670. &vin2 {
  671. status = "okay";
  672. };
  673. &vin3 {
  674. status = "okay";
  675. };
  676. &vin4 {
  677. status = "okay";
  678. };
  679. &vin5 {
  680. status = "okay";
  681. };
  682. &vin6 {
  683. status = "okay";
  684. };
  685. &vin7 {
  686. status = "okay";
  687. };
  688. &xhci0
  689. {
  690. pinctrl-0 = <&usb30_pins>;
  691. pinctrl-names = "default";
  692. status = "okay";
  693. };