sdm845-db845c.dts 24 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (c) 2019, Linaro Ltd.
  4. */
  5. /dts-v1/;
  6. #include <dt-bindings/leds/common.h>
  7. #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
  8. #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
  9. #include <dt-bindings/sound/qcom,q6afe.h>
  10. #include <dt-bindings/sound/qcom,q6asm.h>
  11. #include "sdm845.dtsi"
  12. #include "pm8998.dtsi"
  13. #include "pmi8998.dtsi"
  14. / {
  15. model = "Thundercomm Dragonboard 845c";
  16. compatible = "thundercomm,db845c", "qcom,sdm845";
  17. qcom,msm-id = <341 0x20001>;
  18. qcom,board-id = <8 0>;
  19. aliases {
  20. serial0 = &uart9;
  21. hsuart0 = &uart6;
  22. };
  23. chosen {
  24. stdout-path = "serial0:115200n8";
  25. };
  26. /* Fixed crystal oscillator dedicated to MCP2517FD */
  27. clk40M: can-clock {
  28. compatible = "fixed-clock";
  29. #clock-cells = <0>;
  30. clock-frequency = <40000000>;
  31. };
  32. dc12v: dc12v-regulator {
  33. compatible = "regulator-fixed";
  34. regulator-name = "DC12V";
  35. regulator-min-microvolt = <12000000>;
  36. regulator-max-microvolt = <12000000>;
  37. regulator-always-on;
  38. };
  39. gpio-keys {
  40. compatible = "gpio-keys";
  41. autorepeat;
  42. pinctrl-names = "default";
  43. pinctrl-0 = <&vol_up_pin_a>;
  44. key-vol-up {
  45. label = "Volume Up";
  46. linux,code = <KEY_VOLUMEUP>;
  47. gpios = <&pm8998_gpio 6 GPIO_ACTIVE_LOW>;
  48. };
  49. };
  50. leds {
  51. compatible = "gpio-leds";
  52. led-0 {
  53. label = "green:user4";
  54. function = LED_FUNCTION_INDICATOR;
  55. color = <LED_COLOR_ID_GREEN>;
  56. gpios = <&pm8998_gpio 13 GPIO_ACTIVE_HIGH>;
  57. linux,default-trigger = "panic-indicator";
  58. default-state = "off";
  59. };
  60. led-1 {
  61. label = "yellow:wlan";
  62. function = LED_FUNCTION_WLAN;
  63. color = <LED_COLOR_ID_YELLOW>;
  64. gpios = <&pm8998_gpio 9 GPIO_ACTIVE_HIGH>;
  65. linux,default-trigger = "phy0tx";
  66. default-state = "off";
  67. };
  68. led-2 {
  69. label = "blue:bt";
  70. function = LED_FUNCTION_BLUETOOTH;
  71. color = <LED_COLOR_ID_BLUE>;
  72. gpios = <&pm8998_gpio 5 GPIO_ACTIVE_HIGH>;
  73. linux,default-trigger = "bluetooth-power";
  74. default-state = "off";
  75. };
  76. };
  77. hdmi-out {
  78. compatible = "hdmi-connector";
  79. type = "a";
  80. port {
  81. hdmi_con: endpoint {
  82. remote-endpoint = <&lt9611_out>;
  83. };
  84. };
  85. };
  86. reserved-memory {
  87. /* Cont splash region set up by the bootloader */
  88. cont_splash_mem: framebuffer@9d400000 {
  89. reg = <0x0 0x9d400000 0x0 0x2400000>;
  90. no-map;
  91. };
  92. };
  93. lt9611_1v8: lt9611-vdd18-regulator {
  94. compatible = "regulator-fixed";
  95. regulator-name = "LT9611_1V8";
  96. vin-supply = <&vdc_5v>;
  97. regulator-min-microvolt = <1800000>;
  98. regulator-max-microvolt = <1800000>;
  99. gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
  100. enable-active-high;
  101. };
  102. lt9611_3v3: lt9611-3v3 {
  103. compatible = "regulator-fixed";
  104. regulator-name = "LT9611_3V3";
  105. vin-supply = <&vdc_3v3>;
  106. regulator-min-microvolt = <3300000>;
  107. regulator-max-microvolt = <3300000>;
  108. // TODO: make it possible to drive same GPIO from two clients
  109. // gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
  110. // enable-active-high;
  111. };
  112. pcie0_1p05v: pcie-0-1p05v-regulator {
  113. compatible = "regulator-fixed";
  114. regulator-name = "PCIE0_1.05V";
  115. vin-supply = <&vbat>;
  116. regulator-min-microvolt = <1050000>;
  117. regulator-max-microvolt = <1050000>;
  118. // TODO: make it possible to drive same GPIO from two clients
  119. // gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>;
  120. // enable-active-high;
  121. };
  122. cam0_dvdd_1v2: reg_cam0_dvdd_1v2 {
  123. compatible = "regulator-fixed";
  124. regulator-name = "CAM0_DVDD_1V2";
  125. regulator-min-microvolt = <1200000>;
  126. regulator-max-microvolt = <1200000>;
  127. enable-active-high;
  128. gpio = <&pm8998_gpio 12 GPIO_ACTIVE_HIGH>;
  129. pinctrl-names = "default";
  130. pinctrl-0 = <&cam0_dvdd_1v2_en_default>;
  131. vin-supply = <&vbat>;
  132. };
  133. cam0_avdd_2v8: reg_cam0_avdd_2v8 {
  134. compatible = "regulator-fixed";
  135. regulator-name = "CAM0_AVDD_2V8";
  136. regulator-min-microvolt = <2800000>;
  137. regulator-max-microvolt = <2800000>;
  138. enable-active-high;
  139. gpio = <&pm8998_gpio 10 GPIO_ACTIVE_HIGH>;
  140. pinctrl-names = "default";
  141. pinctrl-0 = <&cam0_avdd_2v8_en_default>;
  142. vin-supply = <&vbat>;
  143. };
  144. /* This regulator is enabled when the VREG_LVS1A_1P8 trace is enabled */
  145. cam3_avdd_2v8: reg_cam3_avdd_2v8 {
  146. compatible = "regulator-fixed";
  147. regulator-name = "CAM3_AVDD_2V8";
  148. regulator-min-microvolt = <2800000>;
  149. regulator-max-microvolt = <2800000>;
  150. regulator-always-on;
  151. vin-supply = <&vbat>;
  152. };
  153. pcie0_3p3v_dual: vldo-3v3-regulator {
  154. compatible = "regulator-fixed";
  155. regulator-name = "VLDO_3V3";
  156. vin-supply = <&vbat>;
  157. regulator-min-microvolt = <3300000>;
  158. regulator-max-microvolt = <3300000>;
  159. gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>;
  160. enable-active-high;
  161. pinctrl-names = "default";
  162. pinctrl-0 = <&pcie0_pwren_state>;
  163. };
  164. v5p0_hdmiout: v5p0-hdmiout-regulator {
  165. compatible = "regulator-fixed";
  166. regulator-name = "V5P0_HDMIOUT";
  167. vin-supply = <&vdc_5v>;
  168. regulator-min-microvolt = <500000>;
  169. regulator-max-microvolt = <500000>;
  170. // TODO: make it possible to drive same GPIO from two clients
  171. // gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
  172. // enable-active-high;
  173. };
  174. vbat: vbat-regulator {
  175. compatible = "regulator-fixed";
  176. regulator-name = "VBAT";
  177. vin-supply = <&dc12v>;
  178. regulator-min-microvolt = <4200000>;
  179. regulator-max-microvolt = <4200000>;
  180. regulator-always-on;
  181. };
  182. vbat_som: vbat-som-regulator {
  183. compatible = "regulator-fixed";
  184. regulator-name = "VBAT_SOM";
  185. vin-supply = <&dc12v>;
  186. regulator-min-microvolt = <4200000>;
  187. regulator-max-microvolt = <4200000>;
  188. regulator-always-on;
  189. };
  190. vdc_3v3: vdc-3v3-regulator {
  191. compatible = "regulator-fixed";
  192. regulator-name = "VDC_3V3";
  193. vin-supply = <&dc12v>;
  194. regulator-min-microvolt = <3300000>;
  195. regulator-max-microvolt = <3300000>;
  196. regulator-always-on;
  197. };
  198. vdc_5v: vdc-5v-regulator {
  199. compatible = "regulator-fixed";
  200. regulator-name = "VDC_5V";
  201. vin-supply = <&dc12v>;
  202. regulator-min-microvolt = <500000>;
  203. regulator-max-microvolt = <500000>;
  204. regulator-always-on;
  205. };
  206. vreg_s4a_1p8: vreg-s4a-1p8 {
  207. compatible = "regulator-fixed";
  208. regulator-name = "vreg_s4a_1p8";
  209. regulator-min-microvolt = <1800000>;
  210. regulator-max-microvolt = <1800000>;
  211. regulator-always-on;
  212. };
  213. vph_pwr: vph-pwr-regulator {
  214. compatible = "regulator-fixed";
  215. regulator-name = "vph_pwr";
  216. vin-supply = <&vbat_som>;
  217. };
  218. };
  219. &adsp_pas {
  220. status = "okay";
  221. firmware-name = "qcom/sdm845/adsp.mbn";
  222. };
  223. &apps_rsc {
  224. pm8998-rpmh-regulators {
  225. compatible = "qcom,pm8998-rpmh-regulators";
  226. qcom,pmic-id = "a";
  227. vdd-s1-supply = <&vph_pwr>;
  228. vdd-s2-supply = <&vph_pwr>;
  229. vdd-s3-supply = <&vph_pwr>;
  230. vdd-s4-supply = <&vph_pwr>;
  231. vdd-s5-supply = <&vph_pwr>;
  232. vdd-s6-supply = <&vph_pwr>;
  233. vdd-s7-supply = <&vph_pwr>;
  234. vdd-s8-supply = <&vph_pwr>;
  235. vdd-s9-supply = <&vph_pwr>;
  236. vdd-s10-supply = <&vph_pwr>;
  237. vdd-s11-supply = <&vph_pwr>;
  238. vdd-s12-supply = <&vph_pwr>;
  239. vdd-s13-supply = <&vph_pwr>;
  240. vdd-l1-l27-supply = <&vreg_s7a_1p025>;
  241. vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>;
  242. vdd-l3-l11-supply = <&vreg_s7a_1p025>;
  243. vdd-l4-l5-supply = <&vreg_s7a_1p025>;
  244. vdd-l6-supply = <&vph_pwr>;
  245. vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>;
  246. vdd-l9-supply = <&vreg_bob>;
  247. vdd-l10-l23-l25-supply = <&vreg_bob>;
  248. vdd-l13-l19-l21-supply = <&vreg_bob>;
  249. vdd-l16-l28-supply = <&vreg_bob>;
  250. vdd-l18-l22-supply = <&vreg_bob>;
  251. vdd-l20-l24-supply = <&vreg_bob>;
  252. vdd-l26-supply = <&vreg_s3a_1p35>;
  253. vin-lvs-1-2-supply = <&vreg_s4a_1p8>;
  254. vreg_s3a_1p35: smps3 {
  255. regulator-min-microvolt = <1352000>;
  256. regulator-max-microvolt = <1352000>;
  257. };
  258. vreg_s5a_2p04: smps5 {
  259. regulator-min-microvolt = <1904000>;
  260. regulator-max-microvolt = <2040000>;
  261. };
  262. vreg_s7a_1p025: smps7 {
  263. regulator-min-microvolt = <900000>;
  264. regulator-max-microvolt = <1028000>;
  265. };
  266. vreg_l1a_0p875: ldo1 {
  267. regulator-min-microvolt = <880000>;
  268. regulator-max-microvolt = <880000>;
  269. regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
  270. };
  271. vreg_l5a_0p8: ldo5 {
  272. regulator-min-microvolt = <800000>;
  273. regulator-max-microvolt = <800000>;
  274. regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
  275. };
  276. vreg_l12a_1p8: ldo12 {
  277. regulator-min-microvolt = <1800000>;
  278. regulator-max-microvolt = <1800000>;
  279. regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
  280. };
  281. vreg_l7a_1p8: ldo7 {
  282. regulator-min-microvolt = <1800000>;
  283. regulator-max-microvolt = <1800000>;
  284. regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
  285. };
  286. vreg_l13a_2p95: ldo13 {
  287. regulator-min-microvolt = <1800000>;
  288. regulator-max-microvolt = <2960000>;
  289. regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
  290. };
  291. vreg_l17a_1p3: ldo17 {
  292. regulator-min-microvolt = <1304000>;
  293. regulator-max-microvolt = <1304000>;
  294. regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
  295. };
  296. vreg_l20a_2p95: ldo20 {
  297. regulator-min-microvolt = <2960000>;
  298. regulator-max-microvolt = <2968000>;
  299. regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
  300. };
  301. vreg_l21a_2p95: ldo21 {
  302. regulator-min-microvolt = <2960000>;
  303. regulator-max-microvolt = <2968000>;
  304. regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
  305. };
  306. vreg_l24a_3p075: ldo24 {
  307. regulator-min-microvolt = <3088000>;
  308. regulator-max-microvolt = <3088000>;
  309. regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
  310. };
  311. vreg_l25a_3p3: ldo25 {
  312. regulator-min-microvolt = <3300000>;
  313. regulator-max-microvolt = <3312000>;
  314. regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
  315. };
  316. vreg_l26a_1p2: ldo26 {
  317. regulator-min-microvolt = <1200000>;
  318. regulator-max-microvolt = <1200000>;
  319. regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
  320. };
  321. vreg_lvs1a_1p8: lvs1 {
  322. regulator-min-microvolt = <1800000>;
  323. regulator-max-microvolt = <1800000>;
  324. regulator-always-on;
  325. };
  326. vreg_lvs2a_1p8: lvs2 {
  327. regulator-min-microvolt = <1800000>;
  328. regulator-max-microvolt = <1800000>;
  329. regulator-always-on;
  330. };
  331. };
  332. pmi8998-rpmh-regulators {
  333. compatible = "qcom,pmi8998-rpmh-regulators";
  334. qcom,pmic-id = "b";
  335. vdd-bob-supply = <&vph_pwr>;
  336. vreg_bob: bob {
  337. regulator-min-microvolt = <3312000>;
  338. regulator-max-microvolt = <3600000>;
  339. regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
  340. regulator-allow-bypass;
  341. };
  342. };
  343. };
  344. &cdsp_pas {
  345. status = "okay";
  346. firmware-name = "qcom/sdm845/cdsp.mbn";
  347. };
  348. &dsi0 {
  349. status = "okay";
  350. vdda-supply = <&vreg_l26a_1p2>;
  351. ports {
  352. port@1 {
  353. endpoint {
  354. remote-endpoint = <&lt9611_a>;
  355. data-lanes = <0 1 2 3>;
  356. };
  357. };
  358. };
  359. };
  360. &dsi0_phy {
  361. status = "okay";
  362. vdds-supply = <&vreg_l1a_0p875>;
  363. };
  364. &gcc {
  365. protected-clocks = <GCC_QSPI_CORE_CLK>,
  366. <GCC_QSPI_CORE_CLK_SRC>,
  367. <GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
  368. <GCC_LPASS_Q6_AXI_CLK>,
  369. <GCC_LPASS_SWAY_CLK>;
  370. };
  371. &gmu {
  372. status = "okay";
  373. };
  374. &gpi_dma0 {
  375. status = "okay";
  376. };
  377. &gpi_dma1 {
  378. status = "okay";
  379. };
  380. &gpu {
  381. status = "okay";
  382. zap-shader {
  383. memory-region = <&gpu_mem>;
  384. firmware-name = "qcom/sdm845/a630_zap.mbn";
  385. };
  386. };
  387. &i2c10 {
  388. status = "okay";
  389. clock-frequency = <400000>;
  390. lt9611_codec: hdmi-bridge@3b {
  391. compatible = "lontium,lt9611";
  392. reg = <0x3b>;
  393. #sound-dai-cells = <1>;
  394. interrupts-extended = <&tlmm 84 IRQ_TYPE_EDGE_FALLING>;
  395. reset-gpios = <&tlmm 128 GPIO_ACTIVE_HIGH>;
  396. vdd-supply = <&lt9611_1v8>;
  397. vcc-supply = <&lt9611_3v3>;
  398. pinctrl-names = "default";
  399. pinctrl-0 = <&lt9611_irq_pin>, <&dsi_sw_sel>;
  400. ports {
  401. #address-cells = <1>;
  402. #size-cells = <0>;
  403. port@0 {
  404. reg = <0>;
  405. lt9611_a: endpoint {
  406. remote-endpoint = <&dsi0_out>;
  407. };
  408. };
  409. port@2 {
  410. reg = <2>;
  411. lt9611_out: endpoint {
  412. remote-endpoint = <&hdmi_con>;
  413. };
  414. };
  415. };
  416. };
  417. };
  418. &i2c11 {
  419. /* On Low speed expansion */
  420. clock-frequency = <100000>;
  421. label = "LS-I2C1";
  422. status = "okay";
  423. };
  424. &i2c14 {
  425. /* On Low speed expansion */
  426. clock-frequency = <100000>;
  427. label = "LS-I2C0";
  428. status = "okay";
  429. };
  430. &mdss {
  431. memory-region = <&cont_splash_mem>;
  432. status = "okay";
  433. };
  434. &mss_pil {
  435. status = "okay";
  436. firmware-name = "qcom/sdm845/mba.mbn", "qcom/sdm845/modem.mbn";
  437. };
  438. &pcie0 {
  439. status = "okay";
  440. perst-gpios = <&tlmm 35 GPIO_ACTIVE_LOW>;
  441. enable-gpio = <&tlmm 134 GPIO_ACTIVE_HIGH>;
  442. vddpe-3v3-supply = <&pcie0_3p3v_dual>;
  443. pinctrl-names = "default";
  444. pinctrl-0 = <&pcie0_default_state>;
  445. };
  446. &pcie0_phy {
  447. status = "okay";
  448. vdda-phy-supply = <&vreg_l1a_0p875>;
  449. vdda-pll-supply = <&vreg_l26a_1p2>;
  450. };
  451. &pcie1 {
  452. status = "okay";
  453. perst-gpios = <&tlmm 102 GPIO_ACTIVE_LOW>;
  454. pinctrl-names = "default";
  455. pinctrl-0 = <&pcie1_default_state>;
  456. };
  457. &pcie1_phy {
  458. status = "okay";
  459. vdda-phy-supply = <&vreg_l1a_0p875>;
  460. vdda-pll-supply = <&vreg_l26a_1p2>;
  461. };
  462. &pm8998_gpio {
  463. gpio-line-names =
  464. "NC",
  465. "NC",
  466. "WLAN_SW_CTRL",
  467. "NC",
  468. "PM_GPIO5_BLUE_BT_LED",
  469. "VOL_UP_N",
  470. "NC",
  471. "ADC_IN1",
  472. "PM_GPIO9_YEL_WIFI_LED",
  473. "CAM0_AVDD_EN",
  474. "NC",
  475. "CAM0_DVDD_EN",
  476. "PM_GPIO13_GREEN_U4_LED",
  477. "DIV_CLK2",
  478. "NC",
  479. "NC",
  480. "NC",
  481. "SMB_STAT",
  482. "NC",
  483. "NC",
  484. "ADC_IN2",
  485. "OPTION1",
  486. "WCSS_PWR_REQ",
  487. "PM845_GPIO24",
  488. "OPTION2",
  489. "PM845_SLB";
  490. cam0_dvdd_1v2_en_default: cam0-dvdd-1v2-en-state {
  491. pins = "gpio12";
  492. function = "normal";
  493. bias-pull-up;
  494. drive-push-pull;
  495. qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>;
  496. };
  497. cam0_avdd_2v8_en_default: cam0-avdd-2v8-en-state {
  498. pins = "gpio10";
  499. function = "normal";
  500. bias-pull-up;
  501. drive-push-pull;
  502. qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>;
  503. };
  504. vol_up_pin_a: vol-up-active-state {
  505. pins = "gpio6";
  506. function = "normal";
  507. input-enable;
  508. bias-pull-up;
  509. qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
  510. };
  511. };
  512. &pm8998_pon {
  513. resin {
  514. compatible = "qcom,pm8941-resin";
  515. interrupts = <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>;
  516. debounce = <15625>;
  517. bias-pull-up;
  518. linux,code = <KEY_VOLUMEDOWN>;
  519. };
  520. };
  521. &pmi8998_lpg {
  522. status = "okay";
  523. qcom,power-source = <1>;
  524. led@3 {
  525. reg = <3>;
  526. color = <LED_COLOR_ID_GREEN>;
  527. function = LED_FUNCTION_HEARTBEAT;
  528. function-enumerator = <3>;
  529. linux,default-trigger = "heartbeat";
  530. default-state = "on";
  531. };
  532. led@4 {
  533. reg = <4>;
  534. color = <LED_COLOR_ID_GREEN>;
  535. function = LED_FUNCTION_INDICATOR;
  536. function-enumerator = <2>;
  537. };
  538. led@5 {
  539. reg = <5>;
  540. color = <LED_COLOR_ID_GREEN>;
  541. function = LED_FUNCTION_INDICATOR;
  542. function-enumerator = <1>;
  543. };
  544. };
  545. /* QUAT I2S Uses 4 I2S SD Lines for audio on LT9611 HDMI Bridge */
  546. &q6afedai {
  547. qi2s@22 {
  548. reg = <QUATERNARY_MI2S_RX>;
  549. qcom,sd-lines = <0 1 2 3>;
  550. };
  551. };
  552. &q6asmdai {
  553. dai@0 {
  554. reg = <0>;
  555. };
  556. dai@1 {
  557. reg = <1>;
  558. };
  559. dai@2 {
  560. reg = <2>;
  561. };
  562. dai@3 {
  563. reg = <3>;
  564. direction = <2>;
  565. is-compress-dai;
  566. };
  567. };
  568. &qupv3_id_0 {
  569. status = "okay";
  570. };
  571. &qupv3_id_1 {
  572. status = "okay";
  573. };
  574. &sdhc_2 {
  575. status = "okay";
  576. pinctrl-names = "default";
  577. pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>;
  578. vmmc-supply = <&vreg_l21a_2p95>;
  579. vqmmc-supply = <&vreg_l13a_2p95>;
  580. bus-width = <4>;
  581. cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW>;
  582. };
  583. &sound {
  584. compatible = "qcom,db845c-sndcard";
  585. pinctrl-0 = <&quat_mi2s_active
  586. &quat_mi2s_sd0_active
  587. &quat_mi2s_sd1_active
  588. &quat_mi2s_sd2_active
  589. &quat_mi2s_sd3_active>;
  590. pinctrl-names = "default";
  591. model = "DB845c";
  592. audio-routing =
  593. "RX_BIAS", "MCLK",
  594. "AMIC1", "MIC BIAS1",
  595. "AMIC2", "MIC BIAS2",
  596. "DMIC0", "MIC BIAS1",
  597. "DMIC1", "MIC BIAS1",
  598. "DMIC2", "MIC BIAS3",
  599. "DMIC3", "MIC BIAS3",
  600. "SpkrLeft IN", "SPK1 OUT",
  601. "SpkrRight IN", "SPK2 OUT",
  602. "MM_DL1", "MultiMedia1 Playback",
  603. "MM_DL2", "MultiMedia2 Playback",
  604. "MM_DL4", "MultiMedia4 Playback",
  605. "MultiMedia3 Capture", "MM_UL3";
  606. mm1-dai-link {
  607. link-name = "MultiMedia1";
  608. cpu {
  609. sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA1>;
  610. };
  611. };
  612. mm2-dai-link {
  613. link-name = "MultiMedia2";
  614. cpu {
  615. sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA2>;
  616. };
  617. };
  618. mm3-dai-link {
  619. link-name = "MultiMedia3";
  620. cpu {
  621. sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA3>;
  622. };
  623. };
  624. mm4-dai-link {
  625. link-name = "MultiMedia4";
  626. cpu {
  627. sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA4>;
  628. };
  629. };
  630. hdmi-dai-link {
  631. link-name = "HDMI Playback";
  632. cpu {
  633. sound-dai = <&q6afedai QUATERNARY_MI2S_RX>;
  634. };
  635. platform {
  636. sound-dai = <&q6routing>;
  637. };
  638. codec {
  639. sound-dai = <&lt9611_codec 0>;
  640. };
  641. };
  642. slim-dai-link {
  643. link-name = "SLIM Playback";
  644. cpu {
  645. sound-dai = <&q6afedai SLIMBUS_0_RX>;
  646. };
  647. platform {
  648. sound-dai = <&q6routing>;
  649. };
  650. codec {
  651. sound-dai = <&left_spkr>, <&right_spkr>, <&swm 0>, <&wcd9340 0>;
  652. };
  653. };
  654. slimcap-dai-link {
  655. link-name = "SLIM Capture";
  656. cpu {
  657. sound-dai = <&q6afedai SLIMBUS_0_TX>;
  658. };
  659. platform {
  660. sound-dai = <&q6routing>;
  661. };
  662. codec {
  663. sound-dai = <&wcd9340 1>;
  664. };
  665. };
  666. };
  667. &spi0 {
  668. status = "okay";
  669. pinctrl-names = "default";
  670. pinctrl-0 = <&qup_spi0_default>;
  671. cs-gpios = <&tlmm 3 GPIO_ACTIVE_LOW>;
  672. can@0 {
  673. compatible = "microchip,mcp2517fd";
  674. reg = <0>;
  675. clocks = <&clk40M>;
  676. interrupts-extended = <&tlmm 104 IRQ_TYPE_LEVEL_LOW>;
  677. spi-max-frequency = <10000000>;
  678. vdd-supply = <&vdc_5v>;
  679. xceiver-supply = <&vdc_5v>;
  680. };
  681. };
  682. &spi2 {
  683. /* On Low speed expansion */
  684. label = "LS-SPI0";
  685. status = "okay";
  686. };
  687. &tlmm {
  688. cam0_default: cam0_default {
  689. rst {
  690. pins = "gpio9";
  691. function = "gpio";
  692. drive-strength = <16>;
  693. bias-disable;
  694. };
  695. mclk0 {
  696. pins = "gpio13";
  697. function = "cam_mclk";
  698. drive-strength = <16>;
  699. bias-disable;
  700. };
  701. };
  702. cam3_default: cam3_default {
  703. rst {
  704. function = "gpio";
  705. pins = "gpio21";
  706. drive-strength = <16>;
  707. bias-disable;
  708. };
  709. mclk3 {
  710. function = "cam_mclk";
  711. pins = "gpio16";
  712. drive-strength = <16>;
  713. bias-disable;
  714. };
  715. };
  716. dsi_sw_sel: dsi-sw-sel {
  717. pins = "gpio120";
  718. function = "gpio";
  719. drive-strength = <2>;
  720. bias-disable;
  721. output-high;
  722. };
  723. lt9611_irq_pin: lt9611-irq {
  724. pins = "gpio84";
  725. function = "gpio";
  726. bias-disable;
  727. };
  728. pcie0_default_state: pcie0-default {
  729. clkreq {
  730. pins = "gpio36";
  731. function = "pci_e0";
  732. bias-pull-up;
  733. };
  734. reset-n {
  735. pins = "gpio35";
  736. function = "gpio";
  737. drive-strength = <2>;
  738. output-low;
  739. bias-pull-down;
  740. };
  741. wake-n {
  742. pins = "gpio37";
  743. function = "gpio";
  744. drive-strength = <2>;
  745. bias-pull-up;
  746. };
  747. };
  748. pcie0_pwren_state: pcie0-pwren {
  749. pins = "gpio90";
  750. function = "gpio";
  751. drive-strength = <2>;
  752. bias-disable;
  753. };
  754. pcie1_default_state: pcie1-default {
  755. perst-n {
  756. pins = "gpio102";
  757. function = "gpio";
  758. drive-strength = <16>;
  759. bias-disable;
  760. };
  761. clkreq {
  762. pins = "gpio103";
  763. function = "pci_e1";
  764. bias-pull-up;
  765. };
  766. wake-n {
  767. pins = "gpio11";
  768. function = "gpio";
  769. drive-strength = <2>;
  770. bias-pull-up;
  771. };
  772. reset-n {
  773. pins = "gpio75";
  774. function = "gpio";
  775. drive-strength = <16>;
  776. bias-pull-up;
  777. output-high;
  778. };
  779. };
  780. sdc2_default_state: sdc2-default {
  781. clk {
  782. pins = "sdc2_clk";
  783. bias-disable;
  784. /*
  785. * It seems that mmc_test reports errors if drive
  786. * strength is not 16 on clk, cmd, and data pins.
  787. */
  788. drive-strength = <16>;
  789. };
  790. cmd {
  791. pins = "sdc2_cmd";
  792. bias-pull-up;
  793. drive-strength = <10>;
  794. };
  795. data {
  796. pins = "sdc2_data";
  797. bias-pull-up;
  798. drive-strength = <10>;
  799. };
  800. };
  801. sdc2_card_det_n: sd-card-det-n {
  802. pins = "gpio126";
  803. function = "gpio";
  804. bias-pull-up;
  805. };
  806. wcd_intr_default: wcd_intr_default {
  807. pins = "gpio54";
  808. function = "gpio";
  809. input-enable;
  810. bias-pull-down;
  811. drive-strength = <2>;
  812. };
  813. };
  814. &uart3 {
  815. label = "LS-UART0";
  816. status = "disabled";
  817. };
  818. &uart6 {
  819. status = "okay";
  820. bluetooth {
  821. compatible = "qcom,wcn3990-bt";
  822. vddio-supply = <&vreg_s4a_1p8>;
  823. vddxo-supply = <&vreg_l7a_1p8>;
  824. vddrf-supply = <&vreg_l17a_1p3>;
  825. vddch0-supply = <&vreg_l25a_3p3>;
  826. max-speed = <3200000>;
  827. };
  828. };
  829. &uart9 {
  830. label = "LS-UART1";
  831. status = "okay";
  832. };
  833. &usb_1 {
  834. status = "okay";
  835. };
  836. &usb_1_dwc3 {
  837. dr_mode = "peripheral";
  838. };
  839. &usb_1_hsphy {
  840. status = "okay";
  841. vdd-supply = <&vreg_l1a_0p875>;
  842. vdda-pll-supply = <&vreg_l12a_1p8>;
  843. vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
  844. qcom,imp-res-offset-value = <8>;
  845. qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
  846. qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
  847. qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
  848. };
  849. &usb_1_qmpphy {
  850. status = "okay";
  851. vdda-phy-supply = <&vreg_l26a_1p2>;
  852. vdda-pll-supply = <&vreg_l1a_0p875>;
  853. };
  854. &usb_2 {
  855. status = "okay";
  856. };
  857. &usb_2_dwc3 {
  858. dr_mode = "host";
  859. };
  860. &usb_2_hsphy {
  861. status = "okay";
  862. vdd-supply = <&vreg_l1a_0p875>;
  863. vdda-pll-supply = <&vreg_l12a_1p8>;
  864. vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
  865. qcom,imp-res-offset-value = <8>;
  866. qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
  867. };
  868. &usb_2_qmpphy {
  869. status = "okay";
  870. vdda-phy-supply = <&vreg_l26a_1p2>;
  871. vdda-pll-supply = <&vreg_l1a_0p875>;
  872. };
  873. &ufs_mem_hc {
  874. status = "okay";
  875. reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
  876. vcc-supply = <&vreg_l20a_2p95>;
  877. vcc-max-microamp = <800000>;
  878. };
  879. &ufs_mem_phy {
  880. status = "okay";
  881. vdda-phy-supply = <&vreg_l1a_0p875>;
  882. vdda-pll-supply = <&vreg_l26a_1p2>;
  883. };
  884. &venus {
  885. status = "okay";
  886. };
  887. &wcd9340{
  888. pinctrl-0 = <&wcd_intr_default>;
  889. pinctrl-names = "default";
  890. clock-names = "extclk";
  891. clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
  892. reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>;
  893. vdd-buck-supply = <&vreg_s4a_1p8>;
  894. vdd-buck-sido-supply = <&vreg_s4a_1p8>;
  895. vdd-tx-supply = <&vreg_s4a_1p8>;
  896. vdd-rx-supply = <&vreg_s4a_1p8>;
  897. vdd-io-supply = <&vreg_s4a_1p8>;
  898. swm: swm@c85 {
  899. left_spkr: wsa8810-left{
  900. compatible = "sdw10217201000";
  901. reg = <0 1>;
  902. powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>;
  903. #thermal-sensor-cells = <0>;
  904. sound-name-prefix = "SpkrLeft";
  905. #sound-dai-cells = <0>;
  906. };
  907. right_spkr: wsa8810-right{
  908. compatible = "sdw10217201000";
  909. powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>;
  910. reg = <0 2>;
  911. #thermal-sensor-cells = <0>;
  912. sound-name-prefix = "SpkrRight";
  913. #sound-dai-cells = <0>;
  914. };
  915. };
  916. };
  917. &wifi {
  918. status = "okay";
  919. vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
  920. vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
  921. vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
  922. vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
  923. qcom,snoc-host-cap-8bit-quirk;
  924. qcom,ath10k-calibration-variant = "Thundercomm_DB845C";
  925. };
  926. /* PINCTRL - additions to nodes defined in sdm845.dtsi */
  927. &qup_spi2_default {
  928. pinconf {
  929. pins = "gpio27", "gpio28", "gpio29", "gpio30";
  930. drive-strength = <16>;
  931. };
  932. };
  933. &qup_uart3_default{
  934. pinmux {
  935. pins = "gpio41", "gpio42", "gpio43", "gpio44";
  936. function = "qup3";
  937. };
  938. };
  939. &qup_i2c10_default {
  940. pinconf {
  941. pins = "gpio55", "gpio56";
  942. drive-strength = <2>;
  943. bias-disable;
  944. };
  945. };
  946. &qup_uart6_default {
  947. pinmux {
  948. pins = "gpio45", "gpio46", "gpio47", "gpio48";
  949. function = "qup6";
  950. };
  951. cts {
  952. pins = "gpio45";
  953. bias-disable;
  954. };
  955. rts-tx {
  956. pins = "gpio46", "gpio47";
  957. drive-strength = <2>;
  958. bias-disable;
  959. };
  960. rx {
  961. pins = "gpio48";
  962. bias-pull-up;
  963. };
  964. };
  965. &qup_uart9_default {
  966. pinconf-tx {
  967. pins = "gpio4";
  968. drive-strength = <2>;
  969. bias-disable;
  970. };
  971. pinconf-rx {
  972. pins = "gpio5";
  973. drive-strength = <2>;
  974. bias-pull-up;
  975. };
  976. };
  977. &pm8998_gpio {
  978. };
  979. &cci {
  980. status = "okay";
  981. };
  982. &camss {
  983. vdda-phy-supply = <&vreg_l1a_0p875>;
  984. vdda-pll-supply = <&vreg_l26a_1p2>;
  985. status = "ok";
  986. ports {
  987. #address-cells = <1>;
  988. #size-cells = <0>;
  989. port@0 {
  990. reg = <0>;
  991. csiphy0_ep: endpoint {
  992. data-lanes = <0 1 2 3>;
  993. remote-endpoint = <&ov8856_ep>;
  994. };
  995. };
  996. };
  997. };
  998. &cci_i2c0 {
  999. camera@10 {
  1000. compatible = "ovti,ov8856";
  1001. reg = <0x10>;
  1002. // CAM0_RST_N
  1003. reset-gpios = <&tlmm 9 GPIO_ACTIVE_LOW>;
  1004. pinctrl-names = "default";
  1005. pinctrl-0 = <&cam0_default>;
  1006. clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
  1007. clock-names = "xvclk";
  1008. clock-frequency = <19200000>;
  1009. /* The &vreg_s4a_1p8 trace is powered on as a,
  1010. * so it is represented by a fixed regulator.
  1011. *
  1012. * The 2.8V vdda-supply and 1.2V vddd-supply regulators
  1013. * both have to be enabled through the power management
  1014. * gpios.
  1015. */
  1016. dovdd-supply = <&vreg_lvs1a_1p8>;
  1017. avdd-supply = <&cam0_avdd_2v8>;
  1018. dvdd-supply = <&cam0_dvdd_1v2>;
  1019. status = "ok";
  1020. port {
  1021. ov8856_ep: endpoint {
  1022. link-frequencies = /bits/ 64
  1023. <360000000 180000000>;
  1024. data-lanes = <1 2 3 4>;
  1025. remote-endpoint = <&csiphy0_ep>;
  1026. };
  1027. };
  1028. };
  1029. };
  1030. &cci_i2c1 {
  1031. camera@60 {
  1032. compatible = "ovti,ov7251";
  1033. // I2C address as per ov7251.txt linux documentation
  1034. reg = <0x60>;
  1035. // CAM3_RST_N
  1036. enable-gpios = <&tlmm 21 GPIO_ACTIVE_HIGH>;
  1037. pinctrl-names = "default";
  1038. pinctrl-0 = <&cam3_default>;
  1039. clocks = <&clock_camcc CAM_CC_MCLK3_CLK>;
  1040. clock-names = "xclk";
  1041. clock-frequency = <24000000>;
  1042. /* The &vreg_s4a_1p8 trace always powered on.
  1043. *
  1044. * The 2.8V vdda-supply regulator is enabled when the
  1045. * vreg_s4a_1p8 trace is pulled high.
  1046. * It too is represented by a fixed regulator.
  1047. *
  1048. * No 1.2V vddd-supply regulator is used.
  1049. */
  1050. vdddo-supply = <&vreg_lvs1a_1p8>;
  1051. vdda-supply = <&cam3_avdd_2v8>;
  1052. status = "disable";
  1053. port {
  1054. ov7251_ep: endpoint {
  1055. data-lanes = <0 1>;
  1056. // remote-endpoint = <&csiphy3_ep>;
  1057. };
  1058. };
  1059. };
  1060. };
  1061. /* PINCTRL - additions to nodes defined in sdm845.dtsi */
  1062. &qup_spi0_default {
  1063. config {
  1064. drive-strength = <6>;
  1065. bias-disable;
  1066. };
  1067. };