sdm845-cheza-r2.dts 4.7 KB

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  1. // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2. /*
  3. * Google Cheza board device tree source
  4. *
  5. * Copyright 2018 Google LLC.
  6. */
  7. /dts-v1/;
  8. #include "sdm845-cheza.dtsi"
  9. / {
  10. model = "Google Cheza (rev2)";
  11. compatible = "google,cheza-rev2", "qcom,sdm845";
  12. /*
  13. * FIXED REGULATORS (not in sdm845-cheza.dtsi) - parents above children
  14. */
  15. /*
  16. * NOTE: Technically pp3500_a is not the exact same signal as
  17. * pp3500_a_vbob (there's a load switch between them and the EC can
  18. * control pp3500_a via "en_pp3300_a"), but from the AP's point of
  19. * view they are the same.
  20. */
  21. pp3500_a:
  22. pp3500_a_vbob: pp3500-a-vbob-regulator {
  23. compatible = "regulator-fixed";
  24. regulator-name = "vreg_bob";
  25. /*
  26. * Comes on automatically when pp5000_ldo comes on, which
  27. * comes on automatically when ppvar_sys comes on
  28. */
  29. regulator-always-on;
  30. regulator-boot-on;
  31. regulator-min-microvolt = <3500000>;
  32. regulator-max-microvolt = <3500000>;
  33. vin-supply = <&ppvar_sys>;
  34. };
  35. pp3300_dx_edp: pp3300-dx-edp-regulator {
  36. /* Yes, it's really 3.5 despite the name of the signal */
  37. regulator-min-microvolt = <3500000>;
  38. regulator-max-microvolt = <3500000>;
  39. vin-supply = <&pp3500_a>;
  40. };
  41. };
  42. /* FIXED REGULATOR OVERRIDES (modifications to sdm845-cheza.dtsi) */
  43. /*
  44. * L19 and L28 technically go to 3.3V, but most boards have old AOP firmware
  45. * that limits them to 3.0, and trying to run at 3.3V with that old firmware
  46. * prevents the system from booting.
  47. */
  48. &src_pp3000_l19a {
  49. regulator-min-microvolt = <3008000>;
  50. regulator-max-microvolt = <3008000>;
  51. };
  52. &src_pp3300_l22a {
  53. /delete-property/regulator-boot-on;
  54. /delete-property/regulator-always-on;
  55. };
  56. &src_pp3300_l28a {
  57. regulator-min-microvolt = <3008000>;
  58. regulator-max-microvolt = <3008000>;
  59. };
  60. &src_vreg_bob {
  61. regulator-min-microvolt = <3500000>;
  62. regulator-max-microvolt = <3500000>;
  63. vin-supply = <&pp3500_a_vbob>;
  64. };
  65. /*
  66. * NON-REGULATOR OVERRIDES
  67. * (modifications to sdm845-cheza.dtsi) - alphabetized by dtsi label
  68. */
  69. /* PINCTRL - board-specific pinctrl */
  70. &tlmm {
  71. gpio-line-names = "AP_SPI_FP_MISO",
  72. "AP_SPI_FP_MOSI",
  73. "AP_SPI_FP_CLK",
  74. "AP_SPI_FP_CS_L",
  75. "UART_AP_TX_DBG_RX",
  76. "UART_DBG_TX_AP_RX",
  77. "BRIJ_SUSPEND",
  78. "FP_RST_L",
  79. "FCAM_EN",
  80. "",
  81. "EDP_BRIJ_IRQ",
  82. "EC_IN_RW_ODL",
  83. "",
  84. "RCAM_MCLK",
  85. "FCAM_MCLK",
  86. "",
  87. "RCAM_EN",
  88. "CCI0_SDA",
  89. "CCI0_SCL",
  90. "CCI1_SDA",
  91. "CCI1_SCL",
  92. "FCAM_RST_L",
  93. "FPMCU_BOOT0",
  94. "PEN_RST_L",
  95. "PEN_IRQ_L",
  96. "FPMCU_SEL_OD",
  97. "RCAM_VSYNC",
  98. "ESIM_MISO",
  99. "ESIM_MOSI",
  100. "ESIM_CLK",
  101. "ESIM_CS_L",
  102. "AP_PEN_1V8_SDA",
  103. "AP_PEN_1V8_SCL",
  104. "AP_TS_I2C_SDA",
  105. "AP_TS_I2C_SCL",
  106. "RCAM_RST_L",
  107. "",
  108. "AP_EDP_BKLTEN",
  109. "AP_BRD_ID1",
  110. "BOOT_CONFIG_4",
  111. "AMP_IRQ_L",
  112. "EDP_BRIJ_I2C_SDA",
  113. "EDP_BRIJ_I2C_SCL",
  114. "EN_PP3300_DX_EDP",
  115. "SD_CD_ODL",
  116. "BT_UART_RTS",
  117. "BT_UART_CTS",
  118. "BT_UART_RXD",
  119. "BT_UART_TXD",
  120. "AMP_I2C_SDA",
  121. "AMP_I2C_SCL",
  122. "AP_BRD_ID3",
  123. "",
  124. "AP_EC_SPI_CLK",
  125. "AP_EC_SPI_CS_L",
  126. "AP_EC_SPI_MISO",
  127. "AP_EC_SPI_MOSI",
  128. "FORCED_USB_BOOT",
  129. "AMP_BCLK",
  130. "AMP_LRCLK",
  131. "AMP_DOUT",
  132. "AMP_DIN",
  133. "AP_BRD_ID2",
  134. "PEN_PDCT_L",
  135. "HP_MCLK",
  136. "HP_BCLK",
  137. "HP_LRCLK",
  138. "HP_DOUT",
  139. "HP_DIN",
  140. "",
  141. "",
  142. "",
  143. "",
  144. "BT_SLIMBUS_DATA",
  145. "BT_SLIMBUS_CLK",
  146. "AMP_RESET_L",
  147. "",
  148. "FCAM_VSYNC",
  149. "",
  150. "AP_SKU_ID1",
  151. "EC_WOV_BCLK",
  152. "EC_WOV_LRCLK",
  153. "EC_WOV_DOUT",
  154. "",
  155. "",
  156. "AP_H1_SPI_MISO",
  157. "AP_H1_SPI_MOSI",
  158. "AP_H1_SPI_CLK",
  159. "AP_H1_SPI_CS_L",
  160. "",
  161. "AP_SPI_CS0_L",
  162. "AP_SPI_MOSI",
  163. "AP_SPI_MISO",
  164. "",
  165. "",
  166. "AP_SPI_CLK",
  167. "",
  168. "RFFE6_CLK",
  169. "RFFE6_DATA",
  170. "BOOT_CONFIG_1",
  171. "BOOT_CONFIG_2",
  172. "BOOT_CONFIG_0",
  173. "EDP_BRIJ_EN",
  174. "",
  175. "USB_HS_TX_EN",
  176. "UIM2_DATA",
  177. "UIM2_CLK",
  178. "UIM2_RST",
  179. "UIM2_PRESENT",
  180. "UIM1_DATA",
  181. "UIM1_CLK",
  182. "UIM1_RST",
  183. "",
  184. "AP_SKU_ID2",
  185. "SDM_GRFC_8",
  186. "SDM_GRFC_9",
  187. "AP_RST_REQ",
  188. "HP_IRQ",
  189. "TS_RESET_L",
  190. "PEN_EJECT_ODL",
  191. "HUB_RST_L",
  192. "FP_TO_AP_IRQ",
  193. "AP_EC_INT_L",
  194. "",
  195. "",
  196. "TS_INT_L",
  197. "AP_SUSPEND_L",
  198. "SDM_GRFC_3",
  199. "",
  200. "H1_AP_INT_ODL",
  201. "QLINK_REQ",
  202. "QLINK_EN",
  203. "SDM_GRFC_2",
  204. "BOOT_CONFIG_3",
  205. "WMSS_RESET_L",
  206. "SDM_GRFC_0",
  207. "SDM_GRFC_1",
  208. "RFFE3_DATA",
  209. "RFFE3_CLK",
  210. "RFFE4_DATA",
  211. "RFFE4_CLK",
  212. "RFFE5_DATA",
  213. "RFFE5_CLK",
  214. "GNSS_EN",
  215. "WCI2_LTE_COEX_RXD",
  216. "WCI2_LTE_COEX_TXD",
  217. "AP_RAM_ID1",
  218. "AP_RAM_ID2",
  219. "RFFE1_DATA",
  220. "RFFE1_CLK";
  221. };