sc7280-idp.dtsi 15 KB

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  1. // SPDX-License-Identifier: BSD-3-Clause
  2. /*
  3. * sc7280 IDP board device tree source (common between SKU1 and SKU2)
  4. *
  5. * Copyright (c) 2021, The Linux Foundation. All rights reserved.
  6. */
  7. #include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h>
  8. #include <dt-bindings/input/linux-event-codes.h>
  9. #include "sc7280.dtsi"
  10. #include "pm7325.dtsi"
  11. #include "pm8350c.dtsi"
  12. #include "pmk8350.dtsi"
  13. #include "sc7280-chrome-common.dtsi"
  14. #include "sc7280-herobrine-lte-sku.dtsi"
  15. / {
  16. aliases {
  17. bluetooth0 = &bluetooth;
  18. serial1 = &uart7;
  19. };
  20. max98360a: audio-codec-0 {
  21. compatible = "maxim,max98360a";
  22. pinctrl-names = "default";
  23. pinctrl-0 = <&amp_en>;
  24. sdmode-gpios = <&tlmm 63 GPIO_ACTIVE_HIGH>;
  25. #sound-dai-cells = <0>;
  26. };
  27. wcd9385: audio-codec-1 {
  28. compatible = "qcom,wcd9385-codec";
  29. pinctrl-names = "default", "sleep";
  30. pinctrl-0 = <&wcd_reset_n>;
  31. pinctrl-1 = <&wcd_reset_n_sleep>;
  32. reset-gpios = <&tlmm 83 GPIO_ACTIVE_LOW>;
  33. qcom,rx-device = <&wcd_rx>;
  34. qcom,tx-device = <&wcd_tx>;
  35. vdd-rxtx-supply = <&vreg_l18b_1p8>;
  36. vdd-io-supply = <&vreg_l18b_1p8>;
  37. vdd-buck-supply = <&vreg_l17b_1p8>;
  38. vdd-mic-bias-supply = <&vreg_bob>;
  39. qcom,micbias1-microvolt = <1800000>;
  40. qcom,micbias2-microvolt = <1800000>;
  41. qcom,micbias3-microvolt = <1800000>;
  42. qcom,micbias4-microvolt = <1800000>;
  43. qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000
  44. 500000 500000 500000>;
  45. qcom,mbhc-headset-vthreshold-microvolt = <1700000>;
  46. qcom,mbhc-headphone-vthreshold-microvolt = <50000>;
  47. #sound-dai-cells = <1>;
  48. };
  49. gpio-keys {
  50. compatible = "gpio-keys";
  51. label = "gpio-keys";
  52. pinctrl-names = "default";
  53. pinctrl-0 = <&key_vol_up_default>;
  54. key-volume-up {
  55. label = "volume_up";
  56. gpios = <&pm7325_gpios 6 GPIO_ACTIVE_LOW>;
  57. linux,input-type = <1>;
  58. linux,code = <KEY_VOLUMEUP>;
  59. gpio-key,wakeup;
  60. debounce-interval = <15>;
  61. linux,can-disable;
  62. };
  63. };
  64. nvme_3v3_regulator: nvme-3v3-regulator {
  65. compatible = "regulator-fixed";
  66. regulator-name = "VLDO_3V3";
  67. regulator-min-microvolt = <3300000>;
  68. regulator-max-microvolt = <3300000>;
  69. enable-active-high;
  70. pinctrl-names = "default";
  71. pinctrl-0 = <&nvme_pwren>;
  72. };
  73. sound: sound {
  74. compatible = "google,sc7280-herobrine";
  75. model = "sc7280-wcd938x-max98360a-1mic";
  76. audio-routing =
  77. "IN1_HPHL", "HPHL_OUT",
  78. "IN2_HPHR", "HPHR_OUT",
  79. "AMIC1", "MIC BIAS1",
  80. "AMIC2", "MIC BIAS2",
  81. "VA DMIC0", "MIC BIAS3",
  82. "VA DMIC1", "MIC BIAS3",
  83. "VA DMIC2", "MIC BIAS1",
  84. "VA DMIC3", "MIC BIAS1",
  85. "TX SWR_ADC0", "ADC1_OUTPUT",
  86. "TX SWR_ADC1", "ADC2_OUTPUT",
  87. "TX SWR_ADC2", "ADC3_OUTPUT",
  88. "TX SWR_DMIC0", "DMIC1_OUTPUT",
  89. "TX SWR_DMIC1", "DMIC2_OUTPUT",
  90. "TX SWR_DMIC2", "DMIC3_OUTPUT",
  91. "TX SWR_DMIC3", "DMIC4_OUTPUT",
  92. "TX SWR_DMIC4", "DMIC5_OUTPUT",
  93. "TX SWR_DMIC5", "DMIC6_OUTPUT",
  94. "TX SWR_DMIC6", "DMIC7_OUTPUT",
  95. "TX SWR_DMIC7", "DMIC8_OUTPUT";
  96. qcom,msm-mbhc-hphl-swh = <1>;
  97. qcom,msm-mbhc-gnd-swh = <1>;
  98. #address-cells = <1>;
  99. #size-cells = <0>;
  100. #sound-dai-cells = <0>;
  101. dai-link@0 {
  102. link-name = "MAX98360A";
  103. reg = <0>;
  104. cpu {
  105. sound-dai = <&lpass_cpu MI2S_SECONDARY>;
  106. };
  107. codec {
  108. sound-dai = <&max98360a>;
  109. };
  110. };
  111. dai-link@1 {
  112. link-name = "DisplayPort";
  113. reg = <1>;
  114. cpu {
  115. sound-dai = <&lpass_cpu LPASS_DP_RX>;
  116. };
  117. codec {
  118. sound-dai = <&mdss_dp>;
  119. };
  120. };
  121. dai-link@2 {
  122. link-name = "WCD9385 Playback";
  123. reg = <2>;
  124. cpu {
  125. sound-dai = <&lpass_cpu LPASS_CDC_DMA_RX0>;
  126. };
  127. codec {
  128. sound-dai = <&wcd9385 0>, <&swr0 0>, <&lpass_rx_macro 0>;
  129. };
  130. };
  131. dai-link@3 {
  132. link-name = "WCD9385 Capture";
  133. reg = <3>;
  134. cpu {
  135. sound-dai = <&lpass_cpu LPASS_CDC_DMA_TX3>;
  136. };
  137. codec {
  138. sound-dai = <&wcd9385 1>, <&swr1 0>, <&lpass_tx_macro 0>;
  139. };
  140. };
  141. dai-link@4 {
  142. link-name = "DMIC";
  143. reg = <4>;
  144. cpu {
  145. sound-dai = <&lpass_cpu LPASS_CDC_DMA_VA_TX0>;
  146. };
  147. codec {
  148. sound-dai = <&lpass_va_macro 0>;
  149. };
  150. };
  151. };
  152. };
  153. &apps_rsc {
  154. pm7325-regulators {
  155. compatible = "qcom,pm7325-rpmh-regulators";
  156. qcom,pmic-id = "b";
  157. vreg_s1b_1p8: smps1 {
  158. regulator-min-microvolt = <1856000>;
  159. regulator-max-microvolt = <2040000>;
  160. };
  161. vreg_s7b_0p9: smps7 {
  162. regulator-min-microvolt = <535000>;
  163. regulator-max-microvolt = <1120000>;
  164. };
  165. vreg_s8b_1p2: smps8 {
  166. regulator-min-microvolt = <1256000>;
  167. regulator-max-microvolt = <1500000>;
  168. };
  169. vreg_l1b_0p8: ldo1 {
  170. regulator-min-microvolt = <825000>;
  171. regulator-max-microvolt = <925000>;
  172. };
  173. vreg_l2b_3p0: ldo2 {
  174. regulator-min-microvolt = <2700000>;
  175. regulator-max-microvolt = <3544000>;
  176. };
  177. vreg_l6b_1p2: ldo6 {
  178. regulator-min-microvolt = <1140000>;
  179. regulator-max-microvolt = <1260000>;
  180. };
  181. vreg_l7b_2p9: ldo7 {
  182. regulator-min-microvolt = <2960000>;
  183. regulator-max-microvolt = <2960000>;
  184. };
  185. vreg_l8b_0p9: ldo8 {
  186. regulator-min-microvolt = <870000>;
  187. regulator-max-microvolt = <970000>;
  188. };
  189. vreg_l9b_1p2: ldo9 {
  190. regulator-min-microvolt = <1080000>;
  191. regulator-max-microvolt = <1304000>;
  192. };
  193. vreg_l11b_1p7: ldo11 {
  194. regulator-min-microvolt = <1504000>;
  195. regulator-max-microvolt = <2000000>;
  196. };
  197. vreg_l12b_0p8: ldo12 {
  198. regulator-min-microvolt = <751000>;
  199. regulator-max-microvolt = <824000>;
  200. };
  201. vreg_l13b_0p8: ldo13 {
  202. regulator-min-microvolt = <530000>;
  203. regulator-max-microvolt = <824000>;
  204. };
  205. vreg_l14b_1p2: ldo14 {
  206. regulator-min-microvolt = <1080000>;
  207. regulator-max-microvolt = <1304000>;
  208. };
  209. vreg_l15b_0p8: ldo15 {
  210. regulator-min-microvolt = <765000>;
  211. regulator-max-microvolt = <1020000>;
  212. };
  213. vreg_l16b_1p2: ldo16 {
  214. regulator-min-microvolt = <1100000>;
  215. regulator-max-microvolt = <1300000>;
  216. };
  217. vreg_l17b_1p8: ldo17 {
  218. regulator-min-microvolt = <1700000>;
  219. regulator-max-microvolt = <1900000>;
  220. };
  221. vreg_l18b_1p8: ldo18 {
  222. regulator-min-microvolt = <1800000>;
  223. regulator-max-microvolt = <2000000>;
  224. };
  225. vreg_l19b_1p8: ldo19 {
  226. regulator-min-microvolt = <1800000>;
  227. regulator-max-microvolt = <1800000>;
  228. };
  229. };
  230. pm8350c-regulators {
  231. compatible = "qcom,pm8350c-rpmh-regulators";
  232. qcom,pmic-id = "c";
  233. vreg_s1c_2p2: smps1 {
  234. regulator-min-microvolt = <2190000>;
  235. regulator-max-microvolt = <2210000>;
  236. };
  237. vreg_s9c_1p0: smps9 {
  238. regulator-min-microvolt = <1010000>;
  239. regulator-max-microvolt = <1170000>;
  240. };
  241. vreg_l1c_1p8: ldo1 {
  242. regulator-min-microvolt = <1800000>;
  243. regulator-max-microvolt = <1980000>;
  244. };
  245. vreg_l2c_1p8: ldo2 {
  246. regulator-min-microvolt = <1620000>;
  247. regulator-max-microvolt = <1980000>;
  248. };
  249. vreg_l3c_3p0: ldo3 {
  250. regulator-min-microvolt = <2800000>;
  251. regulator-max-microvolt = <3540000>;
  252. };
  253. vreg_l4c_1p8: ldo4 {
  254. regulator-min-microvolt = <1620000>;
  255. regulator-max-microvolt = <3300000>;
  256. };
  257. vreg_l5c_1p8: ldo5 {
  258. regulator-min-microvolt = <1620000>;
  259. regulator-max-microvolt = <3300000>;
  260. };
  261. vreg_l6c_2p9: ldo6 {
  262. regulator-min-microvolt = <1800000>;
  263. regulator-max-microvolt = <2950000>;
  264. };
  265. vreg_l7c_3p0: ldo7 {
  266. regulator-min-microvolt = <3000000>;
  267. regulator-max-microvolt = <3544000>;
  268. };
  269. vreg_l8c_1p8: ldo8 {
  270. regulator-min-microvolt = <1620000>;
  271. regulator-max-microvolt = <2000000>;
  272. };
  273. vreg_l9c_2p9: ldo9 {
  274. regulator-min-microvolt = <2960000>;
  275. regulator-max-microvolt = <2960000>;
  276. };
  277. vreg_l10c_0p8: ldo10 {
  278. regulator-min-microvolt = <720000>;
  279. regulator-max-microvolt = <1050000>;
  280. };
  281. vreg_l11c_2p8: ldo11 {
  282. regulator-min-microvolt = <2800000>;
  283. regulator-max-microvolt = <3544000>;
  284. };
  285. vreg_l12c_1p8: ldo12 {
  286. regulator-min-microvolt = <1650000>;
  287. regulator-max-microvolt = <2000000>;
  288. };
  289. vreg_l13c_3p0: ldo13 {
  290. regulator-min-microvolt = <2700000>;
  291. regulator-max-microvolt = <3544000>;
  292. };
  293. vreg_bob: bob {
  294. regulator-min-microvolt = <3008000>;
  295. regulator-max-microvolt = <3960000>;
  296. };
  297. };
  298. };
  299. &gpi_dma0 {
  300. status = "okay";
  301. };
  302. &gpi_dma1 {
  303. status = "okay";
  304. };
  305. &ipa {
  306. status = "okay";
  307. modem-init;
  308. };
  309. &lpass_cpu {
  310. status = "okay";
  311. pinctrl-names = "default";
  312. pinctrl-0 = <&mi2s1_data0>, <&mi2s1_sclk>, <&mi2s1_ws>;
  313. dai-link@1 {
  314. reg = <MI2S_SECONDARY>;
  315. qcom,playback-sd-lines = <0>;
  316. };
  317. dai-link@5 {
  318. reg = <LPASS_DP_RX>;
  319. };
  320. dai-link@6 {
  321. reg = <LPASS_CDC_DMA_RX0>;
  322. };
  323. dai-link@19 {
  324. reg = <LPASS_CDC_DMA_TX3>;
  325. };
  326. dai-link@25 {
  327. reg = <LPASS_CDC_DMA_VA_TX0>;
  328. };
  329. };
  330. &lpass_rx_macro {
  331. status = "okay";
  332. };
  333. &lpass_tx_macro {
  334. status = "okay";
  335. };
  336. &lpass_va_macro {
  337. status = "okay";
  338. vdd-micb-supply = <&vreg_bob>;
  339. };
  340. &pcie1 {
  341. status = "okay";
  342. perst-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
  343. vddpe-3v3-supply = <&nvme_3v3_regulator>;
  344. pinctrl-names = "default";
  345. pinctrl-0 = <&pcie1_reset_n>, <&pcie1_wake_n>;
  346. };
  347. &pcie1_phy {
  348. status = "okay";
  349. vdda-phy-supply = <&vreg_l10c_0p8>;
  350. vdda-pll-supply = <&vreg_l6b_1p2>;
  351. };
  352. &pmk8350_vadc {
  353. pmk8350-die-temp@3 {
  354. reg = <PMK8350_ADC7_DIE_TEMP>;
  355. label = "pmk8350_die_temp";
  356. qcom,pre-scaling = <1 1>;
  357. };
  358. };
  359. &qfprom {
  360. vcc-supply = <&vreg_l1c_1p8>;
  361. };
  362. &qupv3_id_0 {
  363. status = "okay";
  364. };
  365. &qupv3_id_1 {
  366. status = "okay";
  367. };
  368. &sdhc_1 {
  369. status = "okay";
  370. non-removable;
  371. no-sd;
  372. no-sdio;
  373. vmmc-supply = <&vreg_l7b_2p9>;
  374. vqmmc-supply = <&vreg_l19b_1p8>;
  375. };
  376. &sdhc_2 {
  377. status = "okay";
  378. pinctrl-0 = <&sdc2_clk>, <&sdc2_cmd>, <&sdc2_data>, <&sd_cd>;
  379. pinctrl-1 = <&sdc2_clk_sleep>, <&sdc2_cmd_sleep>, <&sdc2_data_sleep>, <&sd_cd>;
  380. vmmc-supply = <&vreg_l9c_2p9>;
  381. vqmmc-supply = <&vreg_l6c_2p9>;
  382. cd-gpios = <&tlmm 91 GPIO_ACTIVE_LOW>;
  383. };
  384. &swr0 {
  385. status = "okay";
  386. wcd_rx: codec@0,4 {
  387. compatible = "sdw20217010d00";
  388. reg = <0 4>;
  389. qcom,rx-port-mapping = <1 2 3 4 5>;
  390. };
  391. };
  392. &swr1 {
  393. status = "okay";
  394. wcd_tx: codec@0,3 {
  395. compatible = "sdw20217010d00";
  396. reg = <0 3>;
  397. qcom,tx-port-mapping = <1 2 3 4>;
  398. };
  399. };
  400. &uart5 {
  401. compatible = "qcom,geni-debug-uart";
  402. status = "okay";
  403. };
  404. &usb_1 {
  405. status = "okay";
  406. };
  407. &usb_1_dwc3 {
  408. dr_mode = "host";
  409. };
  410. &usb_1_hsphy {
  411. status = "okay";
  412. vdda-pll-supply = <&vreg_l10c_0p8>;
  413. vdda33-supply = <&vreg_l2b_3p0>;
  414. vdda18-supply = <&vreg_l1c_1p8>;
  415. };
  416. &usb_1_qmpphy {
  417. status = "okay";
  418. vdda-phy-supply = <&vreg_l6b_1p2>;
  419. vdda-pll-supply = <&vreg_l1b_0p8>;
  420. };
  421. &uart7 {
  422. status = "okay";
  423. /delete-property/interrupts;
  424. interrupts-extended = <&intc GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>,
  425. <&tlmm 31 IRQ_TYPE_EDGE_FALLING>;
  426. pinctrl-names = "default", "sleep";
  427. pinctrl-1 = <&qup_uart7_sleep_cts>, <&qup_uart7_sleep_rts>, <&qup_uart7_sleep_tx>, <&qup_uart7_sleep_rx>;
  428. bluetooth: bluetooth {
  429. compatible = "qcom,wcn6750-bt";
  430. pinctrl-names = "default";
  431. pinctrl-0 = <&bt_en>, <&sw_ctrl>;
  432. enable-gpios = <&tlmm 85 GPIO_ACTIVE_HIGH>;
  433. swctrl-gpios = <&tlmm 86 GPIO_ACTIVE_HIGH>;
  434. vddaon-supply = <&vreg_s7b_0p9>;
  435. vddbtcxmx-supply = <&vreg_s7b_0p9>;
  436. vddrfacmn-supply = <&vreg_s7b_0p9>;
  437. vddrfa0p8-supply = <&vreg_s7b_0p9>;
  438. vddrfa1p7-supply = <&vreg_s1b_1p8>;
  439. vddrfa1p2-supply = <&vreg_s8b_1p2>;
  440. vddrfa2p2-supply = <&vreg_s1c_2p2>;
  441. vddasd-supply = <&vreg_l11c_2p8>;
  442. max-speed = <3200000>;
  443. };
  444. };
  445. /* PINCTRL - additions to nodes defined in sc7280.dtsi */
  446. &dp_hot_plug_det {
  447. bias-disable;
  448. };
  449. &lpass_dmic01_clk {
  450. drive-strength = <8>;
  451. bias-disable;
  452. };
  453. &lpass_dmic01_clk_sleep {
  454. drive-strength = <2>;
  455. };
  456. &lpass_dmic01_data {
  457. bias-pull-down;
  458. };
  459. &lpass_dmic23_clk {
  460. drive-strength = <8>;
  461. bias-disable;
  462. };
  463. &lpass_dmic23_clk_sleep {
  464. drive-strength = <2>;
  465. };
  466. &lpass_dmic23_data {
  467. bias-pull-down;
  468. };
  469. &lpass_rx_swr_clk {
  470. drive-strength = <2>;
  471. slew-rate = <1>;
  472. bias-disable;
  473. };
  474. &lpass_rx_swr_clk_sleep {
  475. bias-pull-down;
  476. };
  477. &lpass_rx_swr_data {
  478. drive-strength = <2>;
  479. slew-rate = <1>;
  480. bias-bus-hold;
  481. };
  482. &lpass_rx_swr_data_sleep {
  483. bias-pull-down;
  484. };
  485. &lpass_tx_swr_clk {
  486. drive-strength = <2>;
  487. slew-rate = <1>;
  488. bias-disable;
  489. };
  490. &lpass_tx_swr_clk_sleep {
  491. bias-pull-down;
  492. };
  493. &lpass_tx_swr_data {
  494. drive-strength = <2>;
  495. slew-rate = <1>;
  496. bias-bus-hold;
  497. };
  498. &mi2s1_data0 {
  499. drive-strength = <6>;
  500. bias-disable;
  501. };
  502. &mi2s1_sclk {
  503. drive-strength = <6>;
  504. bias-disable;
  505. };
  506. &mi2s1_ws {
  507. drive-strength = <6>;
  508. };
  509. &pm7325_gpios {
  510. key_vol_up_default: key-vol-up-state {
  511. pins = "gpio6";
  512. function = "normal";
  513. input-enable;
  514. bias-pull-up;
  515. power-source = <0>;
  516. qcom,drive-strength = <3>;
  517. };
  518. };
  519. &pcie1_clkreq_n {
  520. bias-pull-up;
  521. drive-strength = <2>;
  522. };
  523. &qspi_cs0 {
  524. bias-disable;
  525. };
  526. &qspi_clk {
  527. bias-disable;
  528. };
  529. &qspi_data01 {
  530. /* High-Z when no transfers; nice to park the lines */
  531. bias-pull-up;
  532. };
  533. &qup_uart5_tx {
  534. drive-strength = <2>;
  535. bias-disable;
  536. };
  537. &qup_uart5_rx {
  538. drive-strength = <2>;
  539. bias-pull-up;
  540. };
  541. &qup_uart7_cts {
  542. /*
  543. * Configure a bias-bus-hold on CTS to lower power
  544. * usage when Bluetooth is turned off. Bus hold will
  545. * maintain a low power state regardless of whether
  546. * the Bluetooth module drives the pin in either
  547. * direction or leaves the pin fully unpowered.
  548. */
  549. bias-bus-hold;
  550. };
  551. &qup_uart7_rts {
  552. /* We'll drive RTS, so no pull */
  553. drive-strength = <2>;
  554. bias-disable;
  555. };
  556. &qup_uart7_tx {
  557. /* We'll drive TX, so no pull */
  558. drive-strength = <2>;
  559. bias-disable;
  560. };
  561. &qup_uart7_rx {
  562. /*
  563. * Configure a pull-up on RX. This is needed to avoid
  564. * garbage data when the TX pin of the Bluetooth module is
  565. * in tri-state (module powered off or not driving the
  566. * signal yet).
  567. */
  568. bias-pull-up;
  569. };
  570. &sdc1_clk {
  571. bias-disable;
  572. drive-strength = <16>;
  573. };
  574. &sdc1_cmd {
  575. bias-pull-up;
  576. drive-strength = <10>;
  577. };
  578. &sdc1_data {
  579. bias-pull-up;
  580. drive-strength = <10>;
  581. };
  582. &sdc1_rclk {
  583. bias-pull-down;
  584. };
  585. &sdc2_clk {
  586. bias-disable;
  587. drive-strength = <16>;
  588. };
  589. &sdc2_cmd {
  590. bias-pull-up;
  591. drive-strength = <10>;
  592. };
  593. &sdc2_data {
  594. bias-pull-up;
  595. drive-strength = <10>;
  596. };
  597. &tlmm {
  598. amp_en: amp-en {
  599. pins = "gpio63";
  600. bias-pull-down;
  601. drive-strength = <2>;
  602. };
  603. bt_en: bt-en-pins {
  604. pins = "gpio85";
  605. function = "gpio";
  606. output-low;
  607. bias-disable;
  608. };
  609. nvme_pwren: nvme-pwren-pins {
  610. function = "gpio";
  611. };
  612. pcie1_reset_n: pcie1-reset-n-pins {
  613. pins = "gpio2";
  614. function = "gpio";
  615. drive-strength = <16>;
  616. output-low;
  617. bias-disable;
  618. };
  619. pcie1_wake_n: pcie1-wake-n-pins {
  620. pins = "gpio3";
  621. function = "gpio";
  622. drive-strength = <2>;
  623. bias-pull-up;
  624. };
  625. qup_uart7_sleep_cts: qup-uart7-sleep-cts-pins {
  626. pins = "gpio28";
  627. function = "gpio";
  628. /*
  629. * Configure a bias-bus-hold on CTS to lower power
  630. * usage when Bluetooth is turned off. Bus hold will
  631. * maintain a low power state regardless of whether
  632. * the Bluetooth module drives the pin in either
  633. * direction or leaves the pin fully unpowered.
  634. */
  635. bias-bus-hold;
  636. };
  637. qup_uart7_sleep_rts: qup-uart7-sleep-rts-pins {
  638. pins = "gpio29";
  639. function = "gpio";
  640. /*
  641. * Configure pull-down on RTS. As RTS is active low
  642. * signal, pull it low to indicate the BT SoC that it
  643. * can wakeup the system anytime from suspend state by
  644. * pulling RX low (by sending wakeup bytes).
  645. */
  646. bias-pull-down;
  647. };
  648. qup_uart7_sleep_tx: qup-uart7-sleep-tx-pins {
  649. pins = "gpio30";
  650. function = "gpio";
  651. /*
  652. * Configure pull-up on TX when it isn't actively driven
  653. * to prevent BT SoC from receiving garbage during sleep.
  654. */
  655. bias-pull-up;
  656. };
  657. qup_uart7_sleep_rx: qup-uart7-sleep-rx-pins {
  658. pins = "gpio31";
  659. function = "gpio";
  660. /*
  661. * Configure a pull-up on RX. This is needed to avoid
  662. * garbage data when the TX pin of the Bluetooth module
  663. * is floating which may cause spurious wakeups.
  664. */
  665. bias-pull-up;
  666. };
  667. sd_cd: sd-cd-pins {
  668. pins = "gpio91";
  669. function = "gpio";
  670. bias-pull-up;
  671. };
  672. sw_ctrl: sw-ctrl-pins {
  673. pins = "gpio86";
  674. function = "gpio";
  675. bias-pull-down;
  676. };
  677. wcd_reset_n: wcd-reset-n {
  678. pins = "gpio83";
  679. function = "gpio";
  680. drive-strength = <8>;
  681. };
  682. wcd_reset_n_sleep: wcd-reset-n-sleep {
  683. pins = "gpio83";
  684. function = "gpio";
  685. drive-strength = <8>;
  686. bias-disable;
  687. };
  688. };