sc7280-herobrine.dtsi 18 KB

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  1. // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2. /*
  3. * Google Herobrine baseboard device tree source
  4. *
  5. * The set of things in this file is a bit loosely defined. It's roughly
  6. * defined as the set of things that the child boards happen to have in
  7. * common. Since all of the child boards started from the same original
  8. * design this is hopefully a large set of things but as more derivatives
  9. * appear things may "bubble down" out of this file. For things that are
  10. * part of the reference design but might not exist on child nodes we will
  11. * follow the lead of the SoC dtsi files and leave their status as "disabled".
  12. *
  13. * Copyright 2022 Google LLC.
  14. */
  15. #include <dt-bindings/input/gpio-keys.h>
  16. #include <dt-bindings/input/input.h>
  17. #include <dt-bindings/leds/common.h>
  18. #include "sc7280-qcard.dtsi"
  19. #include "sc7280-chrome-common.dtsi"
  20. / {
  21. chosen {
  22. stdout-path = "serial0:115200n8";
  23. };
  24. /*
  25. * FIXED REGULATORS
  26. *
  27. * Sort order:
  28. * 1. parents above children.
  29. * 2. higher voltage above lower voltage.
  30. * 3. alphabetically by node name.
  31. */
  32. /* This is the top level supply and variable voltage */
  33. ppvar_sys: ppvar-sys-regulator {
  34. compatible = "regulator-fixed";
  35. regulator-name = "ppvar_sys";
  36. regulator-always-on;
  37. regulator-boot-on;
  38. };
  39. /* This divides ppvar_sys by 2, so voltage is variable */
  40. src_vph_pwr: src-vph-pwr-regulator {
  41. compatible = "regulator-fixed";
  42. regulator-name = "src_vph_pwr";
  43. /* EC turns on with switchcap_on; always on for AP */
  44. regulator-always-on;
  45. regulator-boot-on;
  46. vin-supply = <&ppvar_sys>;
  47. };
  48. pp5000_s5: pp5000-s5-regulator {
  49. compatible = "regulator-fixed";
  50. regulator-name = "pp5000_s5";
  51. /* EC turns on with en_pp5000_s5; always on for AP */
  52. regulator-always-on;
  53. regulator-boot-on;
  54. regulator-min-microvolt = <5000000>;
  55. regulator-max-microvolt = <5000000>;
  56. vin-supply = <&ppvar_sys>;
  57. };
  58. pp3300_z1: pp3300-z1-regulator {
  59. compatible = "regulator-fixed";
  60. regulator-name = "pp3300_z1";
  61. /* EC turns on with en_pp3300_z1; always on for AP */
  62. regulator-always-on;
  63. regulator-boot-on;
  64. regulator-min-microvolt = <3300000>;
  65. regulator-max-microvolt = <3300000>;
  66. vin-supply = <&ppvar_sys>;
  67. };
  68. pp3300_codec: pp3300-codec-regulator {
  69. compatible = "regulator-fixed";
  70. regulator-name = "pp3300_codec";
  71. regulator-min-microvolt = <3300000>;
  72. regulator-max-microvolt = <3300000>;
  73. gpio = <&tlmm 105 GPIO_ACTIVE_HIGH>;
  74. enable-active-high;
  75. pinctrl-names = "default";
  76. pinctrl-0 = <&en_pp3300_codec>;
  77. vin-supply = <&pp3300_z1>;
  78. status = "disabled";
  79. };
  80. pp3300_left_in_mlb: pp3300-left-in-mlb-regulator {
  81. compatible = "regulator-fixed";
  82. regulator-name = "pp3300_left_in_mlb";
  83. regulator-min-microvolt = <3300000>;
  84. regulator-max-microvolt = <3300000>;
  85. gpio = <&tlmm 80 GPIO_ACTIVE_HIGH>;
  86. enable-active-high;
  87. pinctrl-names = "default";
  88. pinctrl-0 = <&en_pp3300_dx_edp>;
  89. vin-supply = <&pp3300_z1>;
  90. };
  91. pp3300_mcu_fp:
  92. pp3300_fp_ls:
  93. pp3300_fp_mcu: pp3300-fp-regulator {
  94. compatible = "regulator-fixed";
  95. regulator-name = "pp3300_fp";
  96. regulator-min-microvolt = <3300000>;
  97. regulator-max-microvolt = <3300000>;
  98. regulator-boot-on;
  99. regulator-always-on;
  100. /*
  101. * WARNING: it is intentional that GPIO 77 isn't listed here.
  102. * The userspace script for updating the fingerprint firmware
  103. * needs to control the FP regulators during a FW update,
  104. * hence the signal can't be owned by the kernel regulator.
  105. */
  106. pinctrl-names = "default";
  107. pinctrl-0 = <&en_fp_rails>;
  108. vin-supply = <&pp3300_z1>;
  109. status = "disabled";
  110. };
  111. pp3300_hub: pp3300-hub-regulator {
  112. compatible = "regulator-fixed";
  113. regulator-name = "pp3300_hub";
  114. regulator-min-microvolt = <3300000>;
  115. regulator-max-microvolt = <3300000>;
  116. /* The BIOS leaves this regulator on */
  117. regulator-boot-on;
  118. gpio = <&tlmm 157 GPIO_ACTIVE_HIGH>;
  119. enable-active-high;
  120. pinctrl-names = "default";
  121. pinctrl-0 = <&hub_en>;
  122. vin-supply = <&pp3300_z1>;
  123. };
  124. pp3300_tp: pp3300-tp-regulator {
  125. compatible = "regulator-fixed";
  126. regulator-name = "pp3300_tp";
  127. regulator-min-microvolt = <3300000>;
  128. regulator-max-microvolt = <3300000>;
  129. /* AP turns on with PP1800_L18B_S0; always on for AP */
  130. regulator-always-on;
  131. regulator-boot-on;
  132. vin-supply = <&pp3300_z1>;
  133. };
  134. pp3300_ssd: pp3300-ssd-regulator {
  135. compatible = "regulator-fixed";
  136. regulator-name = "pp3300_ssd";
  137. regulator-min-microvolt = <3300000>;
  138. regulator-max-microvolt = <3300000>;
  139. gpio = <&tlmm 51 GPIO_ACTIVE_HIGH>;
  140. enable-active-high;
  141. pinctrl-names = "default";
  142. pinctrl-0 = <&ssd_en>;
  143. /*
  144. * The bootloaer may have left PCIe configured. Powering this
  145. * off while the PCIe clocks are still running isn't great,
  146. * so it's better to default to this regulator being on.
  147. */
  148. regulator-boot-on;
  149. vin-supply = <&pp3300_z1>;
  150. };
  151. pp2850_vcm_wf_cam: pp2850-vcm-wf-cam-regulator {
  152. compatible = "regulator-fixed";
  153. regulator-name = "pp2850_vcm_wf_cam";
  154. regulator-min-microvolt = <2850000>;
  155. regulator-max-microvolt = <2850000>;
  156. gpio = <&tlmm 119 GPIO_ACTIVE_HIGH>;
  157. enable-active-high;
  158. pinctrl-names = "default";
  159. pinctrl-0 = <&wf_cam_en>;
  160. vin-supply = <&pp3300_z1>;
  161. status = "disabled";
  162. };
  163. pp2850_wf_cam: pp2850-wf-cam-regulator {
  164. compatible = "regulator-fixed";
  165. regulator-name = "pp2850_wf_cam";
  166. regulator-min-microvolt = <2850000>;
  167. regulator-max-microvolt = <2850000>;
  168. gpio = <&tlmm 119 GPIO_ACTIVE_HIGH>;
  169. enable-active-high;
  170. /*
  171. * The pinconf can only be referenced once so we put it on the
  172. * first regulator and comment it out here.
  173. *
  174. * pinctrl-names = "default";
  175. * pinctrl-0 = <&wf_cam_en>;
  176. */
  177. vin-supply = <&pp3300_z1>;
  178. status = "disabled";
  179. };
  180. pp1800_fp: pp1800-fp-regulator {
  181. compatible = "regulator-fixed";
  182. regulator-name = "pp1800_fp";
  183. regulator-min-microvolt = <1800000>;
  184. regulator-max-microvolt = <1800000>;
  185. regulator-boot-on;
  186. regulator-always-on;
  187. /*
  188. * WARNING: it is intentional that GPIO 77 isn't listed here.
  189. * The userspace script for updating the fingerprint firmware
  190. * needs to control the FP regulators during a FW update,
  191. * hence the signal can't be owned by the kernel regulator.
  192. */
  193. pinctrl-names = "default";
  194. pinctrl-0 = <&en_fp_rails>;
  195. vin-supply = <&pp1800_l18b_s0>;
  196. status = "disabled";
  197. };
  198. pp1800_wf_cam: pp1800-wf-cam-regulator {
  199. compatible = "regulator-fixed";
  200. regulator-name = "pp1800_wf_cam";
  201. regulator-min-microvolt = <1800000>;
  202. regulator-max-microvolt = <1800000>;
  203. gpio = <&tlmm 119 GPIO_ACTIVE_HIGH>;
  204. enable-active-high;
  205. /*
  206. * The pinconf can only be referenced once so we put it on the
  207. * first regulator and comment it out here.
  208. *
  209. * pinctrl-names = "default";
  210. * pinctrl-0 = <&wf_cam_en>;
  211. */
  212. vin-supply = <&vreg_l19b_s0>;
  213. status = "disabled";
  214. };
  215. pp1200_wf_cam: pp1200-wf-cam-regulator {
  216. compatible = "regulator-fixed";
  217. regulator-name = "pp1200_wf_cam";
  218. regulator-min-microvolt = <1200000>;
  219. regulator-max-microvolt = <1200000>;
  220. gpio = <&tlmm 119 GPIO_ACTIVE_HIGH>;
  221. enable-active-high;
  222. /*
  223. * The pinconf can only be referenced once so we put it on the
  224. * first regulator and comment it out here.
  225. *
  226. * pinctrl-names = "default";
  227. * pinctrl-0 = <&wf_cam_en>;
  228. */
  229. vin-supply = <&pp3300_z1>;
  230. status = "disabled";
  231. };
  232. /* BOARD-SPECIFIC TOP LEVEL NODES */
  233. max98360a: audio-codec-0 {
  234. compatible = "maxim,max98360a";
  235. pinctrl-names = "default";
  236. pinctrl-0 = <&amp_en>;
  237. sdmode-gpios = <&tlmm 63 GPIO_ACTIVE_HIGH>;
  238. #sound-dai-cells = <0>;
  239. };
  240. pwmleds: pwmleds {
  241. compatible = "pwm-leds";
  242. status = "disabled";
  243. keyboard_backlight: keyboard-backlight {
  244. label = "cros_ec::kbd_backlight";
  245. function = LED_FUNCTION_KBD_BACKLIGHT;
  246. pwms = <&cros_ec_pwm 0>;
  247. max-brightness = <1023>;
  248. };
  249. };
  250. };
  251. /*
  252. * ADJUSTMENTS TO QCARD REGULATORS
  253. *
  254. * Mostly this is just board-local names for regulators that come from
  255. * Qcard, but this also has some minor regulator overrides.
  256. *
  257. * Names are only listed here if regulators go somewhere other than a
  258. * testpoint.
  259. */
  260. /* From Qcard to our board; ordered by PMIC-ID / rail number */
  261. pp1256_s8b: &vreg_s8b_1p256 {};
  262. pp1800_l18b_s0: &vreg_l18b_1p8 {};
  263. pp1800_l18b: &vreg_l18b_1p8 {};
  264. vreg_l19b_s0: &vreg_l19b_1p8 {};
  265. pp1800_alc5682: &vreg_l2c_1p8 {};
  266. pp1800_l2c: &vreg_l2c_1p8 {};
  267. vreg_l4c: &vreg_l4c_1p8_3p0 {};
  268. ppvar_l6c: &vreg_l6c_2p96 {};
  269. pp3000_l7c: &vreg_l7c_3p0 {};
  270. pp1800_prox: &vreg_l8c_1p8 {};
  271. pp1800_l8c: &vreg_l8c_1p8 {};
  272. pp2950_l9c: &vreg_l9c_2p96 {};
  273. pp1800_lcm: &vreg_l12c_1p8 {};
  274. pp1800_mipi: &vreg_l12c_1p8 {};
  275. pp1800_l12c: &vreg_l12c_1p8 {};
  276. pp3300_lcm: &vreg_l13c_3p0 {};
  277. pp3300_mipi: &vreg_l13c_3p0 {};
  278. pp3300_l13c: &vreg_l13c_3p0 {};
  279. /* From our board to Qcard; ordered same as node definition above */
  280. vreg_edp_bl: &ppvar_sys {};
  281. ts_avdd: &pp3300_left_in_mlb {};
  282. vreg_edp_3p3: &pp3300_left_in_mlb {};
  283. /* Regulator overrides from Qcard */
  284. /*
  285. * Herobrine boards only use l2c to power an external audio codec (like
  286. * alc5682) and we want that to be at 1.8V, not at some slightly lower voltage.
  287. */
  288. &vreg_l2c_1p8 {
  289. regulator-min-microvolt = <1800000>;
  290. };
  291. /* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */
  292. &edp_panel {
  293. /* Our board provides power to the qcard for the eDP panel. */
  294. power-supply = <&vreg_edp_3p3>;
  295. };
  296. ap_sar_sensor_i2c: &i2c1 {
  297. clock-frequency = <400000>;
  298. status = "disabled";
  299. ap_sar_sensor0: proximity@28 {
  300. compatible = "semtech,sx9324";
  301. reg = <0x28>;
  302. #io-channel-cells = <1>;
  303. pinctrl-names = "default";
  304. pinctrl-0 = <&sar0_irq_odl>;
  305. interrupt-parent = <&tlmm>;
  306. interrupts = <141 IRQ_TYPE_LEVEL_LOW>;
  307. vdd-supply = <&pp1800_prox>;
  308. label = "proximity-wifi_cellular-0";
  309. status = "disabled";
  310. };
  311. ap_sar_sensor1: proximity@2c {
  312. compatible = "semtech,sx9324";
  313. reg = <0x2c>;
  314. #io-channel-cells = <1>;
  315. pinctrl-names = "default";
  316. pinctrl-0 = <&sar1_irq_odl>;
  317. interrupt-parent = <&tlmm>;
  318. interrupts = <140 IRQ_TYPE_LEVEL_LOW>;
  319. vdd-supply = <&pp1800_prox>;
  320. label = "proximity-wifi_cellular-1";
  321. status = "disabled";
  322. };
  323. };
  324. ap_i2c_tpm: &i2c14 {
  325. status = "okay";
  326. clock-frequency = <400000>;
  327. tpm@50 {
  328. compatible = "google,cr50";
  329. reg = <0x50>;
  330. pinctrl-names = "default";
  331. pinctrl-0 = <&gsc_ap_int_odl>;
  332. interrupt-parent = <&tlmm>;
  333. interrupts = <104 IRQ_TYPE_EDGE_RISING>;
  334. };
  335. };
  336. &mdss {
  337. status = "okay";
  338. };
  339. &mdss_dp {
  340. status = "okay";
  341. pinctrl-names = "default";
  342. pinctrl-0 = <&dp_hot_plug_det>;
  343. data-lanes = <0 1>;
  344. };
  345. &mdss_mdp {
  346. status = "okay";
  347. };
  348. /* NVMe drive, enabled on a per-board basis */
  349. &pcie1 {
  350. pinctrl-names = "default";
  351. pinctrl-0 = <&pcie1_clkreq_n>, <&ssd_rst_l>, <&pe_wake_odl>;
  352. perst-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
  353. vddpe-3v3-supply = <&pp3300_ssd>;
  354. };
  355. &pm8350c_pwm {
  356. status = "okay";
  357. };
  358. &pm8350c_pwm_backlight {
  359. status = "okay";
  360. /* Our board provides power to the qcard for the backlight */
  361. power-supply = <&vreg_edp_bl>;
  362. };
  363. &pmk8350_rtc {
  364. status = "disabled";
  365. };
  366. &qupv3_id_0 {
  367. status = "okay";
  368. };
  369. &qupv3_id_1 {
  370. status = "okay";
  371. };
  372. /* SD Card, enabled on a per-board basis */
  373. &sdhc_2 {
  374. pinctrl-0 = <&sdc2_clk>, <&sdc2_cmd>, <&sdc2_data>, <&sd_cd_odl>;
  375. pinctrl-1 = <&sdc2_clk_sleep>, <&sdc2_cmd_sleep>, <&sdc2_data_sleep>, <&sd_cd_odl>;
  376. vmmc-supply = <&pp2950_l9c>;
  377. vqmmc-supply = <&ppvar_l6c>;
  378. cd-gpios = <&tlmm 91 GPIO_ACTIVE_LOW>;
  379. };
  380. &spi_flash {
  381. spi-max-frequency = <50000000>;
  382. };
  383. /* Fingerprint, enabled on a per-board basis */
  384. ap_spi_fp: &spi9 {
  385. pinctrl-0 = <&qup_spi9_data_clk>, <&qup_spi9_cs_gpio_init_high>, <&qup_spi9_cs_gpio>;
  386. cs-gpios = <&tlmm 39 GPIO_ACTIVE_LOW>;
  387. cros_ec_fp: ec@0 {
  388. compatible = "google,cros-ec-spi";
  389. reg = <0>;
  390. interrupt-parent = <&tlmm>;
  391. interrupts = <61 IRQ_TYPE_LEVEL_LOW>;
  392. pinctrl-names = "default";
  393. pinctrl-0 = <&fp_to_ap_irq_l>, <&fp_rst_l>, <&fpmcu_boot0>;
  394. spi-max-frequency = <3000000>;
  395. };
  396. };
  397. ap_ec_spi: &spi10 {
  398. status = "okay";
  399. pinctrl-0 = <&qup_spi10_data_clk>, <&qup_spi10_cs_gpio_init_high>, <&qup_spi10_cs_gpio>;
  400. cs-gpios = <&tlmm 43 GPIO_ACTIVE_LOW>;
  401. cros_ec: ec@0 {
  402. compatible = "google,cros-ec-spi";
  403. reg = <0>;
  404. interrupt-parent = <&tlmm>;
  405. interrupts = <18 IRQ_TYPE_LEVEL_LOW>;
  406. pinctrl-names = "default";
  407. pinctrl-0 = <&ap_ec_int_l>;
  408. spi-max-frequency = <3000000>;
  409. cros_ec_pwm: pwm {
  410. compatible = "google,cros-ec-pwm";
  411. #pwm-cells = <1>;
  412. };
  413. i2c_tunnel: i2c-tunnel {
  414. compatible = "google,cros-ec-i2c-tunnel";
  415. google,remote-bus = <0>;
  416. #address-cells = <1>;
  417. #size-cells = <0>;
  418. };
  419. typec {
  420. compatible = "google,cros-ec-typec";
  421. #address-cells = <1>;
  422. #size-cells = <0>;
  423. usb_c0: connector@0 {
  424. compatible = "usb-c-connector";
  425. reg = <0>;
  426. label = "left";
  427. power-role = "dual";
  428. data-role = "host";
  429. try-power-role = "source";
  430. };
  431. usb_c1: connector@1 {
  432. compatible = "usb-c-connector";
  433. reg = <1>;
  434. label = "right";
  435. power-role = "dual";
  436. data-role = "host";
  437. try-power-role = "source";
  438. };
  439. };
  440. };
  441. };
  442. #include <arm/cros-ec-keyboard.dtsi>
  443. #include <arm/cros-ec-sbs.dtsi>
  444. &keyboard_controller {
  445. function-row-physmap = <
  446. MATRIX_KEY(0x00, 0x02, 0) /* T1 */
  447. MATRIX_KEY(0x03, 0x02, 0) /* T2 */
  448. MATRIX_KEY(0x02, 0x02, 0) /* T3 */
  449. MATRIX_KEY(0x01, 0x02, 0) /* T4 */
  450. MATRIX_KEY(0x03, 0x04, 0) /* T5 */
  451. MATRIX_KEY(0x02, 0x04, 0) /* T6 */
  452. MATRIX_KEY(0x01, 0x04, 0) /* T7 */
  453. MATRIX_KEY(0x02, 0x09, 0) /* T8 */
  454. MATRIX_KEY(0x01, 0x09, 0) /* T9 */
  455. MATRIX_KEY(0x00, 0x04, 0) /* T10 */
  456. >;
  457. linux,keymap = <
  458. MATRIX_KEY(0x00, 0x02, KEY_BACK)
  459. MATRIX_KEY(0x03, 0x02, KEY_REFRESH)
  460. MATRIX_KEY(0x02, 0x02, KEY_ZOOM)
  461. MATRIX_KEY(0x01, 0x02, KEY_SCALE)
  462. MATRIX_KEY(0x03, 0x04, KEY_SYSRQ)
  463. MATRIX_KEY(0x02, 0x04, KEY_BRIGHTNESSDOWN)
  464. MATRIX_KEY(0x01, 0x04, KEY_BRIGHTNESSUP)
  465. MATRIX_KEY(0x02, 0x09, KEY_MUTE)
  466. MATRIX_KEY(0x01, 0x09, KEY_VOLUMEDOWN)
  467. MATRIX_KEY(0x00, 0x04, KEY_VOLUMEUP)
  468. CROS_STD_MAIN_KEYMAP
  469. >;
  470. };
  471. &usb_1 {
  472. status = "okay";
  473. };
  474. &usb_1_dwc3 {
  475. dr_mode = "host";
  476. #address-cells = <1>;
  477. #size-cells = <0>;
  478. /* 2.x hub on port 1 */
  479. usb_hub_2_x: hub@1 {
  480. compatible = "usbbda,5411";
  481. reg = <1>;
  482. vdd-supply = <&pp3300_hub>;
  483. peer-hub = <&usb_hub_3_x>;
  484. };
  485. /* 3.x hub on port 2 */
  486. usb_hub_3_x: hub@2 {
  487. compatible = "usbbda,411";
  488. reg = <2>;
  489. vdd-supply = <&pp3300_hub>;
  490. peer-hub = <&usb_hub_2_x>;
  491. };
  492. };
  493. &usb_1_hsphy {
  494. status = "okay";
  495. };
  496. &usb_1_qmpphy {
  497. status = "okay";
  498. };
  499. /* PINCTRL - ADDITIONS TO NODES IN PARENT DEVICE TREE FILES */
  500. &dp_hot_plug_det {
  501. bias-disable;
  502. };
  503. &pcie1_clkreq_n {
  504. bias-pull-up;
  505. drive-strength = <2>;
  506. };
  507. &qspi_cs0 {
  508. bias-disable;
  509. drive-strength = <8>;
  510. };
  511. &qspi_clk {
  512. bias-disable;
  513. drive-strength = <8>;
  514. };
  515. &qspi_data01 {
  516. /* High-Z when no transfers; nice to park the lines */
  517. bias-pull-up;
  518. drive-strength = <8>;
  519. };
  520. /* For ap_tp_i2c */
  521. &qup_i2c0_data_clk {
  522. /* Has external pull */
  523. bias-disable;
  524. drive-strength = <2>;
  525. };
  526. /* For ap_i2c_tpm */
  527. &qup_i2c14_data_clk {
  528. /* Has external pull */
  529. bias-disable;
  530. drive-strength = <2>;
  531. };
  532. /* For ap_spi_fp */
  533. &qup_spi9_data_clk {
  534. bias-disable;
  535. drive-strength = <2>;
  536. };
  537. /* For ap_spi_fp */
  538. &qup_spi9_cs_gpio {
  539. bias-disable;
  540. drive-strength = <2>;
  541. };
  542. /* For ap_ec_spi */
  543. &qup_spi10_data_clk {
  544. bias-disable;
  545. drive-strength = <2>;
  546. };
  547. /* For ap_ec_spi */
  548. &qup_spi10_cs_gpio {
  549. bias-disable;
  550. drive-strength = <2>;
  551. };
  552. /* For uart_dbg */
  553. &qup_uart5_rx {
  554. bias-pull-up;
  555. };
  556. /* For uart_dbg */
  557. &qup_uart5_tx {
  558. bias-disable;
  559. drive-strength = <2>;
  560. };
  561. &sdc2_clk {
  562. bias-disable;
  563. drive-strength = <16>;
  564. };
  565. &sdc2_cmd {
  566. bias-pull-up;
  567. drive-strength = <10>;
  568. };
  569. &sdc2_data {
  570. bias-pull-up;
  571. drive-strength = <10>;
  572. };
  573. /* PINCTRL - board-specific pinctrl */
  574. &pm7325_gpios {
  575. /*
  576. * On a quick glance it might look like KYPD_VOL_UP_N is used, but
  577. * that only passes through to a debug connector and not to the actual
  578. * volume up key.
  579. */
  580. status = "disabled"; /* No GPIOs are connected */
  581. };
  582. &pmk8350_gpios {
  583. status = "disabled"; /* No GPIOs are connected */
  584. };
  585. &tlmm {
  586. /* pinctrl settings for pins that have no real owners. */
  587. pinctrl-names = "default";
  588. pinctrl-0 = <&bios_flash_wp_od>;
  589. amp_en: amp-en-pins {
  590. pins = "gpio63";
  591. function = "gpio";
  592. bias-disable;
  593. drive-strength = <2>;
  594. };
  595. ap_ec_int_l: ap-ec-int-l-pins {
  596. pins = "gpio18";
  597. function = "gpio";
  598. bias-pull-up;
  599. };
  600. bios_flash_wp_od: bios-flash-wp-od-pins {
  601. pins = "gpio16";
  602. function = "gpio";
  603. /* Has external pull */
  604. bias-disable;
  605. };
  606. en_fp_rails: en-fp-rails-pins {
  607. pins = "gpio77";
  608. function = "gpio";
  609. bias-disable;
  610. drive-strength = <2>;
  611. output-high;
  612. };
  613. en_pp3300_codec: en-pp3300-codec-pins {
  614. pins = "gpio105";
  615. function = "gpio";
  616. bias-disable;
  617. drive-strength = <2>;
  618. };
  619. en_pp3300_dx_edp: en-pp3300-dx-edp-pins {
  620. pins = "gpio80";
  621. function = "gpio";
  622. bias-disable;
  623. drive-strength = <2>;
  624. };
  625. fp_rst_l: fp-rst-l-pins {
  626. pins = "gpio78";
  627. function = "gpio";
  628. bias-disable;
  629. drive-strength = <2>;
  630. };
  631. fp_to_ap_irq_l: fp-to-ap-irq-l-pins {
  632. pins = "gpio61";
  633. function = "gpio";
  634. /* Has external pullup */
  635. bias-disable;
  636. };
  637. fpmcu_boot0: fpmcu-boot0-pins {
  638. pins = "gpio68";
  639. function = "gpio";
  640. bias-disable;
  641. };
  642. gsc_ap_int_odl: gsc-ap-int-odl-pins {
  643. pins = "gpio104";
  644. function = "gpio";
  645. bias-pull-up;
  646. };
  647. hp_irq: hp-irq-pins {
  648. pins = "gpio101";
  649. function = "gpio";
  650. bias-pull-up;
  651. };
  652. hub_en: hub-en-pins {
  653. pins = "gpio157";
  654. function = "gpio";
  655. bias-disable;
  656. drive-strength = <2>;
  657. };
  658. pe_wake_odl: pe-wake-odl-pins {
  659. pins = "gpio3";
  660. function = "gpio";
  661. /* Has external pull */
  662. bias-disable;
  663. drive-strength = <2>;
  664. };
  665. /* For ap_spi_fp */
  666. qup_spi9_cs_gpio_init_high: qup-spi9-cs-gpio-init-high-pins {
  667. pins = "gpio39";
  668. function = "gpio";
  669. output-high;
  670. };
  671. /* For ap_ec_spi */
  672. qup_spi10_cs_gpio_init_high: qup-spi10-cs-gpio-init-high-pins {
  673. pins = "gpio43";
  674. function = "gpio";
  675. output-high;
  676. };
  677. sar0_irq_odl: sar0-irq-odl-pins {
  678. pins = "gpio141";
  679. function = "gpio";
  680. bias-pull-up;
  681. };
  682. sar1_irq_odl: sar1-irq-odl-pins {
  683. pins = "gpio140";
  684. function = "gpio";
  685. bias-pull-up;
  686. };
  687. sd_cd_odl: sd-cd-odl-pins {
  688. pins = "gpio91";
  689. function = "gpio";
  690. bias-pull-up;
  691. };
  692. ssd_en: ssd-en-pins {
  693. pins = "gpio51";
  694. function = "gpio";
  695. bias-disable;
  696. drive-strength = <2>;
  697. };
  698. ssd_rst_l: ssd-rst-l-pins {
  699. pins = "gpio2";
  700. function = "gpio";
  701. bias-disable;
  702. drive-strength = <2>;
  703. output-low;
  704. };
  705. tp_int_odl: tp-int-odl-pins {
  706. pins = "gpio7";
  707. function = "gpio";
  708. /* Has external pullup */
  709. bias-disable;
  710. };
  711. wf_cam_en: wf-cam-en-pins {
  712. pins = "gpio119";
  713. function = "gpio";
  714. /* Has external pulldown */
  715. bias-disable;
  716. drive-strength = <2>;
  717. };
  718. };