sc7280-herobrine-herobrine-r1.dts 6.7 KB

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  1. // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2. /*
  3. * Google Herobrine board device tree source
  4. *
  5. * Copyright 2022 Google LLC.
  6. */
  7. /dts-v1/;
  8. #include "sc7280-herobrine.dtsi"
  9. #include "sc7280-herobrine-lte-sku.dtsi"
  10. / {
  11. model = "Google Herobrine (rev1+)";
  12. compatible = "google,herobrine", "qcom,sc7280";
  13. };
  14. /*
  15. * ADDITIONS TO FIXED REGULATORS DEFINED IN PARENT DEVICE TREE FILES
  16. *
  17. * Sort order matches the order in the parent files (parents before children).
  18. */
  19. &pp3300_codec {
  20. status = "okay";
  21. };
  22. &pp3300_fp_mcu {
  23. status = "okay";
  24. };
  25. &pp2850_vcm_wf_cam {
  26. status = "okay";
  27. };
  28. &pp2850_wf_cam {
  29. status = "okay";
  30. };
  31. &pp1800_wf_cam {
  32. status = "okay";
  33. };
  34. &pp1200_wf_cam {
  35. status = "okay";
  36. };
  37. /* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */
  38. &ap_spi_fp {
  39. status = "okay";
  40. };
  41. /*
  42. * Although the trackpad is really part of the herobrine baseboard, we'll
  43. * put the actual definition in the board device tree since different boards
  44. * might hook up different trackpads (or no i2c trackpad at all in the case
  45. * of tablets / detachables).
  46. */
  47. ap_tp_i2c: &i2c0 {
  48. status = "okay";
  49. clock-frequency = <400000>;
  50. trackpad: trackpad@15 {
  51. compatible = "elan,ekth3000";
  52. reg = <0x15>;
  53. pinctrl-names = "default";
  54. pinctrl-0 = <&tp_int_odl>;
  55. interrupt-parent = <&tlmm>;
  56. interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
  57. vcc-supply = <&pp3300_z1>;
  58. wakeup-source;
  59. };
  60. };
  61. /*
  62. * The touchscreen connector might come off the Qcard, at least in the case of
  63. * eDP. Like the trackpad, we'll put it in the board device tree file since
  64. * different boards have different touchscreens.
  65. */
  66. ts_i2c: &i2c13 {
  67. status = "okay";
  68. clock-frequency = <400000>;
  69. ap_ts: touchscreen@5c {
  70. compatible = "hid-over-i2c";
  71. reg = <0x5c>;
  72. pinctrl-names = "default";
  73. pinctrl-0 = <&ts_int_conn>, <&ts_rst_conn>;
  74. interrupt-parent = <&tlmm>;
  75. interrupts = <55 IRQ_TYPE_LEVEL_LOW>;
  76. post-power-on-delay-ms = <500>;
  77. hid-descr-addr = <0x0000>;
  78. vdd-supply = <&ts_avdd>;
  79. };
  80. };
  81. &mdss_edp {
  82. status = "okay";
  83. };
  84. &mdss_edp_phy {
  85. status = "okay";
  86. };
  87. /* For nvme */
  88. &pcie1 {
  89. status = "okay";
  90. };
  91. /* For nvme */
  92. &pcie1_phy {
  93. status = "okay";
  94. };
  95. /* For eMMC */
  96. &sdhc_1 {
  97. status = "okay";
  98. };
  99. /* For SD Card */
  100. &sdhc_2 {
  101. status = "okay";
  102. };
  103. /* PINCTRL - ADDITIONS TO NODES IN PARENT DEVICE TREE FILES */
  104. /*
  105. * This pin goes to the display panel but then doesn't actually do anything
  106. * on the panel itself (it doesn't connect to the touchscreen controller).
  107. * We'll set a pullup here just to park the line.
  108. */
  109. &ts_rst_conn {
  110. bias-pull-up;
  111. };
  112. /* PINCTRL - BOARD-SPECIFIC */
  113. /*
  114. * Methodology for gpio-line-names:
  115. * - If a pin goes to herobrine board and is named it gets that name.
  116. * - If a pin goes to herobrine board and is not named, it gets no name.
  117. * - If a pin is totally internal to Qcard then it gets Qcard name.
  118. * - If a pin is not hooked up on Qcard, it gets no name.
  119. */
  120. &pm8350c_gpios {
  121. gpio-line-names = "FLASH_STROBE_1", /* 1 */
  122. "AP_SUSPEND",
  123. "PM8008_1_RST_N",
  124. "",
  125. "",
  126. "",
  127. "PMIC_EDP_BL_EN",
  128. "PMIC_EDP_BL_PWM",
  129. "";
  130. };
  131. &tlmm {
  132. gpio-line-names = "AP_TP_I2C_SDA", /* 0 */
  133. "AP_TP_I2C_SCL",
  134. "SSD_RST_L",
  135. "PE_WAKE_ODL",
  136. "AP_SAR_SDA",
  137. "AP_SAR_SCL",
  138. "PRB_SC_GPIO_6",
  139. "TP_INT_ODL",
  140. "HP_I2C_SDA",
  141. "HP_I2C_SCL",
  142. "GNSS_L1_EN", /* 10 */
  143. "GNSS_L5_EN",
  144. "SPI_AP_MOSI",
  145. "SPI_AP_MISO",
  146. "SPI_AP_CLK",
  147. "SPI_AP_CS0_L",
  148. /*
  149. * AP_FLASH_WP is crossystem ABI. Schematics
  150. * call it BIOS_FLASH_WP_OD.
  151. */
  152. "AP_FLASH_WP",
  153. "",
  154. "AP_EC_INT_L",
  155. "",
  156. "UF_CAM_RST_L", /* 20 */
  157. "WF_CAM_RST_L",
  158. "UART_AP_TX_DBG_RX",
  159. "UART_DBG_TX_AP_RX",
  160. "",
  161. "PM8008_IRQ_1",
  162. "HOST2WLAN_SOL",
  163. "WLAN2HOST_SOL",
  164. "MOS_BT_UART_CTS",
  165. "MOS_BT_UART_RFR",
  166. "MOS_BT_UART_TX", /* 30 */
  167. "MOS_BT_UART_RX",
  168. "PRB_SC_GPIO_32",
  169. "HUB_RST_L",
  170. "",
  171. "",
  172. "AP_SPI_FP_MISO",
  173. "AP_SPI_FP_MOSI",
  174. "AP_SPI_FP_CLK",
  175. "AP_SPI_FP_CS_L",
  176. "AP_EC_SPI_MISO", /* 40 */
  177. "AP_EC_SPI_MOSI",
  178. "AP_EC_SPI_CLK",
  179. "AP_EC_SPI_CS_L",
  180. "LCM_RST_L",
  181. "EARLY_EUD_N",
  182. "",
  183. "DP_HOT_PLUG_DET",
  184. "IO_BRD_MLB_ID0",
  185. "IO_BRD_MLB_ID1",
  186. "IO_BRD_MLB_ID2", /* 50 */
  187. "SSD_EN",
  188. "TS_I2C_SDA_CONN",
  189. "TS_I2C_CLK_CONN",
  190. "TS_RST_CONN",
  191. "TS_INT_CONN",
  192. "AP_I2C_TPM_SDA",
  193. "AP_I2C_TPM_SCL",
  194. "PRB_SC_GPIO_58",
  195. "PRB_SC_GPIO_59",
  196. "EDP_HOT_PLUG_DET_N", /* 60 */
  197. "FP_TO_AP_IRQ_L",
  198. "",
  199. "AMP_EN",
  200. "CAM0_MCLK_GPIO_64",
  201. "CAM1_MCLK_GPIO_65",
  202. "WF_CAM_MCLK",
  203. "PRB_SC_GPIO_67",
  204. "FPMCU_BOOT0",
  205. "UF_CAM_SDA",
  206. "UF_CAM_SCL", /* 70 */
  207. "",
  208. "",
  209. "WF_CAM_SDA",
  210. "WF_CAM_SCL",
  211. "",
  212. "",
  213. "EN_FP_RAILS",
  214. "FP_RST_L",
  215. "PCIE1_CLKREQ_ODL",
  216. "EN_PP3300_DX_EDP", /* 80 */
  217. "SC_GPIO_81",
  218. "FORCED_USB_BOOT",
  219. "WCD_RESET_N",
  220. "MOS_WLAN_EN",
  221. "MOS_BT_EN",
  222. "MOS_SW_CTRL",
  223. "MOS_PCIE0_RST",
  224. "MOS_PCIE0_CLKREQ_N",
  225. "MOS_PCIE0_WAKE_N",
  226. "MOS_LAA_AS_EN", /* 90 */
  227. "SD_CD_ODL",
  228. "",
  229. "",
  230. "MOS_BT_WLAN_SLIMBUS_CLK",
  231. "MOS_BT_WLAN_SLIMBUS_DAT0",
  232. "HP_MCLK",
  233. "HP_BCLK",
  234. "HP_DOUT",
  235. "HP_DIN",
  236. "HP_LRCLK", /* 100 */
  237. "HP_IRQ",
  238. "",
  239. "",
  240. "GSC_AP_INT_ODL",
  241. "EN_PP3300_CODEC",
  242. "AMP_BCLK",
  243. "AMP_DIN",
  244. "AMP_LRCLK",
  245. "UIM1_DATA_GPIO_109",
  246. "UIM1_CLK_GPIO_110", /* 110 */
  247. "UIM1_RESET_GPIO_111",
  248. "PRB_SC_GPIO_112",
  249. "UIM0_DATA",
  250. "UIM0_CLK",
  251. "UIM0_RST",
  252. "UIM0_PRESENT_ODL",
  253. "SDM_RFFE0_CLK",
  254. "SDM_RFFE0_DATA",
  255. "WF_CAM_EN",
  256. "FASTBOOT_SEL_0", /* 120 */
  257. "SC_GPIO_121",
  258. "FASTBOOT_SEL_1",
  259. "SC_GPIO_123",
  260. "FASTBOOT_SEL_2",
  261. "SM_RFFE4_CLK_GRFC_8",
  262. "SM_RFFE4_DATA_GRFC_9",
  263. "WLAN_COEX_UART1_RX",
  264. "WLAN_COEX_UART1_TX",
  265. "PRB_SC_GPIO_129",
  266. "LCM_ID0", /* 130 */
  267. "LCM_ID1",
  268. "",
  269. "SDR_QLINK_REQ",
  270. "SDR_QLINK_EN",
  271. "QLINK0_WMSS_RESET_N",
  272. "SMR526_QLINK1_REQ",
  273. "SMR526_QLINK1_EN",
  274. "SMR526_QLINK1_WMSS_RESET_N",
  275. "PRB_SC_GPIO_139",
  276. "SAR1_IRQ_ODL", /* 140 */
  277. "SAR0_IRQ_ODL",
  278. "PRB_SC_GPIO_142",
  279. "",
  280. "WCD_SWR_TX_CLK",
  281. "WCD_SWR_TX_DATA0",
  282. "WCD_SWR_TX_DATA1",
  283. "WCD_SWR_RX_CLK",
  284. "WCD_SWR_RX_DATA0",
  285. "WCD_SWR_RX_DATA1",
  286. "DMIC01_CLK", /* 150 */
  287. "DMIC01_DATA",
  288. "DMIC23_CLK",
  289. "DMIC23_DATA",
  290. "",
  291. "",
  292. "EC_IN_RW_ODL",
  293. "HUB_EN",
  294. "WCD_SWR_TX_DATA2",
  295. "",
  296. "", /* 160 */
  297. "",
  298. "",
  299. "",
  300. "",
  301. "",
  302. "",
  303. "",
  304. "",
  305. "",
  306. "", /* 170 */
  307. "MOS_BLE_UART_TX",
  308. "MOS_BLE_UART_RX",
  309. "",
  310. "",
  311. "";
  312. };