sc7280-herobrine-evoker-r0.dts 5.8 KB

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  1. // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2. /*
  3. * Google Evoker board device tree source
  4. *
  5. * Copyright 2022 Google LLC.
  6. */
  7. /dts-v1/;
  8. #include "sc7280-herobrine.dtsi"
  9. / {
  10. model = "Google Evoker";
  11. compatible = "google,evoker", "qcom,sc7280";
  12. };
  13. /*
  14. * ADDITIONS TO FIXED REGULATORS DEFINED IN PARENT DEVICE TREE FILES
  15. *
  16. * Sort order matches the order in the parent files (parents before children).
  17. */
  18. &pp3300_codec {
  19. status = "okay";
  20. };
  21. /* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */
  22. ap_tp_i2c: &i2c0 {
  23. status = "okay";
  24. clock-frequency = <400000>;
  25. trackpad: trackpad@2c {
  26. compatible = "hid-over-i2c";
  27. reg = <0x2c>;
  28. pinctrl-names = "default";
  29. pinctrl-0 = <&tp_int_odl>;
  30. interrupt-parent = <&tlmm>;
  31. interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
  32. hid-descr-addr = <0x20>;
  33. vcc-supply = <&pp3300_z1>;
  34. wakeup-source;
  35. };
  36. };
  37. ts_i2c: &i2c13 {
  38. status = "okay";
  39. clock-frequency = <400000>;
  40. ap_ts: touchscreen@10 {
  41. compatible = "elan,ekth6915";
  42. reg = <0x10>;
  43. pinctrl-names = "default";
  44. pinctrl-0 = <&ts_int_conn>, <&ts_rst_conn>;
  45. interrupt-parent = <&tlmm>;
  46. interrupts = <55 IRQ_TYPE_LEVEL_LOW>;
  47. reset-gpios = <&tlmm 54 GPIO_ACTIVE_LOW>;
  48. vcc33-supply = <&ts_avdd>;
  49. };
  50. };
  51. &ap_sar_sensor_i2c {
  52. status = "okay";
  53. };
  54. &ap_sar_sensor0 {
  55. status = "okay";
  56. };
  57. &ap_sar_sensor1 {
  58. status = "okay";
  59. };
  60. &mdss_edp {
  61. status = "okay";
  62. };
  63. &mdss_edp_phy {
  64. status = "okay";
  65. };
  66. /* For nvme */
  67. &pcie1 {
  68. status = "okay";
  69. };
  70. /* For nvme */
  71. &pcie1_phy {
  72. status = "okay";
  73. };
  74. &pwmleds {
  75. status = "okay";
  76. };
  77. /* For eMMC */
  78. &sdhc_1 {
  79. status = "okay";
  80. };
  81. /* PINCTRL - ADDITIONS TO NODES IN PARENT DEVICE TREE FILES */
  82. &ts_rst_conn {
  83. bias-disable;
  84. };
  85. /* PINCTRL - BOARD-SPECIFIC */
  86. /*
  87. * Methodology for gpio-line-names:
  88. * - If a pin goes to herobrine board and is named it gets that name.
  89. * - If a pin goes to herobrine board and is not named, it gets no name.
  90. * - If a pin is totally internal to Qcard then it gets Qcard name.
  91. * - If a pin is not hooked up on Qcard, it gets no name.
  92. */
  93. &pm8350c_gpios {
  94. gpio-line-names = "FLASH_STROBE_1", /* 1 */
  95. "AP_SUSPEND",
  96. "PM8008_1_RST_N",
  97. "",
  98. "",
  99. "",
  100. "PMIC_EDP_BL_EN",
  101. "PMIC_EDP_BL_PWM",
  102. "";
  103. };
  104. &tlmm {
  105. gpio-line-names = "AP_TP_I2C_SDA", /* 0 */
  106. "AP_TP_I2C_SCL",
  107. "SSD_RST_L",
  108. "PE_WAKE_ODL",
  109. "AP_SAR_SDA",
  110. "AP_SAR_SCL",
  111. "PRB_SC_GPIO_6",
  112. "TP_INT_ODL",
  113. "HP_I2C_SDA",
  114. "HP_I2C_SCL",
  115. "GNSS_L1_EN", /* 10 */
  116. "GNSS_L5_EN",
  117. "SPI_AP_MOSI",
  118. "SPI_AP_MISO",
  119. "SPI_AP_CLK",
  120. "SPI_AP_CS0_L",
  121. /*
  122. * AP_FLASH_WP is crossystem ABI. Schematics
  123. * call it BIOS_FLASH_WP_OD.
  124. */
  125. "AP_FLASH_WP",
  126. "",
  127. "AP_EC_INT_L",
  128. "",
  129. "UF_CAM_RST_L", /* 20 */
  130. "WF_CAM_RST_L",
  131. "UART_AP_TX_DBG_RX",
  132. "UART_DBG_TX_AP_RX",
  133. "",
  134. "PM8008_IRQ_1",
  135. "HOST2WLAN_SOL",
  136. "WLAN2HOST_SOL",
  137. "MOS_BT_UART_CTS",
  138. "MOS_BT_UART_RFR",
  139. "MOS_BT_UART_TX", /* 30 */
  140. "MOS_BT_UART_RX",
  141. "PRB_SC_GPIO_32",
  142. "HUB_RST_L",
  143. "",
  144. "",
  145. "AP_SPI_FP_MISO",
  146. "AP_SPI_FP_MOSI",
  147. "AP_SPI_FP_CLK",
  148. "AP_SPI_FP_CS_L",
  149. "AP_EC_SPI_MISO", /* 40 */
  150. "AP_EC_SPI_MOSI",
  151. "AP_EC_SPI_CLK",
  152. "AP_EC_SPI_CS_L",
  153. "LCM_RST_L",
  154. "EARLY_EUD_N",
  155. "",
  156. "DP_HOT_PLUG_DET",
  157. "IO_BRD_MLB_ID0",
  158. "IO_BRD_MLB_ID1",
  159. "IO_BRD_MLB_ID2", /* 50 */
  160. "SSD_EN",
  161. "TS_I2C_SDA_CONN",
  162. "TS_I2C_CLK_CONN",
  163. "TS_RST_CONN",
  164. "TS_INT_CONN",
  165. "AP_I2C_TPM_SDA",
  166. "AP_I2C_TPM_SCL",
  167. "PRB_SC_GPIO_58",
  168. "PRB_SC_GPIO_59",
  169. "EDP_HOT_PLUG_DET_N", /* 60 */
  170. "FP_TO_AP_IRQ_L",
  171. "",
  172. "AMP_EN",
  173. "CAM0_MCLK_GPIO_64",
  174. "CAM1_MCLK_GPIO_65",
  175. "WF_CAM_MCLK",
  176. "PRB_SC_GPIO_67",
  177. "FPMCU_BOOT0",
  178. "UF_CAM_SDA",
  179. "UF_CAM_SCL", /* 70 */
  180. "",
  181. "",
  182. "WF_CAM_SDA",
  183. "WF_CAM_SCL",
  184. "",
  185. "",
  186. "EN_FP_RAILS",
  187. "FP_RST_L",
  188. "PCIE1_CLKREQ_ODL",
  189. "EN_PP3300_DX_EDP", /* 80 */
  190. "SC_GPIO_81",
  191. "FORCED_USB_BOOT",
  192. "WCD_RESET_N",
  193. "MOS_WLAN_EN",
  194. "MOS_BT_EN",
  195. "MOS_SW_CTRL",
  196. "MOS_PCIE0_RST",
  197. "MOS_PCIE0_CLKREQ_N",
  198. "MOS_PCIE0_WAKE_N",
  199. "MOS_LAA_AS_EN", /* 90 */
  200. "SD_CD_ODL",
  201. "",
  202. "",
  203. "MOS_BT_WLAN_SLIMBUS_CLK",
  204. "MOS_BT_WLAN_SLIMBUS_DAT0",
  205. "HP_MCLK",
  206. "HP_BCLK",
  207. "HP_DOUT",
  208. "HP_DIN",
  209. "HP_LRCLK", /* 100 */
  210. "HP_IRQ",
  211. "",
  212. "",
  213. "GSC_AP_INT_ODL",
  214. "EN_PP3300_CODEC",
  215. "AMP_BCLK",
  216. "AMP_DIN",
  217. "AMP_LRCLK",
  218. "UIM1_DATA_GPIO_109",
  219. "UIM1_CLK_GPIO_110", /* 110 */
  220. "UIM1_RESET_GPIO_111",
  221. "PRB_SC_GPIO_112",
  222. "UIM0_DATA",
  223. "UIM0_CLK",
  224. "UIM0_RST",
  225. "UIM0_PRESENT_ODL",
  226. "SDM_RFFE0_CLK",
  227. "SDM_RFFE0_DATA",
  228. "WF_CAM_EN",
  229. "FASTBOOT_SEL_0", /* 120 */
  230. "SC_GPIO_121",
  231. "FASTBOOT_SEL_1",
  232. "SC_GPIO_123",
  233. "FASTBOOT_SEL_2",
  234. "SM_RFFE4_CLK_GRFC_8",
  235. "SM_RFFE4_DATA_GRFC_9",
  236. "WLAN_COEX_UART1_RX",
  237. "WLAN_COEX_UART1_TX",
  238. "PRB_SC_GPIO_129",
  239. "LCM_ID0", /* 130 */
  240. "LCM_ID1",
  241. "",
  242. "SDR_QLINK_REQ",
  243. "SDR_QLINK_EN",
  244. "QLINK0_WMSS_RESET_N",
  245. "SMR526_QLINK1_REQ",
  246. "SMR526_QLINK1_EN",
  247. "SMR526_QLINK1_WMSS_RESET_N",
  248. "PRB_SC_GPIO_139",
  249. "SAR1_IRQ_ODL", /* 140 */
  250. "SAR0_IRQ_ODL",
  251. "PRB_SC_GPIO_142",
  252. "",
  253. "WCD_SWR_TX_CLK",
  254. "WCD_SWR_TX_DATA0",
  255. "WCD_SWR_TX_DATA1",
  256. "WCD_SWR_RX_CLK",
  257. "WCD_SWR_RX_DATA0",
  258. "WCD_SWR_RX_DATA1",
  259. "DMIC01_CLK", /* 150 */
  260. "DMIC01_DATA",
  261. "DMIC23_CLK",
  262. "DMIC23_DATA",
  263. "",
  264. "",
  265. "EC_IN_RW_ODL",
  266. "HUB_EN",
  267. "WCD_SWR_TX_DATA2",
  268. "",
  269. "", /* 160 */
  270. "",
  271. "",
  272. "",
  273. "",
  274. "",
  275. "",
  276. "",
  277. "",
  278. "",
  279. "", /* 170 */
  280. "MOS_BLE_UART_TX",
  281. "MOS_BLE_UART_RX",
  282. "",
  283. "",
  284. "";
  285. };