sc7280-crd-r3.dts 2.8 KB

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  1. // SPDX-License-Identifier: BSD-3-Clause
  2. /*
  3. * sc7280 CRD board device tree source
  4. *
  5. * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
  6. */
  7. /dts-v1/;
  8. #include "sc7280-idp.dtsi"
  9. #include "sc7280-idp-ec-h1.dtsi"
  10. / {
  11. model = "Qualcomm Technologies, Inc. sc7280 CRD platform (rev3 - 4)";
  12. compatible = "qcom,sc7280-crd",
  13. "google,hoglin-rev3", "google,hoglin-rev4",
  14. "google,piglin-rev3", "google,piglin-rev4",
  15. "qcom,sc7280";
  16. aliases {
  17. serial0 = &uart5;
  18. };
  19. chosen {
  20. stdout-path = "serial0:115200n8";
  21. };
  22. };
  23. &apps_rsc {
  24. pmg1110-regulators {
  25. compatible = "qcom,pmg1110-rpmh-regulators";
  26. qcom,pmic-id = "k";
  27. vreg_s1k_1p0: smps1 {
  28. regulator-min-microvolt = <1010000>;
  29. regulator-max-microvolt = <1170000>;
  30. };
  31. };
  32. };
  33. ap_tp_i2c: &i2c0 {
  34. status = "okay";
  35. clock-frequency = <400000>;
  36. trackpad: trackpad@15 {
  37. compatible = "hid-over-i2c";
  38. reg = <0x15>;
  39. pinctrl-names = "default";
  40. pinctrl-0 = <&tp_int_odl>;
  41. interrupt-parent = <&tlmm>;
  42. interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
  43. post-power-on-delay-ms = <20>;
  44. hid-descr-addr = <0x0001>;
  45. vdd-supply = <&vreg_l18b_1p8>;
  46. wakeup-source;
  47. };
  48. };
  49. ap_ts_pen_1v8: &i2c13 {
  50. status = "okay";
  51. clock-frequency = <400000>;
  52. ap_ts: touchscreen@5c {
  53. compatible = "hid-over-i2c";
  54. reg = <0x5c>;
  55. pinctrl-names = "default";
  56. pinctrl-0 = <&ts_int_l>, <&ts_reset_l>;
  57. interrupt-parent = <&tlmm>;
  58. interrupts = <55 IRQ_TYPE_LEVEL_LOW>;
  59. post-power-on-delay-ms = <500>;
  60. hid-descr-addr = <0x0000>;
  61. vdd-supply = <&vreg_l19b_1p8>;
  62. };
  63. };
  64. &nvme_3v3_regulator {
  65. gpio = <&tlmm 51 GPIO_ACTIVE_HIGH>;
  66. };
  67. &nvme_pwren {
  68. pins = "gpio51";
  69. };
  70. &sound {
  71. audio-routing =
  72. "IN1_HPHL", "HPHL_OUT",
  73. "IN2_HPHR", "HPHR_OUT",
  74. "AMIC1", "MIC BIAS1",
  75. "AMIC2", "MIC BIAS2",
  76. "VA DMIC0", "MIC BIAS1",
  77. "VA DMIC1", "MIC BIAS1",
  78. "VA DMIC2", "MIC BIAS3",
  79. "VA DMIC3", "MIC BIAS3",
  80. "TX SWR_ADC0", "ADC1_OUTPUT",
  81. "TX SWR_ADC1", "ADC2_OUTPUT",
  82. "TX SWR_ADC2", "ADC3_OUTPUT",
  83. "TX SWR_DMIC0", "DMIC1_OUTPUT",
  84. "TX SWR_DMIC1", "DMIC2_OUTPUT",
  85. "TX SWR_DMIC2", "DMIC3_OUTPUT",
  86. "TX SWR_DMIC3", "DMIC4_OUTPUT",
  87. "TX SWR_DMIC4", "DMIC5_OUTPUT",
  88. "TX SWR_DMIC5", "DMIC6_OUTPUT",
  89. "TX SWR_DMIC6", "DMIC7_OUTPUT",
  90. "TX SWR_DMIC7", "DMIC8_OUTPUT";
  91. };
  92. &wcd9385 {
  93. pinctrl-names = "default", "sleep";
  94. pinctrl-0 = <&wcd_reset_n>, <&us_euro_hs_sel>;
  95. pinctrl-1 = <&wcd_reset_n_sleep>, <&us_euro_hs_sel>;
  96. us-euro-gpios = <&tlmm 81 GPIO_ACTIVE_HIGH>;
  97. };
  98. &tlmm {
  99. tp_int_odl: tp-int-odl {
  100. pins = "gpio7";
  101. function = "gpio";
  102. bias-disable;
  103. };
  104. ts_int_l: ts-int-l {
  105. pins = "gpio55";
  106. function = "gpio";
  107. bias-pull-up;
  108. };
  109. ts_reset_l: ts-reset-l {
  110. pins = "gpio54";
  111. function = "gpio";
  112. bias-disable;
  113. };
  114. us_euro_hs_sel: us-euro-hs-sel {
  115. pins = "gpio81";
  116. function = "gpio";
  117. bias-pull-down;
  118. drive-strength = <2>;
  119. };
  120. };