msm8998-oneplus-common.dtsi 12 KB

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  1. // SPDX-License-Identifier: BSD-3-Clause
  2. /*
  3. * OnePlus 5(T) (cheeseburger / dumpling) common device tree source based on msm8998-mtp.dtsi
  4. *
  5. * Copyright (c) 2021, Jami Kettunen <[email protected]>
  6. * Copyright (c) 2016, The Linux Foundation. All rights reserved.
  7. */
  8. /dts-v1/;
  9. #include <dt-bindings/gpio/gpio.h>
  10. #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
  11. #include "msm8998.dtsi"
  12. #include "pm8005.dtsi"
  13. #include "pm8998.dtsi"
  14. #include "pmi8998.dtsi"
  15. / {
  16. /* Required for bootloader to select correct board */
  17. qcom,msm-id = <292 0x20001>; /* 8998 v2.1 */
  18. chosen {
  19. #address-cells = <2>;
  20. #size-cells = <2>;
  21. ranges;
  22. /* Use display framebuffer setup by the UEFI XBL bootloader for simplefb */
  23. framebuffer0: framebuffer@9d400000 {
  24. compatible = "simple-framebuffer";
  25. reg = <0x0 0x9d400000 0x0 0x2400000>;
  26. width = <1080>;
  27. height = <1920>;
  28. stride = <(1080 * 4)>;
  29. format = "a8r8g8b8";
  30. /*
  31. * That's a lot of clocks, but it's necessary due
  32. * to unused clk cleanup & no panel driver yet..
  33. */
  34. clocks = <&mmcc MDSS_AHB_CLK>,
  35. <&mmcc MDSS_AXI_CLK>,
  36. <&mmcc MDSS_VSYNC_CLK>,
  37. <&mmcc MDSS_MDP_CLK>,
  38. <&mmcc MDSS_BYTE0_CLK>,
  39. <&mmcc MDSS_BYTE0_INTF_CLK>,
  40. <&mmcc MDSS_PCLK0_CLK>,
  41. <&mmcc MDSS_ESC0_CLK>;
  42. power-domains = <&mmcc MDSS_GDSC>;
  43. };
  44. };
  45. reserved-memory {
  46. /* Bootloader display framebuffer region */
  47. cont_splash_mem: memory@9d400000 {
  48. reg = <0x0 0x9d400000 0x0 0x2400000>;
  49. no-map;
  50. };
  51. /* For getting crash logs using Android downstream kernels */
  52. ramoops@ac000000 {
  53. compatible = "ramoops";
  54. reg = <0x0 0xac000000 0x0 0x200000>;
  55. console-size = <0x80000>;
  56. pmsg-size = <0x40000>;
  57. record-size = <0x8000>;
  58. ftrace-size = <0x20000>;
  59. };
  60. /*
  61. * The following memory regions on downstream are "dynamically allocated"
  62. * but given the same addresses every time. Hard code them as these addresses
  63. * are where the OnePlus signed firmware expects them to be.
  64. */
  65. ipa_fws_region: ipa@f6800000 {
  66. compatible = "shared-dma-pool";
  67. reg = <0x0 0xf6800000 0x0 0x5000>;
  68. no-map;
  69. };
  70. zap_shader_region: gpu@f6900000 {
  71. compatible = "shared-dma-pool";
  72. reg = <0x0 0xf6900000 0x0 0x2000>;
  73. no-map;
  74. };
  75. };
  76. gpio-keys {
  77. compatible = "gpio-keys";
  78. label = "Volume buttons";
  79. autorepeat;
  80. pinctrl-names = "default";
  81. pinctrl-0 = <&vol_keys_default>;
  82. button-vol-down {
  83. label = "Volume down";
  84. gpios = <&pm8998_gpio 5 GPIO_ACTIVE_LOW>;
  85. linux,code = <KEY_VOLUMEDOWN>;
  86. debounce-interval = <15>;
  87. wakeup-source;
  88. };
  89. button-vol-up {
  90. label = "Volume up";
  91. gpios = <&pm8998_gpio 6 GPIO_ACTIVE_LOW>;
  92. linux,code = <KEY_VOLUMEUP>;
  93. debounce-interval = <15>;
  94. wakeup-source;
  95. };
  96. };
  97. gpio-hall-sensor {
  98. compatible = "gpio-keys";
  99. label = "Hall effect sensor";
  100. pinctrl-names = "default";
  101. pinctrl-0 = <&hall_sensor_default>;
  102. event-hall-sensor {
  103. label = "Hall Effect Sensor";
  104. gpios = <&tlmm 124 GPIO_ACTIVE_LOW>;
  105. linux,input-type = <EV_SW>;
  106. linux,code = <SW_LID>;
  107. linux,can-disable;
  108. wakeup-source;
  109. };
  110. };
  111. vph_pwr: vph-pwr-regulator {
  112. compatible = "regulator-fixed";
  113. regulator-name = "vph_pwr";
  114. regulator-always-on;
  115. regulator-boot-on;
  116. };
  117. };
  118. /*
  119. * OnePlus' ADSP firmware requires 30 MiB in total, so increase the adsp_mem
  120. * region by 4 MiB to account for this while relocating the other now
  121. * conflicting memory nodes accordingly.
  122. */
  123. &adsp_mem {
  124. reg = <0x0 0x8b200000 0x0 0x1e00000>;
  125. };
  126. &mpss_mem {
  127. reg = <0x0 0x8d000000 0x0 0x7000000>;
  128. };
  129. &venus_mem {
  130. reg = <0x0 0x94000000 0x0 0x500000>;
  131. };
  132. &mba_mem {
  133. reg = <0x0 0x94500000 0x0 0x200000>;
  134. };
  135. &slpi_mem {
  136. reg = <0x0 0x94700000 0x0 0xf00000>;
  137. };
  138. &ipa_fw_mem {
  139. reg = <0x0 0x95600000 0x0 0x10000>;
  140. };
  141. &ipa_gsi_mem {
  142. reg = <0x0 0x95610000 0x0 0x5000>;
  143. };
  144. &gpu_mem {
  145. reg = <0x0 0x95615000 0x0 0x100000>;
  146. };
  147. &wlan_msa_mem {
  148. reg = <0x0 0x95715000 0x0 0x100000>;
  149. };
  150. &blsp1_i2c5 {
  151. status = "okay";
  152. touchscreen@20 {
  153. compatible = "syna,rmi4-i2c";
  154. reg = <0x20>;
  155. #address-cells = <1>;
  156. #size-cells = <0>;
  157. interrupt-parent = <&tlmm>;
  158. interrupts = <125 IRQ_TYPE_EDGE_FALLING>;
  159. pinctrl-names = "default";
  160. pinctrl-0 = <&ts_int_active &ts_reset_active>;
  161. vdd-supply = <&vreg_l28_3p0>;
  162. vio-supply = <&vreg_l6a_1p8>;
  163. syna,reset-delay-ms = <20>;
  164. syna,startup-delay-ms = <20>;
  165. rmi4-f01@1 {
  166. reg = <0x01>;
  167. syna,nosleep-mode = <1>;
  168. };
  169. rmi4_f12: rmi4-f12@12 {
  170. reg = <0x12>;
  171. syna,rezero-wait-ms = <20>;
  172. syna,sensor-type = <1>;
  173. touchscreen-x-mm = <68>;
  174. touchscreen-y-mm = <122>;
  175. };
  176. };
  177. };
  178. &blsp1_i2c6 {
  179. status = "okay";
  180. nfc@28 {
  181. compatible = "nxp,nxp-nci-i2c";
  182. reg = <0x28>;
  183. interrupt-parent = <&tlmm>;
  184. interrupts = <92 IRQ_TYPE_LEVEL_HIGH>;
  185. enable-gpios = <&tlmm 116 GPIO_ACTIVE_HIGH>;
  186. pinctrl-names = "default";
  187. pinctrl-0 = <&nfc_int_active &nfc_enable_active>;
  188. };
  189. };
  190. &blsp1_uart3 {
  191. status = "okay";
  192. bluetooth {
  193. compatible = "qcom,wcn3990-bt";
  194. vddio-supply = <&vreg_s4a_1p8>;
  195. vddxo-supply = <&vreg_l7a_1p8>;
  196. vddrf-supply = <&vreg_l17a_1p3>;
  197. vddch0-supply = <&vreg_l25a_3p3>;
  198. max-speed = <3200000>;
  199. };
  200. };
  201. &blsp1_uart3_on {
  202. rx {
  203. /delete-property/ bias-disable;
  204. /*
  205. * Configure a pull-up on 46 (RX). This is needed to
  206. * avoid garbage data when the TX pin of the Bluetooth
  207. * module is in tri-state (module powered off or not
  208. * driving the signal yet).
  209. */
  210. bias-pull-up;
  211. };
  212. cts {
  213. /delete-property/ bias-disable;
  214. /*
  215. * Configure a pull-down on 47 (CTS) to match the pull
  216. * of the Bluetooth module.
  217. */
  218. bias-pull-down;
  219. };
  220. };
  221. &blsp2_uart1 {
  222. status = "okay";
  223. };
  224. &pm8005_regulators {
  225. /* VDD_GFX supply */
  226. pm8005_s1: s1 {
  227. regulator-min-microvolt = <524000>;
  228. regulator-max-microvolt = <1100000>;
  229. regulator-enable-ramp-delay = <500>;
  230. /* Hack until we rig up the gpu consumer */
  231. regulator-always-on;
  232. };
  233. };
  234. &pm8998_gpio {
  235. vol_keys_default: vol-keys-state {
  236. pins = "gpio5", "gpio6";
  237. function = "normal";
  238. bias-pull-up;
  239. input-enable;
  240. qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
  241. };
  242. };
  243. &qusb2phy {
  244. status = "okay";
  245. vdd-supply = <&vreg_l1a_0p875>;
  246. vdda-pll-supply = <&vreg_l12a_1p8>;
  247. vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
  248. };
  249. &rpm_requests {
  250. pm8998-regulators {
  251. compatible = "qcom,rpm-pm8998-regulators";
  252. vdd_s1-supply = <&vph_pwr>;
  253. vdd_s2-supply = <&vph_pwr>;
  254. vdd_s3-supply = <&vph_pwr>;
  255. vdd_s4-supply = <&vph_pwr>;
  256. vdd_s5-supply = <&vph_pwr>;
  257. vdd_s6-supply = <&vph_pwr>;
  258. vdd_s7-supply = <&vph_pwr>;
  259. vdd_s8-supply = <&vph_pwr>;
  260. vdd_s9-supply = <&vph_pwr>;
  261. vdd_s10-supply = <&vph_pwr>;
  262. vdd_s11-supply = <&vph_pwr>;
  263. vdd_s12-supply = <&vph_pwr>;
  264. vdd_s13-supply = <&vph_pwr>;
  265. vdd_l1_l27-supply = <&vreg_s7a_1p025>;
  266. vdd_l2_l8_l17-supply = <&vreg_s3a_1p35>;
  267. vdd_l3_l11-supply = <&vreg_s7a_1p025>;
  268. vdd_l4_l5-supply = <&vreg_s7a_1p025>;
  269. vdd_l6-supply = <&vreg_s5a_2p04>;
  270. vdd_l7_l12_l14_l15-supply = <&vreg_s5a_2p04>;
  271. vdd_l9-supply = <&vreg_bob>;
  272. vdd_l10_l23_l25-supply = <&vreg_bob>;
  273. vdd_l13_l19_l21-supply = <&vreg_bob>;
  274. vdd_l16_l28-supply = <&vreg_bob>;
  275. vdd_l18_l22-supply = <&vreg_bob>;
  276. vdd_l20_l24-supply = <&vreg_bob>;
  277. vdd_l26-supply = <&vreg_s3a_1p35>;
  278. vdd_lvs1_lvs2-supply = <&vreg_s4a_1p8>;
  279. vreg_s3a_1p35: s3 {
  280. regulator-min-microvolt = <1352000>;
  281. regulator-max-microvolt = <1352000>;
  282. };
  283. vreg_s4a_1p8: s4 {
  284. regulator-min-microvolt = <1800000>;
  285. regulator-max-microvolt = <1800000>;
  286. regulator-allow-set-load;
  287. };
  288. vreg_s5a_2p04: s5 {
  289. regulator-min-microvolt = <1904000>;
  290. regulator-max-microvolt = <2040000>;
  291. };
  292. vreg_s7a_1p025: s7 {
  293. regulator-min-microvolt = <900000>;
  294. regulator-max-microvolt = <1028000>;
  295. };
  296. vreg_l1a_0p875: l1 {
  297. regulator-min-microvolt = <880000>;
  298. regulator-max-microvolt = <880000>;
  299. };
  300. vreg_l2a_1p2: l2 {
  301. regulator-min-microvolt = <1200000>;
  302. regulator-max-microvolt = <1200000>;
  303. };
  304. vreg_l3a_1p0: l3 {
  305. regulator-min-microvolt = <1000000>;
  306. regulator-max-microvolt = <1000000>;
  307. };
  308. vreg_l5a_0p8: l5 {
  309. regulator-min-microvolt = <800000>;
  310. regulator-max-microvolt = <800000>;
  311. };
  312. vreg_l6a_1p8: l6 {
  313. regulator-min-microvolt = <1808000>;
  314. regulator-max-microvolt = <1808000>;
  315. };
  316. vreg_l7a_1p8: l7 {
  317. regulator-min-microvolt = <1800000>;
  318. regulator-max-microvolt = <1800000>;
  319. };
  320. vreg_l8a_1p2: l8 {
  321. regulator-min-microvolt = <1200000>;
  322. regulator-max-microvolt = <1200000>;
  323. };
  324. vreg_l9a_1p8: l9 {
  325. regulator-min-microvolt = <1808000>;
  326. regulator-max-microvolt = <2960000>;
  327. };
  328. vreg_l10a_1p8: l10 {
  329. regulator-min-microvolt = <1808000>;
  330. regulator-max-microvolt = <2960000>;
  331. };
  332. vreg_l11a_1p0: l11 {
  333. regulator-min-microvolt = <1000000>;
  334. regulator-max-microvolt = <1000000>;
  335. };
  336. vreg_l12a_1p8: l12 {
  337. regulator-min-microvolt = <1800000>;
  338. regulator-max-microvolt = <1800000>;
  339. };
  340. vreg_l13a_2p95: l13 {
  341. regulator-min-microvolt = <1808000>;
  342. regulator-max-microvolt = <2960000>;
  343. };
  344. vreg_l14a_1p88: l14 {
  345. regulator-min-microvolt = <1880000>;
  346. regulator-max-microvolt = <1880000>;
  347. };
  348. vreg_l15a_1p8: l15 {
  349. regulator-min-microvolt = <1800000>;
  350. regulator-max-microvolt = <1800000>;
  351. };
  352. vreg_l16a_2p7: l16 {
  353. regulator-min-microvolt = <2704000>;
  354. regulator-max-microvolt = <2704000>;
  355. };
  356. vreg_l17a_1p3: l17 {
  357. regulator-min-microvolt = <1304000>;
  358. regulator-max-microvolt = <1304000>;
  359. };
  360. vreg_l18a_2p7: l18 {
  361. regulator-min-microvolt = <2704000>;
  362. regulator-max-microvolt = <2704000>;
  363. };
  364. vreg_l19a_3p0: l19 {
  365. regulator-min-microvolt = <3008000>;
  366. regulator-max-microvolt = <3008000>;
  367. };
  368. vreg_l20a_2p95: l20 {
  369. regulator-min-microvolt = <2960000>;
  370. regulator-max-microvolt = <2960000>;
  371. regulator-allow-set-load;
  372. };
  373. vreg_l21a_2p95: l21 {
  374. regulator-min-microvolt = <2960000>;
  375. regulator-max-microvolt = <2960000>;
  376. regulator-system-load = <800000>;
  377. regulator-allow-set-load;
  378. };
  379. vreg_l22a_2p85: l22 {
  380. regulator-min-microvolt = <2864000>;
  381. regulator-max-microvolt = <2864000>;
  382. };
  383. vreg_l23a_3p3: l23 {
  384. regulator-min-microvolt = <3312000>;
  385. regulator-max-microvolt = <3312000>;
  386. };
  387. vreg_l24a_3p075: l24 {
  388. regulator-min-microvolt = <3088000>;
  389. regulator-max-microvolt = <3088000>;
  390. };
  391. vreg_l25a_3p3: l25 {
  392. regulator-min-microvolt = <3104000>;
  393. regulator-max-microvolt = <3312000>;
  394. };
  395. vreg_l26a_1p2: l26 {
  396. regulator-min-microvolt = <1200000>;
  397. regulator-max-microvolt = <1200000>;
  398. regulator-allow-set-load;
  399. };
  400. vreg_l28_3p0: l28 {
  401. regulator-min-microvolt = <3008000>;
  402. regulator-max-microvolt = <3008000>;
  403. };
  404. vreg_lvs1a_1p8: lvs1 { };
  405. vreg_lvs2a_1p8: lvs2 { };
  406. };
  407. pmi8998-regulators {
  408. compatible = "qcom,rpm-pmi8998-regulators";
  409. vdd_bob-supply = <&vph_pwr>;
  410. vreg_bob: bob {
  411. regulator-min-microvolt = <3312000>;
  412. regulator-max-microvolt = <3600000>;
  413. };
  414. };
  415. };
  416. &tlmm {
  417. gpio-reserved-ranges = <0 4>, <81 4>;
  418. hall_sensor_default: hall-sensor-default {
  419. pins = "gpio124";
  420. function = "gpio";
  421. drive-strength = <2>;
  422. bias-disable;
  423. input-enable;
  424. };
  425. ts_int_active: ts-int-active {
  426. pins = "gpio125";
  427. function = "gpio";
  428. drive-strength = <8>;
  429. bias-pull-up;
  430. };
  431. ts_reset_active: ts-reset-active {
  432. pins = "gpio89";
  433. function = "gpio";
  434. drive-strength = <8>;
  435. bias-pull-up;
  436. };
  437. nfc_int_active: nfc-int-active {
  438. pins = "gpio92";
  439. function = "gpio";
  440. drive-strength = <6>;
  441. bias-pull-up;
  442. };
  443. nfc_enable_active: nfc-enable-active {
  444. pins = "gpio12", "gpio116";
  445. function = "gpio";
  446. drive-strength = <6>;
  447. bias-pull-up;
  448. };
  449. };
  450. &ufshc {
  451. status = "okay";
  452. vcc-supply = <&vreg_l20a_2p95>;
  453. vccq-supply = <&vreg_l26a_1p2>;
  454. vccq2-supply = <&vreg_s4a_1p8>;
  455. vcc-max-microamp = <750000>;
  456. vccq-max-microamp = <560000>;
  457. vccq2-max-microamp = <750000>;
  458. };
  459. &ufsphy {
  460. status = "okay";
  461. vdda-phy-supply = <&vreg_l1a_0p875>;
  462. vdda-pll-supply = <&vreg_l2a_1p2>;
  463. vddp-ref-clk-supply = <&vreg_l26a_1p2>;
  464. };
  465. &usb3 {
  466. status = "okay";
  467. /* Disable USB3 clock requirement as the device only supports USB2 */
  468. qcom,select-utmi-as-pipe-clk;
  469. };
  470. &usb3_dwc3 {
  471. /* Drop the unused USB 3 PHY */
  472. phys = <&qusb2phy>;
  473. phy-names = "usb2-phy";
  474. /* Fastest mode for USB 2 */
  475. maximum-speed = "high-speed";
  476. /* Force to peripheral until we can switch modes */
  477. dr_mode = "peripheral";
  478. };
  479. &wifi {
  480. /* Leave disabled until MSS is functional */
  481. vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
  482. vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
  483. vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
  484. vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
  485. };