tegra186-p3310.dtsi 7.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. #include "tegra186.dtsi"
  3. #include <dt-bindings/mfd/max77620.h>
  4. / {
  5. model = "NVIDIA Jetson TX2";
  6. compatible = "nvidia,p3310", "nvidia,tegra186";
  7. aliases {
  8. ethernet0 = "/ethernet@2490000";
  9. i2c0 = "/bpmp/i2c";
  10. i2c1 = "/i2c@3160000";
  11. i2c2 = "/i2c@c240000";
  12. i2c3 = "/i2c@3180000";
  13. i2c4 = "/i2c@3190000";
  14. i2c5 = "/i2c@31c0000";
  15. i2c6 = "/i2c@c250000";
  16. i2c7 = "/i2c@31e0000";
  17. mmc0 = "/mmc@3460000";
  18. mmc1 = "/mmc@3400000";
  19. serial0 = &uarta;
  20. };
  21. chosen {
  22. bootargs = "earlycon console=ttyS0,115200n8 fw_devlink=on";
  23. stdout-path = "serial0:115200n8";
  24. };
  25. memory@80000000 {
  26. device_type = "memory";
  27. reg = <0x0 0x80000000 0x2 0x00000000>;
  28. };
  29. ethernet@2490000 {
  30. status = "okay";
  31. phy-reset-gpios = <&gpio TEGRA186_MAIN_GPIO(M, 4)
  32. GPIO_ACTIVE_LOW>;
  33. phy-handle = <&phy>;
  34. phy-mode = "rgmii";
  35. mdio {
  36. #address-cells = <1>;
  37. #size-cells = <0>;
  38. phy: ethernet-phy@0 {
  39. compatible = "ethernet-phy-ieee802.3-c22";
  40. reg = <0x0>;
  41. interrupt-parent = <&gpio>;
  42. interrupts = <TEGRA186_MAIN_GPIO(M, 5)
  43. IRQ_TYPE_LEVEL_LOW>;
  44. #phy-cells = <0>;
  45. };
  46. };
  47. };
  48. memory-controller@2c00000 {
  49. status = "okay";
  50. };
  51. serial@3100000 {
  52. status = "okay";
  53. };
  54. i2c@3160000 {
  55. status = "okay";
  56. power-monitor@40 {
  57. compatible = "ti,ina3221";
  58. reg = <0x40>;
  59. #address-cells = <1>;
  60. #size-cells = <0>;
  61. input@0 {
  62. reg = <0x0>;
  63. label = "VDD_SYS_GPU";
  64. shunt-resistor-micro-ohms = <10000>;
  65. };
  66. input@1 {
  67. reg = <0x1>;
  68. label = "VDD_SYS_SOC";
  69. shunt-resistor-micro-ohms = <10000>;
  70. };
  71. input@2 {
  72. reg = <0x2>;
  73. label = "VDD_3V8_WIFI";
  74. shunt-resistor-micro-ohms = <10000>;
  75. };
  76. };
  77. power-monitor@41 {
  78. compatible = "ti,ina3221";
  79. reg = <0x41>;
  80. #address-cells = <1>;
  81. #size-cells = <0>;
  82. input@0 {
  83. reg = <0x0>;
  84. label = "VDD_IN";
  85. shunt-resistor-micro-ohms = <5000>;
  86. };
  87. input@1 {
  88. reg = <0x1>;
  89. label = "VDD_SYS_CPU";
  90. shunt-resistor-micro-ohms = <10000>;
  91. };
  92. input@2 {
  93. reg = <0x2>;
  94. label = "VDD_5V0_DDR";
  95. shunt-resistor-micro-ohms = <10000>;
  96. };
  97. };
  98. };
  99. i2c@3180000 {
  100. status = "okay";
  101. };
  102. ddc: i2c@3190000 {
  103. status = "okay";
  104. };
  105. i2c@31c0000 {
  106. status = "okay";
  107. };
  108. i2c@31e0000 {
  109. status = "okay";
  110. };
  111. /* SDMMC1 (SD/MMC) */
  112. mmc@3400000 {
  113. cd-gpios = <&gpio TEGRA186_MAIN_GPIO(P, 5) GPIO_ACTIVE_LOW>;
  114. wp-gpios = <&gpio TEGRA186_MAIN_GPIO(P, 4) GPIO_ACTIVE_HIGH>;
  115. vqmmc-supply = <&vddio_sdmmc1>;
  116. };
  117. /* SDMMC3 (SDIO) */
  118. mmc@3440000 {
  119. status = "okay";
  120. };
  121. /* SDMMC4 (eMMC) */
  122. mmc@3460000 {
  123. status = "okay";
  124. bus-width = <8>;
  125. non-removable;
  126. vqmmc-supply = <&vdd_1v8_ap>;
  127. vmmc-supply = <&vdd_3v3_sys>;
  128. };
  129. hsp@3c00000 {
  130. status = "okay";
  131. };
  132. i2c@c240000 {
  133. status = "okay";
  134. };
  135. i2c@c250000 {
  136. status = "okay";
  137. /* module ID EEPROM */
  138. eeprom@50 {
  139. compatible = "atmel,24c02";
  140. reg = <0x50>;
  141. label = "module";
  142. vcc-supply = <&vdd_1v8>;
  143. address-width = <8>;
  144. pagesize = <8>;
  145. size = <256>;
  146. read-only;
  147. };
  148. };
  149. rtc@c2a0000 {
  150. status = "okay";
  151. };
  152. pmc@c360000 {
  153. nvidia,invert-interrupt;
  154. };
  155. cpus {
  156. cpu@0 {
  157. enable-method = "psci";
  158. };
  159. cpu@1 {
  160. enable-method = "psci";
  161. };
  162. cpu@2 {
  163. enable-method = "psci";
  164. };
  165. cpu@3 {
  166. enable-method = "psci";
  167. };
  168. cpu@4 {
  169. enable-method = "psci";
  170. };
  171. cpu@5 {
  172. enable-method = "psci";
  173. };
  174. };
  175. bpmp {
  176. i2c {
  177. status = "okay";
  178. pmic: pmic@3c {
  179. compatible = "maxim,max77620";
  180. reg = <0x3c>;
  181. interrupt-parent = <&pmc>;
  182. interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
  183. #interrupt-cells = <2>;
  184. interrupt-controller;
  185. #gpio-cells = <2>;
  186. gpio-controller;
  187. pinctrl-names = "default";
  188. pinctrl-0 = <&max77620_default>;
  189. max77620_default: pinmux {
  190. gpio0 {
  191. pins = "gpio0";
  192. function = "gpio";
  193. };
  194. gpio1 {
  195. pins = "gpio1";
  196. function = "fps-out";
  197. maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
  198. };
  199. gpio2 {
  200. pins = "gpio2";
  201. function = "fps-out";
  202. maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
  203. };
  204. gpio3 {
  205. pins = "gpio3";
  206. function = "fps-out";
  207. maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
  208. };
  209. gpio4 {
  210. pins = "gpio4";
  211. function = "32k-out1";
  212. drive-push-pull = <1>;
  213. };
  214. gpio5 {
  215. pins = "gpio5";
  216. function = "gpio";
  217. drive-push-pull = <0>;
  218. };
  219. gpio6 {
  220. pins = "gpio6";
  221. function = "gpio";
  222. drive-push-pull = <1>;
  223. };
  224. gpio7 {
  225. pins = "gpio7";
  226. function = "gpio";
  227. drive-push-pull = <0>;
  228. };
  229. };
  230. fps {
  231. fps0 {
  232. maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
  233. maxim,shutdown-fps-time-period-us = <640>;
  234. };
  235. fps1 {
  236. maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>;
  237. maxim,shutdown-fps-time-period-us = <640>;
  238. };
  239. fps2 {
  240. maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
  241. maxim,shutdown-fps-time-period-us = <640>;
  242. };
  243. };
  244. regulators {
  245. in-sd0-supply = <&vdd_5v0_sys>;
  246. in-sd1-supply = <&vdd_5v0_sys>;
  247. in-sd2-supply = <&vdd_5v0_sys>;
  248. in-sd3-supply = <&vdd_5v0_sys>;
  249. in-ldo0-1-supply = <&vdd_5v0_sys>;
  250. in-ldo2-supply = <&vdd_5v0_sys>;
  251. in-ldo3-5-supply = <&vdd_5v0_sys>;
  252. in-ldo4-6-supply = <&vdd_1v8>;
  253. in-ldo7-8-supply = <&avdd_dsi_csi>;
  254. sd0 {
  255. regulator-name = "VDD_DDR_1V1_PMIC";
  256. regulator-min-microvolt = <1100000>;
  257. regulator-max-microvolt = <1100000>;
  258. regulator-always-on;
  259. regulator-boot-on;
  260. };
  261. avdd_dsi_csi: sd1 {
  262. regulator-name = "AVDD_DSI_CSI_1V2";
  263. regulator-min-microvolt = <1200000>;
  264. regulator-max-microvolt = <1200000>;
  265. };
  266. vdd_1v8: sd2 {
  267. regulator-name = "VDD_1V8";
  268. regulator-min-microvolt = <1800000>;
  269. regulator-max-microvolt = <1800000>;
  270. };
  271. vdd_3v3_sys: sd3 {
  272. regulator-name = "VDD_3V3_SYS";
  273. regulator-min-microvolt = <3300000>;
  274. regulator-max-microvolt = <3300000>;
  275. };
  276. vdd_1v8_pll: ldo0 {
  277. regulator-name = "VDD_1V8_AP_PLL";
  278. regulator-min-microvolt = <1800000>;
  279. regulator-max-microvolt = <1800000>;
  280. };
  281. ldo2 {
  282. regulator-name = "VDDIO_3V3_AOHV";
  283. regulator-min-microvolt = <3300000>;
  284. regulator-max-microvolt = <3300000>;
  285. regulator-always-on;
  286. regulator-boot-on;
  287. };
  288. vddio_sdmmc1: ldo3 {
  289. regulator-name = "VDDIO_SDMMC1_AP";
  290. regulator-min-microvolt = <1800000>;
  291. regulator-max-microvolt = <3300000>;
  292. };
  293. ldo4 {
  294. regulator-name = "VDD_RTC";
  295. regulator-min-microvolt = <1000000>;
  296. regulator-max-microvolt = <1000000>;
  297. };
  298. vddio_sdmmc3: ldo5 {
  299. regulator-name = "VDDIO_SDMMC3_AP";
  300. regulator-min-microvolt = <2800000>;
  301. regulator-max-microvolt = <2800000>;
  302. };
  303. vdd_hdmi_1v05: ldo7 {
  304. regulator-name = "VDD_HDMI_1V05";
  305. regulator-min-microvolt = <1050000>;
  306. regulator-max-microvolt = <1050000>;
  307. };
  308. vdd_pex: ldo8 {
  309. regulator-name = "VDD_PEX_1V05";
  310. regulator-min-microvolt = <1050000>;
  311. regulator-max-microvolt = <1050000>;
  312. };
  313. };
  314. };
  315. };
  316. };
  317. psci {
  318. compatible = "arm,psci-1.0";
  319. status = "okay";
  320. method = "smc";
  321. };
  322. gnd: regulator-gnd {
  323. compatible = "regulator-fixed";
  324. regulator-name = "GND";
  325. regulator-min-microvolt = <0>;
  326. regulator-max-microvolt = <0>;
  327. regulator-always-on;
  328. regulator-boot-on;
  329. };
  330. vdd_5v0_sys: regulator-vdd-5v0-sys {
  331. compatible = "regulator-fixed";
  332. regulator-name = "VDD_5V0_SYS";
  333. regulator-min-microvolt = <5000000>;
  334. regulator-max-microvolt = <5000000>;
  335. regulator-always-on;
  336. regulator-boot-on;
  337. };
  338. vdd_1v8_ap: regulator-vdd-1v8-ap {
  339. compatible = "regulator-fixed";
  340. regulator-name = "VDD_1V8_AP";
  341. regulator-min-microvolt = <1800000>;
  342. regulator-max-microvolt = <1800000>;
  343. gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
  344. enable-active-high;
  345. vin-supply = <&vdd_1v8>;
  346. };
  347. };