mt8173-elm.dtsi 26 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright 2016 MediaTek Inc.
  4. */
  5. #include <dt-bindings/input/input.h>
  6. #include <dt-bindings/input/linux-event-codes.h>
  7. #include <dt-bindings/regulator/dlg,da9211-regulator.h>
  8. #include <dt-bindings/gpio/gpio.h>
  9. #include "mt8173.dtsi"
  10. / {
  11. aliases {
  12. mmc0 = &mmc0;
  13. mmc1 = &mmc1;
  14. mmc2 = &mmc3;
  15. };
  16. memory@40000000 {
  17. device_type = "memory";
  18. reg = <0 0x40000000 0 0x80000000>;
  19. };
  20. backlight: backlight {
  21. compatible = "pwm-backlight";
  22. pwms = <&pwm0 0 1000000>;
  23. power-supply = <&bl_fixed_reg>;
  24. enable-gpios = <&pio 95 GPIO_ACTIVE_HIGH>;
  25. pinctrl-names = "default";
  26. pinctrl-0 = <&panel_backlight_en_pins>;
  27. status = "okay";
  28. };
  29. bl_fixed_reg: fixedregulator2 {
  30. compatible = "regulator-fixed";
  31. regulator-name = "bl_fixed";
  32. regulator-min-microvolt = <1800000>;
  33. regulator-max-microvolt = <1800000>;
  34. startup-delay-us = <1000>;
  35. enable-active-high;
  36. gpio = <&pio 32 GPIO_ACTIVE_HIGH>;
  37. pinctrl-names = "default";
  38. pinctrl-0 = <&bl_fixed_pins>;
  39. };
  40. chosen {
  41. stdout-path = "serial0:115200n8";
  42. };
  43. gpio_keys: gpio-keys {
  44. compatible = "gpio-keys";
  45. pinctrl-names = "default";
  46. pinctrl-0 = <&gpio_keys_pins>;
  47. switch-lid {
  48. label = "Lid";
  49. gpios = <&pio 69 GPIO_ACTIVE_LOW>;
  50. linux,code = <SW_LID>;
  51. linux,input-type = <EV_SW>;
  52. gpio-key,wakeup;
  53. };
  54. switch-power {
  55. label = "Power";
  56. gpios = <&pio 14 GPIO_ACTIVE_HIGH>;
  57. linux,code = <KEY_POWER>;
  58. debounce-interval = <30>;
  59. gpio-key,wakeup;
  60. };
  61. switch-tablet-mode {
  62. label = "Tablet_mode";
  63. gpios = <&pio 121 GPIO_ACTIVE_HIGH>;
  64. linux,code = <SW_TABLET_MODE>;
  65. linux,input-type = <EV_SW>;
  66. gpio-key,wakeup;
  67. };
  68. switch-volume-down {
  69. label = "Volume_down";
  70. gpios = <&pio 123 GPIO_ACTIVE_LOW>;
  71. linux,code = <KEY_VOLUMEDOWN>;
  72. };
  73. switch-volume-up {
  74. label = "Volume_up";
  75. gpios = <&pio 124 GPIO_ACTIVE_LOW>;
  76. linux,code = <KEY_VOLUMEUP>;
  77. };
  78. };
  79. panel: panel {
  80. compatible = "lg,lp120up1";
  81. power-supply = <&panel_fixed_3v3>;
  82. backlight = <&backlight>;
  83. port {
  84. panel_in: endpoint {
  85. remote-endpoint = <&ps8640_out>;
  86. };
  87. };
  88. };
  89. panel_fixed_3v3: regulator1 {
  90. compatible = "regulator-fixed";
  91. regulator-name = "PANEL_3V3";
  92. regulator-min-microvolt = <3300000>;
  93. regulator-max-microvolt = <3300000>;
  94. enable-active-high;
  95. gpio = <&pio 41 GPIO_ACTIVE_HIGH>;
  96. pinctrl-names = "default";
  97. pinctrl-0 = <&panel_fixed_pins>;
  98. };
  99. ps8640_fixed_1v2: regulator2 {
  100. compatible = "regulator-fixed";
  101. regulator-name = "PS8640_1V2";
  102. regulator-min-microvolt = <1200000>;
  103. regulator-max-microvolt = <1200000>;
  104. regulator-enable-ramp-delay = <2000>;
  105. enable-active-high;
  106. regulator-boot-on;
  107. gpio = <&pio 30 GPIO_ACTIVE_HIGH>;
  108. pinctrl-names = "default";
  109. pinctrl-0 = <&ps8640_fixed_pins>;
  110. };
  111. sdio_fixed_3v3: fixedregulator0 {
  112. compatible = "regulator-fixed";
  113. regulator-name = "3V3";
  114. regulator-min-microvolt = <3300000>;
  115. regulator-max-microvolt = <3300000>;
  116. gpio = <&pio 85 GPIO_ACTIVE_HIGH>;
  117. pinctrl-names = "default";
  118. pinctrl-0 = <&sdio_fixed_3v3_pins>;
  119. };
  120. sound: sound {
  121. compatible = "mediatek,mt8173-rt5650";
  122. mediatek,audio-codec = <&rt5650 &hdmi0>;
  123. mediatek,platform = <&afe>;
  124. pinctrl-names = "default";
  125. pinctrl-0 = <&aud_i2s2>;
  126. mediatek,mclk = <1>;
  127. codec-capture {
  128. sound-dai = <&rt5650 1>;
  129. };
  130. };
  131. hdmicon: connector {
  132. compatible = "hdmi-connector";
  133. label = "hdmi";
  134. type = "a";
  135. ddc-i2c-bus = <&hdmiddc0>;
  136. port {
  137. hdmi_connector_in: endpoint {
  138. remote-endpoint = <&hdmi0_out>;
  139. };
  140. };
  141. };
  142. };
  143. &mfg_async {
  144. domain-supply = <&da9211_vgpu_reg>;
  145. };
  146. &cec {
  147. status = "okay";
  148. };
  149. &cpu0 {
  150. proc-supply = <&mt6397_vpca15_reg>;
  151. };
  152. &cpu1 {
  153. proc-supply = <&mt6397_vpca15_reg>;
  154. };
  155. &cpu2 {
  156. proc-supply = <&da9211_vcpu_reg>;
  157. sram-supply = <&mt6397_vsramca7_reg>;
  158. };
  159. &cpu3 {
  160. proc-supply = <&da9211_vcpu_reg>;
  161. sram-supply = <&mt6397_vsramca7_reg>;
  162. };
  163. &cpu_thermal {
  164. sustainable-power = <4500>; /* milliwatts */
  165. trips {
  166. threshold: trip-point0 {
  167. temperature = <60000>;
  168. };
  169. target: trip-point1 {
  170. temperature = <65000>;
  171. };
  172. };
  173. };
  174. &dsi0 {
  175. status = "okay";
  176. ports {
  177. port {
  178. dsi0_out: endpoint {
  179. remote-endpoint = <&ps8640_in>;
  180. };
  181. };
  182. };
  183. };
  184. &dpi0 {
  185. status = "okay";
  186. };
  187. &hdmi0 {
  188. status = "okay";
  189. ports {
  190. port@1 {
  191. reg = <1>;
  192. hdmi0_out: endpoint {
  193. remote-endpoint = <&hdmi_connector_in>;
  194. };
  195. };
  196. };
  197. };
  198. &hdmi_phy {
  199. status = "okay";
  200. mediatek,ibias = <0xc>;
  201. };
  202. &i2c0 {
  203. status = "okay";
  204. rt5650: audio-codec@1a {
  205. compatible = "realtek,rt5650";
  206. reg = <0x1a>;
  207. avdd-supply = <&mt6397_vgp1_reg>;
  208. cpvdd-supply = <&mt6397_vcama_reg>;
  209. interrupt-parent = <&pio>;
  210. interrupts = <3 IRQ_TYPE_EDGE_BOTH>;
  211. pinctrl-names = "default";
  212. pinctrl-0 = <&rt5650_irq>;
  213. #sound-dai-cells = <1>;
  214. realtek,dmic1-data-pin = <2>;
  215. realtek,jd-mode = <2>;
  216. };
  217. ps8640: edp-bridge@8 {
  218. compatible = "parade,ps8640";
  219. reg = <0x8>;
  220. powerdown-gpios = <&pio 127 GPIO_ACTIVE_LOW>;
  221. reset-gpios = <&pio 115 GPIO_ACTIVE_LOW>;
  222. pinctrl-names = "default";
  223. pinctrl-0 = <&ps8640_pins>;
  224. vdd12-supply = <&ps8640_fixed_1v2>;
  225. vdd33-supply = <&mt6397_vgp2_reg>;
  226. ports {
  227. #address-cells = <1>;
  228. #size-cells = <0>;
  229. port@0 {
  230. reg = <0>;
  231. ps8640_in: endpoint {
  232. remote-endpoint = <&dsi0_out>;
  233. };
  234. };
  235. port@1 {
  236. reg = <1>;
  237. ps8640_out: endpoint {
  238. remote-endpoint = <&panel_in>;
  239. };
  240. };
  241. };
  242. };
  243. };
  244. &i2c1 {
  245. clock-frequency = <1500000>;
  246. status = "okay";
  247. da9211: da9211@68 {
  248. compatible = "dlg,da9211";
  249. reg = <0x68>;
  250. interrupt-parent = <&pio>;
  251. interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
  252. regulators {
  253. da9211_vcpu_reg: BUCKA {
  254. regulator-name = "VBUCKA";
  255. regulator-min-microvolt = < 700000>;
  256. regulator-max-microvolt = <1310000>;
  257. regulator-min-microamp = <2000000>;
  258. regulator-max-microamp = <4400000>;
  259. regulator-ramp-delay = <10000>;
  260. regulator-always-on;
  261. regulator-allowed-modes = <DA9211_BUCK_MODE_SYNC
  262. DA9211_BUCK_MODE_AUTO>;
  263. };
  264. da9211_vgpu_reg: BUCKB {
  265. regulator-name = "VBUCKB";
  266. regulator-min-microvolt = < 700000>;
  267. regulator-max-microvolt = <1310000>;
  268. regulator-min-microamp = <2000000>;
  269. regulator-max-microamp = <3000000>;
  270. regulator-ramp-delay = <10000>;
  271. };
  272. };
  273. };
  274. };
  275. &i2c2 {
  276. status = "okay";
  277. tpm: tpm@20 {
  278. compatible = "infineon,slb9645tt";
  279. reg = <0x20>;
  280. powered-while-suspended;
  281. };
  282. };
  283. &i2c3 {
  284. clock-frequency = <400000>;
  285. status = "okay";
  286. touchscreen: touchscreen@10 {
  287. compatible = "elan,ekth3500";
  288. reg = <0x10>;
  289. interrupt-parent = <&pio>;
  290. interrupts = <88 IRQ_TYPE_LEVEL_LOW>;
  291. };
  292. };
  293. &i2c4 {
  294. clock-frequency = <400000>;
  295. status = "okay";
  296. pinctrl-names = "default";
  297. pinctrl-0 = <&trackpad_irq>;
  298. trackpad: trackpad@15 {
  299. compatible = "elan,ekth3000";
  300. interrupt-parent = <&pio>;
  301. interrupts = <117 IRQ_TYPE_LEVEL_LOW>;
  302. reg = <0x15>;
  303. vcc-supply = <&mt6397_vgp6_reg>;
  304. wakeup-source;
  305. };
  306. };
  307. &mipi_tx0 {
  308. status = "okay";
  309. };
  310. &mmc0 {
  311. status = "okay";
  312. pinctrl-names = "default", "state_uhs";
  313. pinctrl-0 = <&mmc0_pins_default>;
  314. pinctrl-1 = <&mmc0_pins_uhs>;
  315. bus-width = <8>;
  316. max-frequency = <200000000>;
  317. cap-mmc-highspeed;
  318. mmc-hs200-1_8v;
  319. mmc-hs400-1_8v;
  320. cap-mmc-hw-reset;
  321. hs400-ds-delay = <0x14015>;
  322. mediatek,hs200-cmd-int-delay = <30>;
  323. mediatek,hs400-cmd-int-delay = <14>;
  324. mediatek,hs400-cmd-resp-sel-rising;
  325. vmmc-supply = <&mt6397_vemc_3v3_reg>;
  326. vqmmc-supply = <&mt6397_vio18_reg>;
  327. assigned-clocks = <&topckgen CLK_TOP_MSDC50_0_SEL>;
  328. assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_D2>;
  329. non-removable;
  330. };
  331. &mmc1 {
  332. status = "okay";
  333. pinctrl-names = "default", "state_uhs";
  334. pinctrl-0 = <&mmc1_pins_default>;
  335. pinctrl-1 = <&mmc1_pins_uhs>;
  336. bus-width = <4>;
  337. max-frequency = <200000000>;
  338. cap-sd-highspeed;
  339. sd-uhs-sdr50;
  340. sd-uhs-sdr104;
  341. cd-gpios = <&pio 1 GPIO_ACTIVE_LOW>;
  342. vmmc-supply = <&mt6397_vmch_reg>;
  343. vqmmc-supply = <&mt6397_vmc_reg>;
  344. };
  345. &mmc3 {
  346. status = "okay";
  347. pinctrl-names = "default", "state_uhs";
  348. pinctrl-0 = <&mmc3_pins_default>;
  349. pinctrl-1 = <&mmc3_pins_uhs>;
  350. bus-width = <4>;
  351. max-frequency = <200000000>;
  352. cap-sd-highspeed;
  353. sd-uhs-sdr50;
  354. sd-uhs-sdr104;
  355. keep-power-in-suspend;
  356. wakeup-source;
  357. cap-sdio-irq;
  358. vmmc-supply = <&sdio_fixed_3v3>;
  359. vqmmc-supply = <&mt6397_vgp3_reg>;
  360. non-removable;
  361. cap-power-off-card;
  362. #address-cells = <1>;
  363. #size-cells = <0>;
  364. btmrvl: btmrvl@2 {
  365. compatible = "marvell,sd8897-bt";
  366. reg = <2>;
  367. interrupt-parent = <&pio>;
  368. interrupts = <119 IRQ_TYPE_LEVEL_LOW>;
  369. marvell,wakeup-pin = /bits/ 16 <0x0d>;
  370. marvell,wakeup-gap-ms = /bits/ 16 <0x64>;
  371. };
  372. mwifiex: mwifiex@1 {
  373. compatible = "marvell,sd8897";
  374. reg = <1>;
  375. interrupt-parent = <&pio>;
  376. interrupts = <38 IRQ_TYPE_LEVEL_LOW>;
  377. marvell,wakeup-pin = <3>;
  378. };
  379. };
  380. &nor_flash {
  381. status = "okay";
  382. pinctrl-names = "default";
  383. pinctrl-0 = <&nor_gpio1_pins>;
  384. flash@0 {
  385. compatible = "jedec,spi-nor";
  386. reg = <0>;
  387. spi-max-frequency = <50000000>;
  388. };
  389. };
  390. &pio {
  391. gpio-line-names = "EC_INT_1V8",
  392. "SD_CD_L",
  393. "ALC5514_IRQ",
  394. "ALC5650_IRQ",
  395. /*
  396. * AP_FLASH_WP_L is crossystem ABI. Schematics
  397. * call it SFWP_B.
  398. */
  399. "AP_FLASH_WP_L",
  400. "SFIN",
  401. "SFCS0",
  402. "SFHOLD",
  403. "SFOUT",
  404. "SFCK",
  405. "WRAP_EVENT_S_EINT10",
  406. "PMU_INT",
  407. "I2S2_WS_ALC5650",
  408. "I2S2_BCK_ALC5650",
  409. "PWR_BTN_1V8",
  410. "DA9212_IRQ",
  411. "IDDIG",
  412. "WATCHDOG",
  413. "CEC",
  414. "HDMISCK",
  415. "HDMISD",
  416. "HTPLG",
  417. "MSDC3_DAT0",
  418. "MSDC3_DAT1",
  419. "MSDC3_DAT2",
  420. "MSDC3_DAT3",
  421. "MSDC3_CLK",
  422. "MSDC3_CMD",
  423. "USB_C0_OC_FLAGB",
  424. "USBA_OC1_L",
  425. "PS8640_1V2_ENABLE",
  426. "THERM_ALERT_N",
  427. "PANEL_LCD_POWER_EN",
  428. "ANX7688_CHIP_PD_C",
  429. "EC_IN_RW_1V8",
  430. "ANX7688_1V_EN_C",
  431. "USB_DP_HPD_C",
  432. "TPM_DAVINT_N",
  433. "MARVELL8897_IRQ",
  434. "EN_USB_A0_PWR",
  435. "USBA_A0_OC_L",
  436. "EN_PP3300_DX_EDP",
  437. "",
  438. "SOC_I2C2_1V8_SDA_400K",
  439. "SOC_I2C2_1V8_SCL_400K",
  440. "SOC_I2C0_1V8_SDA_400K",
  441. "SOC_I2C0_1V8_SCL_400K",
  442. "EMMC_ID1",
  443. "EMMC_ID0",
  444. "MEM_CONFIG3",
  445. "EMMC_ID2",
  446. "MEM_CONFIG1",
  447. "MEM_CONFIG2",
  448. "BRD_ID2",
  449. "MEM_CONFIG0",
  450. "BRD_ID0",
  451. "BRD_ID1",
  452. "EMMC_DAT0",
  453. "EMMC_DAT1",
  454. "EMMC_DAT2",
  455. "EMMC_DAT3",
  456. "EMMC_DAT4",
  457. "EMMC_DAT5",
  458. "EMMC_DAT6",
  459. "EMMC_DAT7",
  460. "EMMC_CLK",
  461. "EMMC_CMD",
  462. "EMMC_RCLK",
  463. "PLT_RST_L",
  464. "LID_OPEN_1V8_L",
  465. "AUDIO_SPI_MISO_R",
  466. "",
  467. "AC_OK_1V8",
  468. "SD_DATA0",
  469. "SD_DATA1",
  470. "SD_DATA2",
  471. "SD_DATA3",
  472. "SD_CLK",
  473. "SD_CMD",
  474. "PWRAP_SPI0_MI",
  475. "PWRAP_SPI0_MO",
  476. "PWRAP_SPI0_CK",
  477. "PWRAP_SPI0_CSN",
  478. "",
  479. "",
  480. "WIFI_PDN",
  481. "RTC32K_1V8",
  482. "DISP_PWM0",
  483. "TOUCHSCREEN_INT_L",
  484. "",
  485. "SRCLKENA0",
  486. "SRCLKENA1",
  487. "PS8640_MODE_CONF",
  488. "TOUCHSCREEN_RESET_R",
  489. "PLATFORM_PROCHOT_L",
  490. "PANEL_POWER_EN",
  491. "REC_MODE_L",
  492. "EC_FW_UPDATE_L",
  493. "ACCEL2_INT_L",
  494. "HDMI_DP_INT",
  495. "ACCELGYRO3_INT_L",
  496. "ACCELGYRO4_INT_L",
  497. "SPI_EC_CLK",
  498. "SPI_EC_MI",
  499. "SPI_EC_MO",
  500. "SPI_EC_CSN",
  501. "SOC_I2C3_1V8_SDA_400K",
  502. "SOC_I2C3_1V8_SCL_400K",
  503. "",
  504. "",
  505. "",
  506. "",
  507. "",
  508. "",
  509. "",
  510. "PS8640_SYSRSTN_1V8",
  511. "APIN_MAX98090_DOUT2",
  512. "TP_INT_1V8_L_R",
  513. "RST_USB_HUB_R",
  514. "BT_WAKE_L",
  515. "ACCEL1_INT_L",
  516. "TABLET_MODE_L",
  517. "",
  518. "V_UP_IN_L_R",
  519. "V_DOWN_IN_L_R",
  520. "SOC_I2C1_1V8_SDA_1M",
  521. "SOC_I2C1_1V8_SCL_1M",
  522. "PS8640_PDN_1V8",
  523. "MAX98090_LRCLK",
  524. "MAX98090_BCLK",
  525. "MAX98090_MCLK",
  526. "APOUT_MAX98090_DIN",
  527. "APIN_MAX98090_DOUT",
  528. "SOC_I2C4_1V8_SDA_400K",
  529. "SOC_I2C4_1V8_SCL_400K";
  530. aud_i2s2: aud_i2s2 {
  531. pins1 {
  532. pinmux = <MT8173_PIN_128_I2S0_LRCK__FUNC_I2S1_WS>,
  533. <MT8173_PIN_129_I2S0_BCK__FUNC_I2S1_BCK>,
  534. <MT8173_PIN_130_I2S0_MCK__FUNC_I2S1_MCK>,
  535. <MT8173_PIN_131_I2S0_DATA0__FUNC_I2S1_DO_1>,
  536. <MT8173_PIN_12_EINT12__FUNC_I2S2_WS>,
  537. <MT8173_PIN_13_EINT13__FUNC_I2S2_BCK>,
  538. <MT8173_PIN_132_I2S0_DATA1__FUNC_I2S2_DI_2>;
  539. bias-pull-down;
  540. };
  541. };
  542. bl_fixed_pins: bl_fixed_pins {
  543. pins1 {
  544. pinmux = <MT8173_PIN_32_UTXD2__FUNC_GPIO32>;
  545. output-low;
  546. };
  547. };
  548. bt_wake_pins: bt_wake_pins {
  549. pins1 {
  550. pinmux = <MT8173_PIN_119_KPROW0__FUNC_GPIO119>;
  551. bias-pull-up;
  552. };
  553. };
  554. disp_pwm0_pins: disp_pwm0_pins {
  555. pins1 {
  556. pinmux = <MT8173_PIN_87_DISP_PWM0__FUNC_DISP_PWM0>;
  557. output-low;
  558. };
  559. };
  560. gpio_keys_pins: gpio_keys_pins {
  561. volume_pins {
  562. pinmux = <MT8173_PIN_123_KPCOL1__FUNC_GPIO123>,
  563. <MT8173_PIN_124_KPCOL2__FUNC_GPIO124>;
  564. bias-pull-up;
  565. };
  566. tablet_mode_pins {
  567. pinmux = <MT8173_PIN_121_KPROW2__FUNC_GPIO121>;
  568. bias-pull-up;
  569. };
  570. };
  571. hdmi_mux_pins: hdmi_mux_pins {
  572. pins1 {
  573. pinmux = <MT8173_PIN_36_DAISYNC__FUNC_GPIO36>;
  574. };
  575. };
  576. i2c1_pins_a: i2c1 {
  577. da9211_pins {
  578. pinmux = <MT8173_PIN_15_EINT15__FUNC_GPIO15>;
  579. bias-pull-up;
  580. };
  581. };
  582. mmc0_pins_default: mmc0default {
  583. pins_cmd_dat {
  584. pinmux = <MT8173_PIN_57_MSDC0_DAT0__FUNC_MSDC0_DAT0>,
  585. <MT8173_PIN_58_MSDC0_DAT1__FUNC_MSDC0_DAT1>,
  586. <MT8173_PIN_59_MSDC0_DAT2__FUNC_MSDC0_DAT2>,
  587. <MT8173_PIN_60_MSDC0_DAT3__FUNC_MSDC0_DAT3>,
  588. <MT8173_PIN_61_MSDC0_DAT4__FUNC_MSDC0_DAT4>,
  589. <MT8173_PIN_62_MSDC0_DAT5__FUNC_MSDC0_DAT5>,
  590. <MT8173_PIN_63_MSDC0_DAT6__FUNC_MSDC0_DAT6>,
  591. <MT8173_PIN_64_MSDC0_DAT7__FUNC_MSDC0_DAT7>,
  592. <MT8173_PIN_66_MSDC0_CMD__FUNC_MSDC0_CMD>;
  593. bias-pull-up;
  594. };
  595. pins_clk {
  596. pinmux = <MT8173_PIN_65_MSDC0_CLK__FUNC_MSDC0_CLK>;
  597. bias-pull-down;
  598. };
  599. pins_rst {
  600. pinmux = <MT8173_PIN_68_MSDC0_RST___FUNC_MSDC0_RSTB>;
  601. bias-pull-up;
  602. };
  603. };
  604. mmc1_pins_default: mmc1default {
  605. pins_cmd_dat {
  606. pinmux = <MT8173_PIN_73_MSDC1_DAT0__FUNC_MSDC1_DAT0>,
  607. <MT8173_PIN_74_MSDC1_DAT1__FUNC_MSDC1_DAT1>,
  608. <MT8173_PIN_75_MSDC1_DAT2__FUNC_MSDC1_DAT2>,
  609. <MT8173_PIN_76_MSDC1_DAT3__FUNC_MSDC1_DAT3>,
  610. <MT8173_PIN_78_MSDC1_CMD__FUNC_MSDC1_CMD>;
  611. input-enable;
  612. drive-strength = <MTK_DRIVE_4mA>;
  613. bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
  614. };
  615. pins_clk {
  616. pinmux = <MT8173_PIN_77_MSDC1_CLK__FUNC_MSDC1_CLK>;
  617. bias-pull-down;
  618. drive-strength = <MTK_DRIVE_4mA>;
  619. };
  620. pins_insert {
  621. pinmux = <MT8173_PIN_1_EINT1__FUNC_GPIO1>;
  622. bias-pull-up;
  623. };
  624. };
  625. mmc3_pins_default: mmc3default {
  626. pins_dat {
  627. pinmux = <MT8173_PIN_22_MSDC3_DAT0__FUNC_MSDC3_DAT0>,
  628. <MT8173_PIN_23_MSDC3_DAT1__FUNC_MSDC3_DAT1>,
  629. <MT8173_PIN_24_MSDC3_DAT2__FUNC_MSDC3_DAT2>,
  630. <MT8173_PIN_25_MSDC3_DAT3__FUNC_MSDC3_DAT3>;
  631. input-enable;
  632. drive-strength = <MTK_DRIVE_8mA>;
  633. bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
  634. };
  635. pins_cmd {
  636. pinmux = <MT8173_PIN_27_MSDC3_CMD__FUNC_MSDC3_CMD>;
  637. input-enable;
  638. drive-strength = <MTK_DRIVE_8mA>;
  639. bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
  640. };
  641. pins_clk {
  642. pinmux = <MT8173_PIN_26_MSDC3_CLK__FUNC_MSDC3_CLK>;
  643. bias-pull-down;
  644. drive-strength = <MTK_DRIVE_8mA>;
  645. };
  646. };
  647. mmc0_pins_uhs: mmc0 {
  648. pins_cmd_dat {
  649. pinmux = <MT8173_PIN_57_MSDC0_DAT0__FUNC_MSDC0_DAT0>,
  650. <MT8173_PIN_58_MSDC0_DAT1__FUNC_MSDC0_DAT1>,
  651. <MT8173_PIN_59_MSDC0_DAT2__FUNC_MSDC0_DAT2>,
  652. <MT8173_PIN_60_MSDC0_DAT3__FUNC_MSDC0_DAT3>,
  653. <MT8173_PIN_61_MSDC0_DAT4__FUNC_MSDC0_DAT4>,
  654. <MT8173_PIN_62_MSDC0_DAT5__FUNC_MSDC0_DAT5>,
  655. <MT8173_PIN_63_MSDC0_DAT6__FUNC_MSDC0_DAT6>,
  656. <MT8173_PIN_64_MSDC0_DAT7__FUNC_MSDC0_DAT7>,
  657. <MT8173_PIN_66_MSDC0_CMD__FUNC_MSDC0_CMD>;
  658. input-enable;
  659. drive-strength = <MTK_DRIVE_6mA>;
  660. bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
  661. };
  662. pins_clk {
  663. pinmux = <MT8173_PIN_65_MSDC0_CLK__FUNC_MSDC0_CLK>;
  664. drive-strength = <MTK_DRIVE_6mA>;
  665. bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
  666. };
  667. pins_ds {
  668. pinmux = <MT8173_PIN_67_MSDC0_DSL__FUNC_MSDC0_DSL>;
  669. drive-strength = <MTK_DRIVE_10mA>;
  670. bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
  671. };
  672. pins_rst {
  673. pinmux = <MT8173_PIN_68_MSDC0_RST___FUNC_MSDC0_RSTB>;
  674. bias-pull-up;
  675. };
  676. };
  677. mmc1_pins_uhs: mmc1 {
  678. pins_cmd_dat {
  679. pinmux = <MT8173_PIN_73_MSDC1_DAT0__FUNC_MSDC1_DAT0>,
  680. <MT8173_PIN_74_MSDC1_DAT1__FUNC_MSDC1_DAT1>,
  681. <MT8173_PIN_75_MSDC1_DAT2__FUNC_MSDC1_DAT2>,
  682. <MT8173_PIN_76_MSDC1_DAT3__FUNC_MSDC1_DAT3>,
  683. <MT8173_PIN_78_MSDC1_CMD__FUNC_MSDC1_CMD>;
  684. input-enable;
  685. drive-strength = <MTK_DRIVE_6mA>;
  686. bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
  687. };
  688. pins_clk {
  689. pinmux = <MT8173_PIN_77_MSDC1_CLK__FUNC_MSDC1_CLK>;
  690. drive-strength = <MTK_DRIVE_8mA>;
  691. bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
  692. };
  693. };
  694. mmc3_pins_uhs: mmc3 {
  695. pins_dat {
  696. pinmux = <MT8173_PIN_22_MSDC3_DAT0__FUNC_MSDC3_DAT0>,
  697. <MT8173_PIN_23_MSDC3_DAT1__FUNC_MSDC3_DAT1>,
  698. <MT8173_PIN_24_MSDC3_DAT2__FUNC_MSDC3_DAT2>,
  699. <MT8173_PIN_25_MSDC3_DAT3__FUNC_MSDC3_DAT3>;
  700. input-enable;
  701. drive-strength = <MTK_DRIVE_8mA>;
  702. bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
  703. };
  704. pins_cmd {
  705. pinmux = <MT8173_PIN_27_MSDC3_CMD__FUNC_MSDC3_CMD>;
  706. input-enable;
  707. drive-strength = <MTK_DRIVE_8mA>;
  708. bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
  709. };
  710. pins_clk {
  711. pinmux = <MT8173_PIN_26_MSDC3_CLK__FUNC_MSDC3_CLK>;
  712. drive-strength = <MTK_DRIVE_8mA>;
  713. bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
  714. };
  715. };
  716. nor_gpio1_pins: nor {
  717. pins1 {
  718. pinmux = <MT8173_PIN_6_EINT6__FUNC_SFCS0>,
  719. <MT8173_PIN_7_EINT7__FUNC_SFHOLD>,
  720. <MT8173_PIN_8_EINT8__FUNC_SFIN>;
  721. input-enable;
  722. drive-strength = <MTK_DRIVE_4mA>;
  723. bias-pull-up;
  724. };
  725. pins2 {
  726. pinmux = <MT8173_PIN_5_EINT5__FUNC_SFOUT>;
  727. drive-strength = <MTK_DRIVE_4mA>;
  728. bias-pull-up;
  729. };
  730. pins_clk {
  731. pinmux = <MT8173_PIN_9_EINT9__FUNC_SFCK>;
  732. input-enable;
  733. drive-strength = <MTK_DRIVE_4mA>;
  734. bias-pull-up;
  735. };
  736. };
  737. panel_backlight_en_pins: panel_backlight_en_pins {
  738. pins1 {
  739. pinmux = <MT8173_PIN_95_PCM_TX__FUNC_GPIO95>;
  740. };
  741. };
  742. panel_fixed_pins: panel_fixed_pins {
  743. pins1 {
  744. pinmux = <MT8173_PIN_41_CMMCLK__FUNC_GPIO41>;
  745. };
  746. };
  747. ps8640_pins: ps8640_pins {
  748. pins1 {
  749. pinmux = <MT8173_PIN_92_PCM_CLK__FUNC_GPIO92>,
  750. <MT8173_PIN_115_URTS0__FUNC_GPIO115>,
  751. <MT8173_PIN_127_LCM_RST__FUNC_GPIO127>;
  752. };
  753. };
  754. ps8640_fixed_pins: ps8640_fixed_pins {
  755. pins1 {
  756. pinmux = <MT8173_PIN_30_URTS2__FUNC_GPIO30>;
  757. };
  758. };
  759. rt5650_irq: rt5650_irq {
  760. pins1 {
  761. pinmux = <MT8173_PIN_3_EINT3__FUNC_GPIO3>;
  762. bias-pull-down;
  763. };
  764. };
  765. sdio_fixed_3v3_pins: sdio_fixed_3v3_pins {
  766. pins1 {
  767. pinmux = <MT8173_PIN_85_AUD_DAT_MOSI__FUNC_GPIO85>;
  768. output-low;
  769. };
  770. };
  771. spi_pins_a: spi1 {
  772. pins1 {
  773. pinmux = <MT8173_PIN_0_EINT0__FUNC_GPIO0>;
  774. bias-pull-up;
  775. };
  776. pins_spi {
  777. pinmux = <MT8173_PIN_102_MSDC2_DAT2__FUNC_SPI_CK_1_>,
  778. <MT8173_PIN_103_MSDC2_DAT3__FUNC_SPI_MI_1_>,
  779. <MT8173_PIN_104_MSDC2_CLK__FUNC_SPI_MO_1_>,
  780. <MT8173_PIN_105_MSDC2_CMD__FUNC_SPI_CS_1_>;
  781. bias-disable;
  782. };
  783. };
  784. trackpad_irq: trackpad_irq {
  785. pins1 {
  786. pinmux = <MT8173_PIN_117_URXD3__FUNC_GPIO117>;
  787. input-enable;
  788. bias-pull-up;
  789. };
  790. };
  791. usb_pins: usb {
  792. pins1 {
  793. pinmux = <MT8173_PIN_101_MSDC2_DAT1__FUNC_GPIO101>;
  794. output-high;
  795. bias-disable;
  796. };
  797. };
  798. wifi_wake_pins: wifi_wake_pins {
  799. pins1 {
  800. pinmux = <MT8173_PIN_38_CONN_RST__FUNC_GPIO38>;
  801. bias-pull-up;
  802. };
  803. };
  804. };
  805. &pwm0 {
  806. pinctrl-names = "default";
  807. pinctrl-0 = <&disp_pwm0_pins>;
  808. status = "okay";
  809. };
  810. &pwrap {
  811. pmic: mt6397 {
  812. compatible = "mediatek,mt6397";
  813. #address-cells = <1>;
  814. #size-cells = <1>;
  815. interrupt-parent = <&pio>;
  816. interrupts = <11 IRQ_TYPE_LEVEL_HIGH>;
  817. interrupt-controller;
  818. #interrupt-cells = <2>;
  819. clock: mt6397clock {
  820. compatible = "mediatek,mt6397-clk";
  821. #clock-cells = <1>;
  822. };
  823. pio6397: pinctrl {
  824. compatible = "mediatek,mt6397-pinctrl";
  825. pins-are-numbered;
  826. gpio-controller;
  827. #gpio-cells = <2>;
  828. };
  829. regulator: mt6397regulator {
  830. compatible = "mediatek,mt6397-regulator";
  831. mt6397_vpca15_reg: buck_vpca15 {
  832. regulator-compatible = "buck_vpca15";
  833. regulator-name = "vpca15";
  834. regulator-min-microvolt = < 700000>;
  835. regulator-max-microvolt = <1350000>;
  836. regulator-ramp-delay = <12500>;
  837. regulator-always-on;
  838. regulator-allowed-modes = <0 1>;
  839. };
  840. mt6397_vpca7_reg: buck_vpca7 {
  841. regulator-compatible = "buck_vpca7";
  842. regulator-name = "vpca7";
  843. regulator-min-microvolt = < 700000>;
  844. regulator-max-microvolt = <1350000>;
  845. regulator-ramp-delay = <12500>;
  846. regulator-enable-ramp-delay = <115>;
  847. regulator-always-on;
  848. };
  849. mt6397_vsramca15_reg: buck_vsramca15 {
  850. regulator-compatible = "buck_vsramca15";
  851. regulator-name = "vsramca15";
  852. regulator-min-microvolt = < 700000>;
  853. regulator-max-microvolt = <1350000>;
  854. regulator-ramp-delay = <12500>;
  855. regulator-always-on;
  856. };
  857. mt6397_vsramca7_reg: buck_vsramca7 {
  858. regulator-compatible = "buck_vsramca7";
  859. regulator-name = "vsramca7";
  860. regulator-min-microvolt = < 700000>;
  861. regulator-max-microvolt = <1350000>;
  862. regulator-ramp-delay = <12500>;
  863. regulator-always-on;
  864. };
  865. mt6397_vcore_reg: buck_vcore {
  866. regulator-compatible = "buck_vcore";
  867. regulator-name = "vcore";
  868. regulator-min-microvolt = < 700000>;
  869. regulator-max-microvolt = <1350000>;
  870. regulator-ramp-delay = <12500>;
  871. regulator-always-on;
  872. };
  873. mt6397_vgpu_reg: buck_vgpu {
  874. regulator-compatible = "buck_vgpu";
  875. regulator-name = "vgpu";
  876. regulator-min-microvolt = < 700000>;
  877. regulator-max-microvolt = <1350000>;
  878. regulator-ramp-delay = <12500>;
  879. regulator-enable-ramp-delay = <115>;
  880. };
  881. mt6397_vdrm_reg: buck_vdrm {
  882. regulator-compatible = "buck_vdrm";
  883. regulator-name = "vdrm";
  884. regulator-min-microvolt = <1200000>;
  885. regulator-max-microvolt = <1400000>;
  886. regulator-ramp-delay = <12500>;
  887. regulator-always-on;
  888. };
  889. mt6397_vio18_reg: buck_vio18 {
  890. regulator-compatible = "buck_vio18";
  891. regulator-name = "vio18";
  892. regulator-min-microvolt = <1620000>;
  893. regulator-max-microvolt = <1980000>;
  894. regulator-ramp-delay = <12500>;
  895. regulator-always-on;
  896. };
  897. mt6397_vtcxo_reg: ldo_vtcxo {
  898. regulator-compatible = "ldo_vtcxo";
  899. regulator-name = "vtcxo";
  900. regulator-always-on;
  901. };
  902. mt6397_va28_reg: ldo_va28 {
  903. regulator-compatible = "ldo_va28";
  904. regulator-name = "va28";
  905. };
  906. mt6397_vcama_reg: ldo_vcama {
  907. regulator-compatible = "ldo_vcama";
  908. regulator-name = "vcama";
  909. regulator-min-microvolt = <1800000>;
  910. regulator-max-microvolt = <1800000>;
  911. regulator-enable-ramp-delay = <218>;
  912. };
  913. mt6397_vio28_reg: ldo_vio28 {
  914. regulator-compatible = "ldo_vio28";
  915. regulator-name = "vio28";
  916. regulator-always-on;
  917. };
  918. mt6397_vusb_reg: ldo_vusb {
  919. regulator-compatible = "ldo_vusb";
  920. regulator-name = "vusb";
  921. };
  922. mt6397_vmc_reg: ldo_vmc {
  923. regulator-compatible = "ldo_vmc";
  924. regulator-name = "vmc";
  925. regulator-min-microvolt = <1800000>;
  926. regulator-max-microvolt = <3300000>;
  927. regulator-enable-ramp-delay = <218>;
  928. };
  929. mt6397_vmch_reg: ldo_vmch {
  930. regulator-compatible = "ldo_vmch";
  931. regulator-name = "vmch";
  932. regulator-min-microvolt = <3000000>;
  933. regulator-max-microvolt = <3300000>;
  934. regulator-enable-ramp-delay = <218>;
  935. };
  936. mt6397_vemc_3v3_reg: ldo_vemc3v3 {
  937. regulator-compatible = "ldo_vemc3v3";
  938. regulator-name = "vemc_3v3";
  939. regulator-min-microvolt = <3000000>;
  940. regulator-max-microvolt = <3300000>;
  941. regulator-enable-ramp-delay = <218>;
  942. };
  943. mt6397_vgp1_reg: ldo_vgp1 {
  944. regulator-compatible = "ldo_vgp1";
  945. regulator-name = "vcamd";
  946. regulator-min-microvolt = <1800000>;
  947. regulator-max-microvolt = <1800000>;
  948. regulator-enable-ramp-delay = <240>;
  949. };
  950. mt6397_vgp2_reg: ldo_vgp2 {
  951. regulator-compatible = "ldo_vgp2";
  952. regulator-name = "vcamio";
  953. regulator-min-microvolt = <3300000>;
  954. regulator-max-microvolt = <3300000>;
  955. regulator-enable-ramp-delay = <218>;
  956. };
  957. mt6397_vgp3_reg: ldo_vgp3 {
  958. regulator-compatible = "ldo_vgp3";
  959. regulator-name = "vcamaf";
  960. regulator-min-microvolt = <1800000>;
  961. regulator-max-microvolt = <1800000>;
  962. regulator-enable-ramp-delay = <218>;
  963. };
  964. mt6397_vgp4_reg: ldo_vgp4 {
  965. regulator-compatible = "ldo_vgp4";
  966. regulator-name = "vgp4";
  967. regulator-min-microvolt = <1200000>;
  968. regulator-max-microvolt = <3300000>;
  969. regulator-enable-ramp-delay = <218>;
  970. };
  971. mt6397_vgp5_reg: ldo_vgp5 {
  972. regulator-compatible = "ldo_vgp5";
  973. regulator-name = "vgp5";
  974. regulator-min-microvolt = <1200000>;
  975. regulator-max-microvolt = <3000000>;
  976. regulator-enable-ramp-delay = <218>;
  977. };
  978. mt6397_vgp6_reg: ldo_vgp6 {
  979. regulator-compatible = "ldo_vgp6";
  980. regulator-name = "vgp6";
  981. regulator-min-microvolt = <3300000>;
  982. regulator-max-microvolt = <3300000>;
  983. regulator-enable-ramp-delay = <218>;
  984. regulator-always-on;
  985. };
  986. mt6397_vibr_reg: ldo_vibr {
  987. regulator-compatible = "ldo_vibr";
  988. regulator-name = "vibr";
  989. regulator-min-microvolt = <1300000>;
  990. regulator-max-microvolt = <3300000>;
  991. regulator-enable-ramp-delay = <218>;
  992. };
  993. };
  994. rtc: mt6397rtc {
  995. compatible = "mediatek,mt6397-rtc";
  996. };
  997. syscfg_pctl_pmic: syscfg_pctl_pmic@c000 {
  998. compatible = "mediatek,mt6397-pctl-pmic-syscfg",
  999. "syscon";
  1000. reg = <0 0x0000c000 0 0x0108>;
  1001. };
  1002. };
  1003. };
  1004. &spi {
  1005. pinctrl-names = "default";
  1006. pinctrl-0 = <&spi_pins_a>;
  1007. mediatek,pad-select = <1>;
  1008. status = "okay";
  1009. /* clients */
  1010. cros_ec: ec@0 {
  1011. compatible = "google,cros-ec-spi";
  1012. reg = <0x0>;
  1013. spi-max-frequency = <12000000>;
  1014. interrupt-parent = <&pio>;
  1015. interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
  1016. google,cros-ec-spi-msg-delay = <500>;
  1017. i2c_tunnel: i2c-tunnel0 {
  1018. compatible = "google,cros-ec-i2c-tunnel";
  1019. google,remote-bus = <0>;
  1020. #address-cells = <1>;
  1021. #size-cells = <0>;
  1022. battery: sbs-battery@b {
  1023. compatible = "sbs,sbs-battery";
  1024. reg = <0xb>;
  1025. sbs,i2c-retry-count = <2>;
  1026. sbs,poll-retry-count = <1>;
  1027. };
  1028. };
  1029. };
  1030. };
  1031. &ssusb {
  1032. dr_mode = "host";
  1033. wakeup-source;
  1034. vusb33-supply = <&mt6397_vusb_reg>;
  1035. status = "okay";
  1036. };
  1037. &thermal {
  1038. bank0-supply = <&mt6397_vpca15_reg>;
  1039. bank1-supply = <&da9211_vcpu_reg>;
  1040. };
  1041. &uart0 {
  1042. status = "okay";
  1043. };
  1044. &usb_host {
  1045. pinctrl-names = "default";
  1046. pinctrl-0 = <&usb_pins>;
  1047. vusb33-supply = <&mt6397_vusb_reg>;
  1048. status = "okay";
  1049. };
  1050. #include <arm/cros-ec-keyboard.dtsi>