cn9132-db.dts 495 B

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  1. // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2. /*
  3. * Copyright (C) 2019 Marvell International Ltd.
  4. *
  5. * Device tree for the CN9132-DB board.
  6. */
  7. #include "cn9132-db.dtsi"
  8. / {
  9. model = "Marvell Armada CN9132-DB setup A";
  10. };
  11. /* Setup A has SPI1 flash as a boot device, while setup B uses NAND flash.
  12. * Since CP0 SPI1 and CP0 NAND are sharing some pins, they cannot be activated
  13. * simultaneously. When SPI controller is enabled, NAND should be disabled.
  14. */
  15. &cp0_spi1 {
  16. status = "okay";
  17. };