armada-8040.dtsi 1.1 KB

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  1. // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2. /*
  3. * Copyright (C) 2016 Marvell Technology Group Ltd.
  4. *
  5. * Device Tree file for the Armada 8040 SoC, made of an AP806 Quad and
  6. * two CP110.
  7. */
  8. #include "armada-ap806-quad.dtsi"
  9. #include "armada-80x0.dtsi"
  10. / {
  11. model = "Marvell Armada 8040";
  12. compatible = "marvell,armada8040", "marvell,armada-ap806-quad",
  13. "marvell,armada-ap806";
  14. };
  15. &cp0_pcie0 {
  16. iommu-map =
  17. <0x0 &smmu 0x480 0x20>,
  18. <0x100 &smmu 0x4a0 0x20>,
  19. <0x200 &smmu 0x4c0 0x20>;
  20. iommu-map-mask = <0x031f>;
  21. };
  22. /* The RTC requires external oscillator. But on Aramda 80x0, the RTC clock
  23. * in CP master is not connected (by package) to the oscillator. So
  24. * disable it. However, the RTC clock in CP slave is connected to the
  25. * oscillator so this one is let enabled.
  26. */
  27. &cp0_rtc {
  28. status = "disabled";
  29. };
  30. &cp0_sata0 {
  31. iommus = <&smmu 0x444>;
  32. };
  33. &cp0_sdhci0 {
  34. iommus = <&smmu 0x445>;
  35. };
  36. &cp0_usb3_0 {
  37. iommus = <&smmu 0x440>;
  38. };
  39. &cp0_usb3_1 {
  40. iommus = <&smmu 0x441>;
  41. };
  42. &cp1_sata0 {
  43. iommus = <&smmu 0x454>;
  44. };
  45. &cp1_usb3_0 {
  46. iommus = <&smmu 0x450>;
  47. };
  48. &cp1_usb3_1 {
  49. iommus = <&smmu 0x451>;
  50. };