armada-8040-puzzle-m801.dts 9.8 KB

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  1. // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2. /*
  3. * Copyright (C) 2016 Marvell Technology Group Ltd.
  4. * Copyright (C) 2020 Sartura Ltd.
  5. *
  6. * Device Tree file for IEI Puzzle-M801
  7. */
  8. #include "armada-8040.dtsi"
  9. #include <dt-bindings/gpio/gpio.h>
  10. #include <dt-bindings/leds/common.h>
  11. / {
  12. model = "IEI-Puzzle-M801";
  13. compatible = "marvell,armada8040", "marvell,armada-ap806-quad", "marvell,armada-ap806";
  14. aliases {
  15. ethernet0 = &cp0_eth0;
  16. ethernet1 = &cp1_eth0;
  17. ethernet2 = &cp0_eth1;
  18. ethernet3 = &cp0_eth2;
  19. ethernet4 = &cp1_eth1;
  20. ethernet5 = &cp1_eth2;
  21. };
  22. chosen {
  23. stdout-path = "serial0:115200n8";
  24. };
  25. memory@0 {
  26. device_type = "memory";
  27. reg = <0x0 0x0 0x0 0x80000000>;
  28. };
  29. /* Regulator labels correspond with schematics */
  30. v_3_3: regulator-3-3v {
  31. compatible = "regulator-fixed";
  32. regulator-name = "v_3_3";
  33. regulator-min-microvolt = <3300000>;
  34. regulator-max-microvolt = <3300000>;
  35. regulator-always-on;
  36. status = "okay";
  37. };
  38. v_5v0_usb3_hst_vbus: regulator-usb3-vbus0 {
  39. compatible = "regulator-fixed";
  40. enable-active-high;
  41. gpio = <&cp0_gpio2 15 GPIO_ACTIVE_HIGH>;
  42. pinctrl-names = "default";
  43. pinctrl-0 = <&cp0_xhci_vbus_pins>;
  44. regulator-name = "v_5v0_usb3_hst_vbus";
  45. regulator-min-microvolt = <5000000>;
  46. regulator-max-microvolt = <5000000>;
  47. status = "okay";
  48. };
  49. v_vddo_h: regulator-1-8v {
  50. compatible = "regulator-fixed";
  51. regulator-name = "v_vddo_h";
  52. regulator-min-microvolt = <1800000>;
  53. regulator-max-microvolt = <1800000>;
  54. regulator-always-on;
  55. status = "okay";
  56. };
  57. sfp_cp0_eth0: sfp-cp0-eth0 {
  58. compatible = "sff,sfp";
  59. i2c-bus = <&sfpplus0_i2c>;
  60. los-gpios = <&sfpplus_gpio 11 GPIO_ACTIVE_HIGH>;
  61. mod-def0-gpios = <&sfpplus_gpio 10 GPIO_ACTIVE_LOW>;
  62. tx-disable-gpios = <&sfpplus_gpio 9 GPIO_ACTIVE_HIGH>;
  63. tx-fault-gpios = <&sfpplus_gpio 8 GPIO_ACTIVE_HIGH>;
  64. maximum-power-milliwatt = <3000>;
  65. };
  66. sfp_cp1_eth0: sfp-cp1-eth0 {
  67. compatible = "sff,sfp";
  68. i2c-bus = <&sfpplus1_i2c>;
  69. los-gpios = <&sfpplus_gpio 3 GPIO_ACTIVE_HIGH>;
  70. mod-def0-gpios = <&sfpplus_gpio 2 GPIO_ACTIVE_LOW>;
  71. tx-disable-gpios = <&sfpplus_gpio 1 GPIO_ACTIVE_HIGH>;
  72. tx-fault-gpios = <&sfpplus_gpio 0 GPIO_ACTIVE_HIGH>;
  73. maximum-power-milliwatt = <3000>;
  74. };
  75. leds {
  76. compatible = "gpio-leds";
  77. status = "okay";
  78. pinctrl-0 = <&cp0_sfpplus_led_pins &cp1_sfpplus_led_pins>;
  79. pinctrl-names = "default";
  80. led-0 {
  81. /* SFP+ port 2: Activity */
  82. function = LED_FUNCTION_LAN;
  83. function-enumerator = <0>;
  84. gpios = <&cp1_gpio1 6 GPIO_ACTIVE_LOW>;
  85. };
  86. led-1 {
  87. /* SFP+ port 1: Activity */
  88. function = LED_FUNCTION_LAN;
  89. function-enumerator = <1>;
  90. gpios = <&cp1_gpio1 14 GPIO_ACTIVE_LOW>;
  91. };
  92. led-2 {
  93. /* SFP+ port 2: 10 Gbps indicator */
  94. function = LED_FUNCTION_LAN;
  95. function-enumerator = <2>;
  96. gpios = <&cp1_gpio1 7 GPIO_ACTIVE_LOW>;
  97. };
  98. led-3 {
  99. /* SFP+ port 2: 1 Gbps indicator */
  100. function = LED_FUNCTION_LAN;
  101. function-enumerator = <3>;
  102. gpios = <&cp1_gpio1 8 GPIO_ACTIVE_LOW>;
  103. };
  104. led-4 {
  105. /* SFP+ port 1: 10 Gbps indicator */
  106. function = LED_FUNCTION_LAN;
  107. function-enumerator = <4>;
  108. gpios = <&cp1_gpio1 10 GPIO_ACTIVE_LOW>;
  109. };
  110. led-5 {
  111. /* SFP+ port 1: 1 Gbps indicator */
  112. function = LED_FUNCTION_LAN;
  113. function-enumerator = <5>;
  114. gpios = <&cp1_gpio1 31 GPIO_ACTIVE_LOW>;
  115. };
  116. led-6 {
  117. function = LED_FUNCTION_DISK;
  118. linux,default-trigger = "disk-activity";
  119. gpios = <&cp0_gpio2 22 GPIO_ACTIVE_HIGH>;
  120. };
  121. };
  122. };
  123. &ap_sdhci0 {
  124. bus-width = <8>;
  125. /*
  126. * Not stable in HS modes - phy needs "more calibration", so add
  127. * the "slow-mode" and disable SDR104, SDR50 and DDR50 modes.
  128. */
  129. marvell,xenon-phy-slow-mode;
  130. no-1-8-v;
  131. no-sd;
  132. no-sdio;
  133. non-removable;
  134. status = "okay";
  135. vqmmc-supply = <&v_vddo_h>;
  136. };
  137. &ap_thermal_cpu1 {
  138. trips {
  139. cpu_active: cpu-active {
  140. temperature = <44000>;
  141. hysteresis = <2000>;
  142. type = "active";
  143. };
  144. };
  145. cooling-maps {
  146. fan-map {
  147. trip = <&cpu_active>;
  148. cooling-device = <&chassis_fan_group0 64 THERMAL_NO_LIMIT>,
  149. <&chassis_fan_group1 64 THERMAL_NO_LIMIT>;
  150. };
  151. };
  152. };
  153. &i2c0 {
  154. clock-frequency = <100000>;
  155. status = "okay";
  156. rtc@32 {
  157. compatible = "epson,rx8010";
  158. reg = <0x32>;
  159. };
  160. };
  161. &spi0 {
  162. status = "okay";
  163. flash@0 {
  164. #address-cells = <0x1>;
  165. #size-cells = <0x1>;
  166. compatible = "jedec,spi-nor";
  167. reg = <0x0>;
  168. spi-max-frequency = <20000000>;
  169. partition@u-boot {
  170. label = "u-boot";
  171. reg = <0x00000000 0x001f0000>;
  172. };
  173. partition@u-boot-env {
  174. label = "u-boot-env";
  175. reg = <0x001f0000 0x00010000>;
  176. };
  177. partition@ubi1 {
  178. label = "ubi1";
  179. reg = <0x00200000 0x03f00000>;
  180. };
  181. partition@ubi2 {
  182. label = "ubi2";
  183. reg = <0x04100000 0x03f00000>;
  184. };
  185. };
  186. };
  187. &uart0 {
  188. status = "okay";
  189. pinctrl-0 = <&uart0_pins>;
  190. pinctrl-names = "default";
  191. };
  192. &uart1 {
  193. status = "okay";
  194. /* IEI WT61P803 PUZZLE MCU Controller */
  195. mcu {
  196. compatible = "iei,wt61p803-puzzle";
  197. current-speed = <115200>;
  198. enable-beep;
  199. leds {
  200. compatible = "iei,wt61p803-puzzle-leds";
  201. #address-cells = <1>;
  202. #size-cells = <0>;
  203. led@0 {
  204. reg = <0>;
  205. function = LED_FUNCTION_POWER;
  206. color = <LED_COLOR_ID_BLUE>;
  207. };
  208. };
  209. hwmon {
  210. compatible = "iei,wt61p803-puzzle-hwmon";
  211. #address-cells = <1>;
  212. #size-cells = <0>;
  213. chassis_fan_group0:fan-group@0 {
  214. #cooling-cells = <2>;
  215. reg = <0x00>;
  216. cooling-levels = <64 102 170 230 250>;
  217. };
  218. chassis_fan_group1:fan-group@1 {
  219. #cooling-cells = <2>;
  220. reg = <0x01>;
  221. cooling-levels = <64 102 170 230 250>;
  222. };
  223. };
  224. };
  225. };
  226. &cp0_rtc {
  227. status = "disabled";
  228. };
  229. &cp0_i2c0 {
  230. clock-frequency = <100000>;
  231. pinctrl-names = "default";
  232. pinctrl-0 = <&cp0_i2c0_pins>;
  233. status = "okay";
  234. sfpplus_gpio: gpio@21 {
  235. compatible = "nxp,pca9555";
  236. reg = <0x21>;
  237. gpio-controller;
  238. #gpio-cells = <2>;
  239. };
  240. eeprom@54 {
  241. compatible = "atmel,24c04";
  242. reg = <0x54>;
  243. };
  244. };
  245. &cp0_i2c1 {
  246. clock-frequency = <100000>;
  247. pinctrl-names = "default";
  248. pinctrl-0 = <&cp0_i2c1_pins>;
  249. status = "okay";
  250. i2c-switch@70 {
  251. compatible = "nxp,pca9544";
  252. #address-cells = <1>;
  253. #size-cells = <0>;
  254. reg = <0x70>;
  255. sfpplus0_i2c: i2c@0 {
  256. #address-cells = <1>;
  257. #size-cells = <0>;
  258. reg = <0>;
  259. };
  260. sfpplus1_i2c: i2c@1 {
  261. #address-cells = <1>;
  262. #size-cells = <0>;
  263. reg = <1>;
  264. };
  265. };
  266. };
  267. &cp0_uart1 {
  268. pinctrl-names = "default";
  269. pinctrl-0 = <&cp0_uart1_pins>;
  270. status = "okay";
  271. };
  272. &cp0_mdio {
  273. #address-cells = <1>;
  274. #size-cells = <0>;
  275. status = "okay";
  276. ge_phy2: ethernet-phy@0 {
  277. reg = <0>;
  278. };
  279. ge_phy3: ethernet-phy@1 {
  280. reg = <1>;
  281. };
  282. };
  283. &cp0_pcie0 {
  284. pinctrl-names = "default";
  285. pinctrl-0 = <&cp0_pcie_pins>;
  286. num-lanes = <1>;
  287. num-viewport = <8>;
  288. reset-gpios = <&cp0_gpio2 20 GPIO_ACTIVE_LOW>;
  289. ranges = <0x82000000 0x0 0xc0000000 0x0 0xc0000000 0x0 0x20000000>;
  290. phys = <&cp0_comphy0 0>;
  291. phy-names = "cp0-pcie0-x1-phy";
  292. status = "okay";
  293. };
  294. &cp0_pinctrl {
  295. cp0_ge_mdio_pins: ge-mdio-pins {
  296. marvell,pins = "mpp32", "mpp34";
  297. marvell,function = "ge";
  298. };
  299. cp0_i2c1_pins: i2c1-pins {
  300. marvell,pins = "mpp35", "mpp36";
  301. marvell,function = "i2c1";
  302. };
  303. cp0_i2c0_pins: i2c0-pins {
  304. marvell,pins = "mpp37", "mpp38";
  305. marvell,function = "i2c0";
  306. };
  307. cp0_uart1_pins: uart1-pins {
  308. marvell,pins = "mpp40", "mpp41";
  309. marvell,function = "uart1";
  310. };
  311. cp0_xhci_vbus_pins: xhci0-vbus-pins {
  312. marvell,pins = "mpp47";
  313. marvell,function = "gpio";
  314. };
  315. cp0_pcie_pins: pcie-pins {
  316. marvell,pins = "mpp52";
  317. marvell,function = "gpio";
  318. };
  319. cp0_sdhci_pins: sdhci-pins {
  320. marvell,pins = "mpp55", "mpp56", "mpp57", "mpp58", "mpp59",
  321. "mpp60", "mpp61";
  322. marvell,function = "sdio";
  323. };
  324. cp0_sfpplus_led_pins: sfpplus-led-pins {
  325. marvell,pins = "mpp54";
  326. marvell,function = "gpio";
  327. };
  328. };
  329. &cp0_ethernet {
  330. status = "okay";
  331. };
  332. &cp0_eth0 {
  333. status = "okay";
  334. phy-mode = "10gbase-r";
  335. phys = <&cp0_comphy4 0>;
  336. local-mac-address = [ae 00 00 00 ff 00];
  337. sfp = <&sfp_cp0_eth0>;
  338. managed = "in-band-status";
  339. };
  340. &cp0_eth1 {
  341. status = "okay";
  342. phy = <&ge_phy2>;
  343. phy-mode = "sgmii";
  344. local-mac-address = [ae 00 00 00 ff 01];
  345. phys = <&cp0_comphy3 1>;
  346. };
  347. &cp0_eth2 {
  348. status = "okay";
  349. phy-mode = "sgmii";
  350. phys = <&cp0_comphy1 2>;
  351. local-mac-address = [ae 00 00 00 ff 02];
  352. phy = <&ge_phy3>;
  353. };
  354. &cp0_sata0 {
  355. status = "okay";
  356. sata-port@0 {
  357. phys = <&cp0_comphy2 0>;
  358. phy-names = "cp0-sata0-0-phy";
  359. };
  360. sata-port@1 {
  361. phys = <&cp0_comphy5 1>;
  362. phy-names = "cp0-sata0-1-phy";
  363. };
  364. };
  365. &cp0_sdhci0 {
  366. broken-cd;
  367. bus-width = <4>;
  368. pinctrl-names = "default";
  369. pinctrl-0 = <&cp0_sdhci_pins>;
  370. status = "okay";
  371. vqmmc-supply = <&v_3_3>;
  372. };
  373. &cp0_usb3_0 {
  374. status = "okay";
  375. };
  376. &cp0_usb3_1 {
  377. status = "okay";
  378. };
  379. &cp1_i2c0 {
  380. clock-frequency = <100000>;
  381. status = "disabled";
  382. };
  383. &cp1_i2c1 {
  384. clock-frequency = <100000>;
  385. status = "disabled";
  386. };
  387. &cp1_rtc {
  388. status = "disabled";
  389. };
  390. &cp1_ethernet {
  391. status = "okay";
  392. };
  393. &cp1_eth0 {
  394. status = "okay";
  395. phy-mode = "10gbase-r";
  396. phys = <&cp1_comphy4 0>;
  397. local-mac-address = [ae 00 00 00 ff 03];
  398. sfp = <&sfp_cp1_eth0>;
  399. managed = "in-band-status";
  400. };
  401. &cp1_eth1 {
  402. status = "okay";
  403. phy = <&ge_phy4>;
  404. phy-mode = "sgmii";
  405. local-mac-address = [ae 00 00 00 ff 04];
  406. phys = <&cp1_comphy3 1>;
  407. };
  408. &cp1_eth2 {
  409. status = "okay";
  410. phy-mode = "sgmii";
  411. local-mac-address = [ae 00 00 00 ff 05];
  412. phys = <&cp1_comphy5 2>;
  413. phy = <&ge_phy5>;
  414. };
  415. &cp1_pinctrl {
  416. cp1_sfpplus_led_pins: sfpplus-led-pins {
  417. marvell,pins = "mpp6", "mpp7", "mpp8", "mpp10", "mpp14", "mpp31";
  418. marvell,function = "gpio";
  419. };
  420. };
  421. &cp1_uart0 {
  422. status = "disabled";
  423. };
  424. &cp1_comphy2 {
  425. cp1_usbh0_con: connector {
  426. compatible = "usb-a-connector";
  427. phy-supply = <&v_5v0_usb3_hst_vbus>;
  428. };
  429. };
  430. &cp1_usb3_0 {
  431. phys = <&cp1_comphy2 0>;
  432. phy-names = "cp1-usb3h0-comphy";
  433. status = "okay";
  434. };
  435. &cp1_mdio {
  436. #address-cells = <1>;
  437. #size-cells = <0>;
  438. status = "okay";
  439. ge_phy4: ethernet-phy@1 {
  440. reg = <1>;
  441. };
  442. ge_phy5: ethernet-phy@0 {
  443. reg = <0>;
  444. };
  445. };
  446. &cp1_pcie0 {
  447. num-lanes = <2>;
  448. phys = <&cp1_comphy0 0>, <&cp1_comphy1 0>;
  449. phy-names = "cp1-pcie0-x2-lane0-phy", "cp1-pcie0-x2-lane1-phy";
  450. status = "okay";
  451. };