armada-3720-db.dts 4.3 KB

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  1. // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2. /*
  3. * Device Tree file for Marvell Armada 3720 development board
  4. * (DB-88F3720-DDR3)
  5. * Copyright (C) 2016 Marvell
  6. *
  7. * Gregory CLEMENT <[email protected]>
  8. *
  9. * This file is compatible with the version 1.4 and the version 2.0 of
  10. * the board, however the CON numbers are different between the 2
  11. * version
  12. */
  13. /dts-v1/;
  14. #include <dt-bindings/gpio/gpio.h>
  15. #include "armada-372x.dtsi"
  16. / {
  17. model = "Marvell Armada 3720 Development Board DB-88F3720-DDR3";
  18. compatible = "marvell,armada-3720-db", "marvell,armada3720", "marvell,armada3710";
  19. chosen {
  20. stdout-path = "serial0:115200n8";
  21. };
  22. memory@0 {
  23. device_type = "memory";
  24. reg = <0x00000000 0x00000000 0x00000000 0x20000000>;
  25. };
  26. exp_usb3_vbus: usb3-vbus {
  27. compatible = "regulator-fixed";
  28. regulator-name = "usb3-vbus";
  29. regulator-min-microvolt = <5000000>;
  30. regulator-max-microvolt = <5000000>;
  31. enable-active-high;
  32. regulator-always-on;
  33. gpio = <&gpio_exp 1 GPIO_ACTIVE_HIGH>;
  34. };
  35. usb3_phy: usb3-phy {
  36. compatible = "usb-nop-xceiv";
  37. vcc-supply = <&exp_usb3_vbus>;
  38. };
  39. vcc_sd_reg1: regulator {
  40. compatible = "regulator-gpio";
  41. regulator-name = "vcc_sd1";
  42. regulator-min-microvolt = <1800000>;
  43. regulator-max-microvolt = <3300000>;
  44. regulator-boot-on;
  45. gpios = <&gpiosb 23 GPIO_ACTIVE_HIGH>;
  46. gpios-states = <0>;
  47. states = <1800000 0x1
  48. 3300000 0x0>;
  49. enable-active-high;
  50. };
  51. vcc_sd_reg2: regulator-vmcc {
  52. compatible = "regulator-fixed";
  53. regulator-name = "vcc_sd2";
  54. regulator-min-microvolt = <3300000>;
  55. regulator-max-microvolt = <3300000>;
  56. regulator-boot-on;
  57. enable-active-high;
  58. gpio = <&gpio_exp 4 GPIO_ACTIVE_HIGH>;
  59. };
  60. };
  61. /* Gigabit module on CON19(V2.0)/CON21(V1.4) */
  62. &eth0 {
  63. pinctrl-names = "default";
  64. pinctrl-0 = <&rgmii_pins>;
  65. phy-mode = "rgmii-id";
  66. phy = <&phy0>;
  67. status = "okay";
  68. };
  69. /* Gigabit module on CON18(V2.0)/CON20(V1.4) */
  70. &eth1 {
  71. phy-mode = "sgmii";
  72. phy = <&phy1>;
  73. status = "okay";
  74. };
  75. &i2c0 {
  76. pinctrl-names = "default";
  77. pinctrl-0 = <&i2c1_pins>;
  78. status = "okay";
  79. gpio_exp: pca9555@22 {
  80. compatible = "nxp,pca9555";
  81. gpio-controller;
  82. #gpio-cells = <2>;
  83. reg = <0x22>;
  84. /*
  85. * IO0_0: PWR_EN_USB2 IO1_0: PWR_EN_VTT
  86. * IO0_1: PWR_EN_USB23 IO1_1: MPCIE_WDISABLE
  87. * IO0_2: PWR_EN_SATA IO1_2: RGMII_DEV_RSTN
  88. * IO0_3: PWR_EN_PCIE IO1_3: SGMII_DEV_RSTN
  89. * IO0_4: PWR_EN_SD
  90. * IO0_5: PWR_EN_EMMC
  91. * IO0_6: PWR_EN_RGMII IO1_6: SATA_USB3.0_SEL
  92. * IO0_7: PWR_EN_SGMII IO1_7: PWR_MCI_PS
  93. */
  94. };
  95. rtc@68 {
  96. /* PT7C4337A from pericom fully compatible with the ds1337 */
  97. compatible = "dallas,ds1337";
  98. reg = <0x68>;
  99. };
  100. };
  101. &mdio {
  102. status = "okay";
  103. phy0: ethernet-phy@0 {
  104. reg = <0>;
  105. };
  106. phy1: ethernet-phy@1 {
  107. reg = <1>;
  108. };
  109. };
  110. /* CON15(V2.0)/CON17(V1.4) : PCIe / CON15(V2.0)/CON12(V1.4) :mini-PCIe */
  111. &pcie0 {
  112. pinctrl-names = "default";
  113. pinctrl-0 = <&pcie_reset_pins &pcie_clkreq_pins>;
  114. reset-gpios = <&gpiosb 3 GPIO_ACTIVE_LOW>;
  115. status = "okay";
  116. };
  117. /* CON3 */
  118. &sata {
  119. status = "okay";
  120. };
  121. &sdhci0 {
  122. non-removable;
  123. bus-width = <8>;
  124. mmc-ddr-1_8v;
  125. mmc-hs400-1_8v;
  126. marvell,pad-type = "fixed-1-8v";
  127. status = "okay";
  128. };
  129. /* SD slot module on CON14(V2.0)/CON15(V1.4) */
  130. &sdhci1 {
  131. wp-inverted;
  132. cd-gpios = <&gpiosb 2 GPIO_ACTIVE_LOW>;
  133. bus-width = <4>;
  134. marvell,pad-type = "sd";
  135. vqmmc-supply = <&vcc_sd_reg1>;
  136. vmmc-supply = <&vcc_sd_reg2>;
  137. status = "okay";
  138. };
  139. &spi0 {
  140. status = "okay";
  141. pinctrl-names = "default";
  142. pinctrl-0 = <&spi_quad_pins>;
  143. flash@0 {
  144. compatible = "jedec,spi-nor";
  145. reg = <0>;
  146. spi-max-frequency = <108000000>;
  147. spi-rx-bus-width = <4>;
  148. spi-tx-bus-width = <4>;
  149. partitions {
  150. compatible = "fixed-partitions";
  151. #address-cells = <1>;
  152. #size-cells = <1>;
  153. partition@0 {
  154. label = "bootloader";
  155. reg = <0x0 0x200000>;
  156. };
  157. partition@200000 {
  158. label = "U-boot Env";
  159. reg = <0x200000 0x10000>;
  160. };
  161. partition@210000 {
  162. label = "Linux";
  163. reg = <0x210000 0xDF0000>;
  164. };
  165. };
  166. };
  167. };
  168. /*
  169. * Exported on the micro USB connector CON30(V2.0)/CON32(V1.4) through
  170. * an FTDI (also on CON24(V2.0)/CON26(V1.4)).
  171. */
  172. &uart0 {
  173. pinctrl-names = "default";
  174. pinctrl-0 = <&uart1_pins>;
  175. status = "okay";
  176. };
  177. /* CON26(V2.0)/CON28(V1.4) */
  178. &uart1 {
  179. pinctrl-names = "default";
  180. pinctrl-0 = <&uart2_pins>;
  181. status = "okay";
  182. };
  183. /* CON27(V2.0)/CON29(V1.4) */
  184. &usb2 {
  185. status = "okay";
  186. };
  187. /* CON29(V2.0)/CON31(V1.4) */
  188. &usb3 {
  189. status = "okay";
  190. usb-phy = <&usb3_phy>;
  191. };