ac5-98dx35xx-rd.dts 1.6 KB

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  1. // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2. /*
  3. * Device Tree For RD-AC5X.
  4. *
  5. * Copyright (C) 2021 Marvell
  6. * Copyright (C) 2022 Allied Telesis Labs
  7. */
  8. /*
  9. * Device Tree file for Marvell Alleycat 5X development board
  10. * This board file supports the B configuration of the board
  11. */
  12. /dts-v1/;
  13. #include "ac5-98dx35xx.dtsi"
  14. / {
  15. model = "Marvell RD-AC5X Board";
  16. compatible = "marvell,rd-ac5x", "marvell,ac5x", "marvell,ac5";
  17. aliases {
  18. serial0 = &uart0;
  19. spiflash0 = &spiflash0;
  20. gpio0 = &gpio0;
  21. gpio1 = &gpio1;
  22. ethernet0 = &eth0;
  23. ethernet1 = &eth1;
  24. };
  25. memory@0 {
  26. device_type = "memory";
  27. reg = <0x2 0x00000000 0x0 0x40000000>;
  28. };
  29. usb1phy: usb-phy {
  30. compatible = "usb-nop-xceiv";
  31. #phy-cells = <0>;
  32. };
  33. };
  34. &mdio {
  35. phy0: ethernet-phy@0 {
  36. reg = <0>;
  37. };
  38. };
  39. &i2c0 {
  40. status = "okay";
  41. };
  42. &i2c1 {
  43. status = "okay";
  44. };
  45. &eth0 {
  46. status = "okay";
  47. phy-handle = <&phy0>;
  48. };
  49. /* USB0 is a host USB */
  50. &usb0 {
  51. status = "okay";
  52. };
  53. /* USB1 is a peripheral USB */
  54. &usb1 {
  55. status = "okay";
  56. phys = <&usb1phy>;
  57. phy-names = "usb-phy";
  58. dr_mode = "peripheral";
  59. };
  60. &spi0 {
  61. status = "okay";
  62. spiflash0: flash@0 {
  63. compatible = "jedec,spi-nor";
  64. spi-max-frequency = <50000000>;
  65. spi-tx-bus-width = <1>; /* 1-single, 2-dual, 4-quad */
  66. spi-rx-bus-width = <1>; /* 1-single, 2-dual, 4-quad */
  67. reg = <0>;
  68. #address-cells = <1>;
  69. #size-cells = <1>;
  70. partition@0 {
  71. label = "spi_flash_part0";
  72. reg = <0x0 0x800000>;
  73. };
  74. parition@1 {
  75. label = "spi_flash_part1";
  76. reg = <0x800000 0x700000>;
  77. };
  78. parition@2 {
  79. label = "spi_flash_part2";
  80. reg = <0xF00000 0x100000>;
  81. };
  82. };
  83. };