imx8qm-mek.dts 3.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright 2018-2019 NXP
  4. * Dong Aisheng <[email protected]>
  5. */
  6. /dts-v1/;
  7. #include "imx8qm.dtsi"
  8. / {
  9. model = "Freescale i.MX8QM MEK";
  10. compatible = "fsl,imx8qm-mek", "fsl,imx8qm";
  11. chosen {
  12. stdout-path = &lpuart0;
  13. };
  14. cpus {
  15. /delete-node/ cpu-map;
  16. /delete-node/ cpu@100;
  17. /delete-node/ cpu@101;
  18. };
  19. memory@80000000 {
  20. device_type = "memory";
  21. reg = <0x00000000 0x80000000 0 0x40000000>;
  22. };
  23. reg_usdhc2_vmmc: usdhc2-vmmc {
  24. compatible = "regulator-fixed";
  25. regulator-name = "SD1_SPWR";
  26. regulator-min-microvolt = <3000000>;
  27. regulator-max-microvolt = <3000000>;
  28. gpio = <&lsio_gpio4 19 GPIO_ACTIVE_HIGH>;
  29. enable-active-high;
  30. };
  31. };
  32. &lpuart0 {
  33. pinctrl-names = "default";
  34. pinctrl-0 = <&pinctrl_lpuart0>;
  35. status = "okay";
  36. };
  37. &fec1 {
  38. pinctrl-names = "default";
  39. pinctrl-0 = <&pinctrl_fec1>;
  40. phy-mode = "rgmii-id";
  41. phy-handle = <&ethphy0>;
  42. fsl,magic-packet;
  43. status = "okay";
  44. mdio {
  45. #address-cells = <1>;
  46. #size-cells = <0>;
  47. ethphy0: ethernet-phy@0 {
  48. compatible = "ethernet-phy-ieee802.3-c22";
  49. reg = <0>;
  50. };
  51. ethphy1: ethernet-phy@1 {
  52. compatible = "ethernet-phy-ieee802.3-c22";
  53. reg = <1>;
  54. };
  55. };
  56. };
  57. &usdhc1 {
  58. pinctrl-names = "default";
  59. pinctrl-0 = <&pinctrl_usdhc1>;
  60. bus-width = <8>;
  61. no-sd;
  62. no-sdio;
  63. non-removable;
  64. status = "okay";
  65. };
  66. &usdhc2 {
  67. pinctrl-names = "default";
  68. pinctrl-0 = <&pinctrl_usdhc2>;
  69. bus-width = <4>;
  70. vmmc-supply = <&reg_usdhc2_vmmc>;
  71. cd-gpios = <&lsio_gpio5 22 GPIO_ACTIVE_LOW>;
  72. wp-gpios = <&lsio_gpio5 21 GPIO_ACTIVE_HIGH>;
  73. status = "okay";
  74. };
  75. &iomuxc {
  76. pinctrl_fec1: fec1grp {
  77. fsl,pins = <
  78. IMX8QM_ENET0_MDC_CONN_ENET0_MDC 0x06000020
  79. IMX8QM_ENET0_MDIO_CONN_ENET0_MDIO 0x06000020
  80. IMX8QM_ENET0_RGMII_TX_CTL_CONN_ENET0_RGMII_TX_CTL 0x06000020
  81. IMX8QM_ENET0_RGMII_TXC_CONN_ENET0_RGMII_TXC 0x06000020
  82. IMX8QM_ENET0_RGMII_TXD0_CONN_ENET0_RGMII_TXD0 0x06000020
  83. IMX8QM_ENET0_RGMII_TXD1_CONN_ENET0_RGMII_TXD1 0x06000020
  84. IMX8QM_ENET0_RGMII_TXD2_CONN_ENET0_RGMII_TXD2 0x06000020
  85. IMX8QM_ENET0_RGMII_TXD3_CONN_ENET0_RGMII_TXD3 0x06000020
  86. IMX8QM_ENET0_RGMII_RXC_CONN_ENET0_RGMII_RXC 0x06000020
  87. IMX8QM_ENET0_RGMII_RX_CTL_CONN_ENET0_RGMII_RX_CTL 0x06000020
  88. IMX8QM_ENET0_RGMII_RXD0_CONN_ENET0_RGMII_RXD0 0x06000020
  89. IMX8QM_ENET0_RGMII_RXD1_CONN_ENET0_RGMII_RXD1 0x06000020
  90. IMX8QM_ENET0_RGMII_RXD2_CONN_ENET0_RGMII_RXD2 0x06000020
  91. IMX8QM_ENET0_RGMII_RXD3_CONN_ENET0_RGMII_RXD3 0x06000020
  92. >;
  93. };
  94. pinctrl_lpuart0: lpuart0grp {
  95. fsl,pins = <
  96. IMX8QM_UART0_RX_DMA_UART0_RX 0x06000020
  97. IMX8QM_UART0_TX_DMA_UART0_TX 0x06000020
  98. >;
  99. };
  100. pinctrl_usdhc1: usdhc1grp {
  101. fsl,pins = <
  102. IMX8QM_EMMC0_CLK_CONN_EMMC0_CLK 0x06000041
  103. IMX8QM_EMMC0_CMD_CONN_EMMC0_CMD 0x00000021
  104. IMX8QM_EMMC0_DATA0_CONN_EMMC0_DATA0 0x00000021
  105. IMX8QM_EMMC0_DATA1_CONN_EMMC0_DATA1 0x00000021
  106. IMX8QM_EMMC0_DATA2_CONN_EMMC0_DATA2 0x00000021
  107. IMX8QM_EMMC0_DATA3_CONN_EMMC0_DATA3 0x00000021
  108. IMX8QM_EMMC0_DATA4_CONN_EMMC0_DATA4 0x00000021
  109. IMX8QM_EMMC0_DATA5_CONN_EMMC0_DATA5 0x00000021
  110. IMX8QM_EMMC0_DATA6_CONN_EMMC0_DATA6 0x00000021
  111. IMX8QM_EMMC0_DATA7_CONN_EMMC0_DATA7 0x00000021
  112. IMX8QM_EMMC0_STROBE_CONN_EMMC0_STROBE 0x00000041
  113. >;
  114. };
  115. pinctrl_usdhc2: usdhc2grp {
  116. fsl,pins = <
  117. IMX8QM_USDHC1_CLK_CONN_USDHC1_CLK 0x06000041
  118. IMX8QM_USDHC1_CMD_CONN_USDHC1_CMD 0x00000021
  119. IMX8QM_USDHC1_DATA0_CONN_USDHC1_DATA0 0x00000021
  120. IMX8QM_USDHC1_DATA1_CONN_USDHC1_DATA1 0x00000021
  121. IMX8QM_USDHC1_DATA2_CONN_USDHC1_DATA2 0x00000021
  122. IMX8QM_USDHC1_DATA3_CONN_USDHC1_DATA3 0x00000021
  123. IMX8QM_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x00000021
  124. >;
  125. };
  126. };