imx8mq-librem5-devkit.dts 23 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright 2018-2019 Purism SPC
  4. */
  5. /dts-v1/;
  6. #include "dt-bindings/input/input.h"
  7. #include <dt-bindings/interrupt-controller/irq.h>
  8. #include "dt-bindings/pwm/pwm.h"
  9. #include "dt-bindings/usb/pd.h"
  10. #include "imx8mq.dtsi"
  11. / {
  12. model = "Purism Librem 5 devkit";
  13. compatible = "purism,librem5-devkit", "fsl,imx8mq";
  14. backlight_dsi: backlight-dsi {
  15. compatible = "pwm-backlight";
  16. /* 200 Hz for the PAM2841 */
  17. pwms = <&pwm1 0 5000000 0>;
  18. brightness-levels = <0 100>;
  19. num-interpolated-steps = <100>;
  20. /* Default brightness level (index into the array defined by */
  21. /* the "brightness-levels" property) */
  22. default-brightness-level = <0>;
  23. power-supply = <&reg_22v4_p>;
  24. };
  25. chosen {
  26. stdout-path = &uart1;
  27. };
  28. gpio-keys {
  29. compatible = "gpio-keys";
  30. pinctrl-names = "default";
  31. pinctrl-0 = <&pinctrl_gpio_keys>;
  32. button-1 {
  33. label = "VOL_UP";
  34. gpios = <&gpio4 21 GPIO_ACTIVE_LOW>;
  35. wakeup-source;
  36. linux,code = <KEY_VOLUMEUP>;
  37. };
  38. button-2 {
  39. label = "VOL_DOWN";
  40. gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
  41. wakeup-source;
  42. linux,code = <KEY_VOLUMEDOWN>;
  43. };
  44. button-3 {
  45. label = "WWAN_WAKE";
  46. gpios = <&gpio3 8 GPIO_ACTIVE_LOW>;
  47. interrupt-parent = <&gpio3>;
  48. interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
  49. wakeup-source;
  50. linux,code = <KEY_PHONE>;
  51. };
  52. };
  53. leds {
  54. compatible = "gpio-leds";
  55. pinctrl-names = "default";
  56. pinctrl-0 = <&pinctrl_gpio_leds>;
  57. led1 {
  58. label = "LED 1";
  59. gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
  60. default-state = "off";
  61. };
  62. };
  63. pmic_osc: clock-pmic {
  64. compatible = "fixed-clock";
  65. #clock-cells = <0>;
  66. clock-frequency = <32768>;
  67. clock-output-names = "pmic_osc";
  68. };
  69. reg_1v8_p: regulator-1v8-p {
  70. compatible = "regulator-fixed";
  71. regulator-name = "1v8_p";
  72. regulator-min-microvolt = <1800000>;
  73. regulator-max-microvolt = <1800000>;
  74. vin-supply = <&reg_pwr_en>;
  75. };
  76. reg_2v8_p: regulator-2v8-p {
  77. compatible = "regulator-fixed";
  78. regulator-name = "2v8_p";
  79. regulator-min-microvolt = <2800000>;
  80. regulator-max-microvolt = <2800000>;
  81. vin-supply = <&reg_pwr_en>;
  82. };
  83. reg_3v3_p: regulator-3v3-p {
  84. compatible = "regulator-fixed";
  85. regulator-name = "3v3_p";
  86. regulator-min-microvolt = <3300000>;
  87. regulator-max-microvolt = <3300000>;
  88. vin-supply = <&reg_pwr_en>;
  89. regulator-state-mem {
  90. regulator-on-in-suspend;
  91. };
  92. };
  93. reg_5v_p: regulator-5v-p {
  94. compatible = "regulator-fixed";
  95. regulator-name = "5v_p";
  96. regulator-min-microvolt = <5000000>;
  97. regulator-max-microvolt = <5000000>;
  98. vin-supply = <&reg_pwr_en>;
  99. regulator-state-mem {
  100. regulator-on-in-suspend;
  101. };
  102. };
  103. reg_22v4_p: regulator-22v4-p {
  104. compatible = "regulator-fixed";
  105. regulator-name = "22v4_P";
  106. regulator-min-microvolt = <22400000>;
  107. regulator-max-microvolt = <22400000>;
  108. vin-supply = <&reg_pwr_en>;
  109. };
  110. reg_pwr_en: regulator-pwr-en {
  111. compatible = "regulator-fixed";
  112. pinctrl-names = "default";
  113. pinctrl-0 = <&pinctrl_pwr_en>;
  114. regulator-name = "PWR_EN";
  115. regulator-min-microvolt = <3300000>;
  116. regulator-max-microvolt = <3300000>;
  117. gpio = <&gpio1 8 GPIO_ACTIVE_HIGH>;
  118. enable-active-high;
  119. regulator-always-on;
  120. };
  121. reg_usdhc2_vmmc: regulator-usdhc2-vmmc {
  122. compatible = "regulator-fixed";
  123. pinctrl-names = "default";
  124. pinctrl-0 = <&pinctrl_usdhc2_pwr>;
  125. regulator-name = "VSD_3V3";
  126. regulator-min-microvolt = <3300000>;
  127. regulator-max-microvolt = <3300000>;
  128. gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
  129. enable-active-high;
  130. regulator-always-on;
  131. };
  132. wwan_codec: sound-wwan-codec {
  133. compatible = "option,gtm601";
  134. #sound-dai-cells = <0>;
  135. };
  136. mic_mux: mic-mux {
  137. compatible = "simple-audio-mux";
  138. pinctrl-names = "default";
  139. pinctrl-0 = <&pinctrl_micsel>;
  140. mux-gpios = <&gpio5 5 GPIO_ACTIVE_LOW>;
  141. sound-name-prefix = "Mic Mux";
  142. };
  143. sound {
  144. compatible = "simple-audio-card";
  145. pinctrl-names = "default";
  146. pinctrl-0 = <&pinctrl_hpdet>;
  147. simple-audio-card,aux-devs = <&speaker_amp>, <&mic_mux>;
  148. simple-audio-card,name = "Librem 5 Devkit";
  149. simple-audio-card,format = "i2s";
  150. simple-audio-card,widgets =
  151. "Microphone", "Builtin Microphone",
  152. "Microphone", "Headset Microphone",
  153. "Headphone", "Headphones",
  154. "Speaker", "Builtin Speaker";
  155. simple-audio-card,routing =
  156. "MIC_IN", "Mic Mux OUT",
  157. "Mic Mux IN1", "Headset Microphone",
  158. "Mic Mux IN2", "Builtin Microphone",
  159. "Mic Mux OUT", "Mic Bias",
  160. "Headphones", "HP_OUT",
  161. "Builtin Speaker", "Speaker Amp OUTR",
  162. "Speaker Amp INR", "LINE_OUT";
  163. simple-audio-card,hp-det-gpio = <&gpio3 20 GPIO_ACTIVE_HIGH>;
  164. simple-audio-card,cpu {
  165. sound-dai = <&sai2>;
  166. };
  167. simple-audio-card,codec {
  168. sound-dai = <&sgtl5000>;
  169. clocks = <&clk IMX8MQ_CLK_SAI2_ROOT>;
  170. frame-master;
  171. bitclock-master;
  172. };
  173. };
  174. sound-wwan {
  175. compatible = "simple-audio-card";
  176. simple-audio-card,name = "SIMCom SIM7100";
  177. simple-audio-card,format = "dsp_a";
  178. simple-audio-card,cpu {
  179. sound-dai = <&sai6>;
  180. };
  181. telephony_link_master: simple-audio-card,codec {
  182. sound-dai = <&wwan_codec>;
  183. frame-master;
  184. bitclock-master;
  185. };
  186. };
  187. speaker_amp: speaker-amp {
  188. compatible = "simple-audio-amplifier";
  189. pinctrl-names = "default";
  190. pinctrl-0 = <&pinctrl_spkamp>;
  191. VCC-supply = <&reg_3v3_p>;
  192. sound-name-prefix = "Speaker Amp";
  193. enable-gpios = <&gpio5 3 GPIO_ACTIVE_HIGH>;
  194. };
  195. vibrator {
  196. compatible = "gpio-vibrator";
  197. pinctrl-names = "default";
  198. pinctrl-0 = <&pinctrl_haptic>;
  199. enable-gpios = <&gpio5 4 GPIO_ACTIVE_LOW>;
  200. vcc-supply = <&reg_3v3_p>;
  201. };
  202. wifi_pwr_en: regulator-wifi-en {
  203. compatible = "regulator-fixed";
  204. pinctrl-names = "default";
  205. pinctrl-0 = <&pinctrl_wifi_pwr_en>;
  206. regulator-name = "WIFI_EN";
  207. regulator-min-microvolt = <3300000>;
  208. regulator-max-microvolt = <3300000>;
  209. gpio = <&gpio3 5 GPIO_ACTIVE_HIGH>;
  210. enable-active-high;
  211. regulator-always-on;
  212. };
  213. };
  214. &A53_0 {
  215. cpu-supply = <&buck2_reg>;
  216. };
  217. &A53_1 {
  218. cpu-supply = <&buck2_reg>;
  219. };
  220. &A53_2 {
  221. cpu-supply = <&buck2_reg>;
  222. };
  223. &A53_3 {
  224. cpu-supply = <&buck2_reg>;
  225. };
  226. &dphy {
  227. status = "okay";
  228. };
  229. &fec1 {
  230. pinctrl-names = "default";
  231. pinctrl-0 = <&pinctrl_fec1>;
  232. phy-mode = "rgmii-id";
  233. phy-handle = <&ethphy0>;
  234. fsl,magic-packet;
  235. phy-supply = <&reg_3v3_p>;
  236. status = "okay";
  237. mdio {
  238. #address-cells = <1>;
  239. #size-cells = <0>;
  240. ethphy0: ethernet-phy@1 {
  241. compatible = "ethernet-phy-ieee802.3-c22";
  242. reg = <1>;
  243. };
  244. };
  245. };
  246. &i2c1 {
  247. clock-frequency = <100000>;
  248. pinctrl-names = "default";
  249. pinctrl-0 = <&pinctrl_i2c1>;
  250. status = "okay";
  251. pmic: pmic@4b {
  252. compatible = "rohm,bd71837";
  253. reg = <0x4b>;
  254. pinctrl-names = "default";
  255. pinctrl-0 = <&pinctrl_pmic>;
  256. clocks = <&pmic_osc>;
  257. clock-names = "osc";
  258. #clock-cells = <0>;
  259. clock-output-names = "pmic_clk";
  260. interrupt-parent = <&gpio1>;
  261. interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
  262. rohm,reset-snvs-powered;
  263. regulators {
  264. buck1_reg: BUCK1 {
  265. regulator-name = "buck1";
  266. regulator-min-microvolt = <700000>;
  267. regulator-max-microvolt = <1300000>;
  268. regulator-boot-on;
  269. regulator-always-on;
  270. regulator-ramp-delay = <1250>;
  271. rohm,dvs-run-voltage = <900000>;
  272. rohm,dvs-idle-voltage = <850000>;
  273. rohm,dvs-suspend-voltage = <800000>;
  274. };
  275. buck2_reg: BUCK2 {
  276. regulator-name = "buck2";
  277. regulator-min-microvolt = <700000>;
  278. regulator-max-microvolt = <1300000>;
  279. regulator-boot-on;
  280. regulator-ramp-delay = <1250>;
  281. rohm,dvs-run-voltage = <1000000>;
  282. rohm,dvs-idle-voltage = <900000>;
  283. };
  284. buck3_reg: BUCK3 {
  285. regulator-name = "buck3";
  286. regulator-min-microvolt = <700000>;
  287. regulator-max-microvolt = <1300000>;
  288. regulator-boot-on;
  289. rohm,dvs-run-voltage = <900000>;
  290. };
  291. buck4_reg: BUCK4 {
  292. regulator-name = "buck4";
  293. regulator-min-microvolt = <700000>;
  294. regulator-max-microvolt = <1300000>;
  295. rohm,dvs-run-voltage = <1000000>;
  296. };
  297. buck5_reg: BUCK5 {
  298. regulator-name = "buck5";
  299. regulator-min-microvolt = <700000>;
  300. regulator-max-microvolt = <1350000>;
  301. regulator-boot-on;
  302. regulator-always-on;
  303. };
  304. buck6_reg: BUCK6 {
  305. regulator-name = "buck6";
  306. regulator-min-microvolt = <3000000>;
  307. regulator-max-microvolt = <3300000>;
  308. regulator-boot-on;
  309. regulator-always-on;
  310. };
  311. buck7_reg: BUCK7 {
  312. regulator-name = "buck7";
  313. regulator-min-microvolt = <1605000>;
  314. regulator-max-microvolt = <1995000>;
  315. regulator-boot-on;
  316. regulator-always-on;
  317. };
  318. buck8_reg: BUCK8 {
  319. regulator-name = "buck8";
  320. regulator-min-microvolt = <800000>;
  321. regulator-max-microvolt = <1400000>;
  322. regulator-boot-on;
  323. regulator-always-on;
  324. };
  325. ldo1_reg: LDO1 {
  326. regulator-name = "ldo1";
  327. regulator-min-microvolt = <3000000>;
  328. regulator-max-microvolt = <3300000>;
  329. regulator-boot-on;
  330. /* leave on for snvs power button */
  331. regulator-always-on;
  332. };
  333. ldo2_reg: LDO2 {
  334. regulator-name = "ldo2";
  335. regulator-min-microvolt = <900000>;
  336. regulator-max-microvolt = <900000>;
  337. regulator-boot-on;
  338. /* leave on for snvs power button */
  339. regulator-always-on;
  340. };
  341. ldo3_reg: LDO3 {
  342. regulator-name = "ldo3";
  343. regulator-min-microvolt = <1800000>;
  344. regulator-max-microvolt = <3300000>;
  345. regulator-boot-on;
  346. regulator-always-on;
  347. };
  348. ldo4_reg: LDO4 {
  349. regulator-name = "ldo4";
  350. regulator-min-microvolt = <900000>;
  351. regulator-max-microvolt = <1800000>;
  352. regulator-boot-on;
  353. regulator-always-on;
  354. };
  355. ldo5_reg: LDO5 {
  356. regulator-name = "ldo5";
  357. regulator-min-microvolt = <1800000>;
  358. regulator-max-microvolt = <3300000>;
  359. regulator-always-on;
  360. };
  361. ldo6_reg: LDO6 {
  362. regulator-name = "ldo6";
  363. regulator-min-microvolt = <900000>;
  364. regulator-max-microvolt = <1800000>;
  365. regulator-boot-on;
  366. regulator-always-on;
  367. };
  368. ldo7_reg: LDO7 {
  369. regulator-name = "ldo7";
  370. regulator-min-microvolt = <1800000>;
  371. regulator-max-microvolt = <3300000>;
  372. regulator-boot-on;
  373. regulator-always-on;
  374. };
  375. };
  376. };
  377. typec_ptn5100: usb-typec@52 {
  378. compatible = "nxp,ptn5110";
  379. reg = <0x52>;
  380. pinctrl-names = "default";
  381. pinctrl-0 = <&pinctrl_typec>;
  382. interrupt-parent = <&gpio3>;
  383. interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
  384. connector {
  385. compatible = "usb-c-connector";
  386. label = "USB-C";
  387. data-role = "dual";
  388. power-role = "dual";
  389. try-power-role = "sink";
  390. source-pdos = <PDO_FIXED(5000, 2000,
  391. PDO_FIXED_USB_COMM |
  392. PDO_FIXED_DUAL_ROLE |
  393. PDO_FIXED_DATA_SWAP )>;
  394. sink-pdos = <PDO_FIXED(5000, 3500, PDO_FIXED_USB_COMM |
  395. PDO_FIXED_DUAL_ROLE |
  396. PDO_FIXED_DATA_SWAP )
  397. PDO_VAR(5000, 5000, 3500)>;
  398. op-sink-microwatt = <10000000>;
  399. ports {
  400. #address-cells = <1>;
  401. #size-cells = <0>;
  402. port@0 {
  403. reg = <0>;
  404. usb_con_hs: endpoint {
  405. remote-endpoint = <&typec_hs>;
  406. };
  407. };
  408. port@1 {
  409. reg = <1>;
  410. usb_con_ss: endpoint {
  411. remote-endpoint = <&typec_ss>;
  412. };
  413. };
  414. };
  415. };
  416. };
  417. rtc@68 {
  418. compatible = "microcrystal,rv4162";
  419. reg = <0x68>;
  420. pinctrl-names = "default";
  421. pinctrl-0 = <&pinctrl_rtc>;
  422. interrupt-parent = <&gpio4>;
  423. interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
  424. };
  425. charger@6b { /* bq25896 */
  426. compatible = "ti,bq25890";
  427. reg = <0x6b>;
  428. pinctrl-names = "default";
  429. pinctrl-0 = <&pinctrl_charger>;
  430. interrupt-parent = <&gpio3>;
  431. interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
  432. ti,battery-regulation-voltage = <4192000>; /* 4.192V */
  433. ti,charge-current = <1600000>; /* 1.6A */
  434. ti,termination-current = <66000>; /* 66mA */
  435. ti,precharge-current = <130000>; /* 130mA */
  436. ti,minimum-sys-voltage = <3000000>; /* 3V */
  437. ti,boost-voltage = <5000000>; /* 5V */
  438. ti,boost-max-current = <50000>; /* 50mA */
  439. };
  440. };
  441. &i2c3 {
  442. clock-frequency = <100000>;
  443. pinctrl-names = "default";
  444. pinctrl-0 = <&pinctrl_i2c3>;
  445. status = "okay";
  446. magnetometer@1e {
  447. compatible = "st,lsm9ds1-magn";
  448. reg = <0x1e>;
  449. pinctrl-names = "default";
  450. pinctrl-0 = <&pinctrl_imu>;
  451. interrupt-parent = <&gpio3>;
  452. interrupts = <19 IRQ_TYPE_LEVEL_HIGH>;
  453. vdd-supply = <&reg_3v3_p>;
  454. vddio-supply = <&reg_3v3_p>;
  455. };
  456. sgtl5000: audio-codec@a {
  457. compatible = "fsl,sgtl5000";
  458. clocks = <&clk IMX8MQ_CLK_SAI2_ROOT>;
  459. assigned-clocks = <&clk IMX8MQ_CLK_SAI2>;
  460. assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
  461. assigned-clock-rates = <24576000>;
  462. #sound-dai-cells = <0>;
  463. reg = <0x0a>;
  464. VDDD-supply = <&reg_1v8_p>;
  465. VDDIO-supply = <&reg_3v3_p>;
  466. VDDA-supply = <&reg_3v3_p>;
  467. };
  468. touchscreen@5d {
  469. compatible = "goodix,gt5688";
  470. reg = <0x5d>;
  471. pinctrl-names = "default";
  472. pinctrl-0 = <&pinctrl_ts>;
  473. interrupt-parent = <&gpio3>;
  474. interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
  475. reset-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
  476. irq-gpios = <&gpio3 0 GPIO_ACTIVE_HIGH>;
  477. touchscreen-size-x = <720>;
  478. touchscreen-size-y = <1440>;
  479. AVDD28-supply = <&reg_2v8_p>;
  480. VDDIO-supply = <&reg_1v8_p>;
  481. };
  482. proximity-sensor@60 {
  483. compatible = "vishay,vcnl4040";
  484. reg = <0x60>;
  485. pinctrl-0 = <&pinctrl_prox>;
  486. };
  487. accel-gyro@6a {
  488. compatible = "st,lsm9ds1-imu";
  489. reg = <0x6a>;
  490. vdd-supply = <&reg_3v3_p>;
  491. vddio-supply = <&reg_3v3_p>;
  492. mount-matrix = "1", "0", "0",
  493. "0", "1", "0",
  494. "0", "0", "-1";
  495. };
  496. };
  497. &iomuxc {
  498. pinctrl_bl: blgrp {
  499. fsl,pins = <
  500. MX8MQ_IOMUXC_GPIO1_IO01_PWM1_OUT 0x6 /* DSI_BL_PWM */
  501. >;
  502. };
  503. pinctrl_bt: btgrp {
  504. fsl,pins = <
  505. MX8MQ_IOMUXC_NAND_DATA05_GPIO3_IO11 0x16 /* nBT_DISABLE */
  506. MX8MQ_IOMUXC_NAND_DATA01_GPIO3_IO7 0x10 /* BT_HOST_WAKE */
  507. >;
  508. };
  509. pinctrl_charger: chargergrp {
  510. fsl,pins = <
  511. MX8MQ_IOMUXC_SAI5_MCLK_GPIO3_IO25 0x80 /* CHRG_nINT */
  512. >;
  513. };
  514. pinctrl_fec1: fec1grp {
  515. fsl,pins = <
  516. MX8MQ_IOMUXC_ENET_MDC_ENET1_MDC 0x3
  517. MX8MQ_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3
  518. MX8MQ_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f
  519. MX8MQ_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f
  520. MX8MQ_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f
  521. MX8MQ_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f
  522. MX8MQ_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91
  523. MX8MQ_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91
  524. MX8MQ_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91
  525. MX8MQ_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91
  526. MX8MQ_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f
  527. MX8MQ_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91
  528. MX8MQ_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91
  529. MX8MQ_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f
  530. MX8MQ_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x19
  531. MX8MQ_IOMUXC_GPIO1_IO15_CCMSRCGPCMIX_CLKO2 0x1f
  532. >;
  533. };
  534. pinctrl_ts: tsgrp {
  535. fsl,pins = <
  536. MX8MQ_IOMUXC_NAND_ALE_GPIO3_IO0 0x16 /* TOUCH INT */
  537. MX8MQ_IOMUXC_GPIO1_IO05_GPIO1_IO5 0x19 /* TOUCH RST */
  538. >;
  539. };
  540. pinctrl_gpio_leds: gpioledgrp {
  541. fsl,pins = <
  542. MX8MQ_IOMUXC_GPIO1_IO13_GPIO1_IO13 0x16
  543. >;
  544. };
  545. pinctrl_gpio_keys: gpiokeygrp {
  546. fsl,pins = <
  547. MX8MQ_IOMUXC_SAI2_RXFS_GPIO4_IO21 0x16
  548. MX8MQ_IOMUXC_SAI2_RXC_GPIO4_IO22 0x16
  549. MX8MQ_IOMUXC_NAND_DATA02_GPIO3_IO8 0x80 /* nWoWWAN */
  550. >;
  551. };
  552. pinctrl_haptic: hapticgrp {
  553. fsl,pins = <
  554. MX8MQ_IOMUXC_SPDIF_RX_GPIO5_IO4 0xc6 /* nHAPTIC */
  555. >;
  556. };
  557. pinctrl_hpdet: hpdetgrp {
  558. fsl,pins = <
  559. MX8MQ_IOMUXC_SAI5_RXC_GPIO3_IO20 0xC0 /* HP_DET */
  560. >;
  561. };
  562. pinctrl_i2c1: i2c1grp {
  563. fsl,pins = <
  564. MX8MQ_IOMUXC_I2C1_SCL_I2C1_SCL 0x4000001f
  565. MX8MQ_IOMUXC_I2C1_SDA_I2C1_SDA 0x4000001f
  566. >;
  567. };
  568. pinctrl_i2c3: i2c3grp {
  569. fsl,pins = <
  570. MX8MQ_IOMUXC_I2C3_SCL_I2C3_SCL 0x4000001f
  571. MX8MQ_IOMUXC_I2C3_SDA_I2C3_SDA 0x4000001f
  572. >;
  573. };
  574. pinctrl_imu: imugrp {
  575. fsl,pins = <
  576. MX8MQ_IOMUXC_SAI5_RXFS_GPIO3_IO19 0x8 /* IMU_INT */
  577. >;
  578. };
  579. pinctrl_micsel: micselgrp {
  580. fsl,pins = <
  581. MX8MQ_IOMUXC_SPDIF_EXT_CLK_GPIO5_IO5 0xc6 /* MIC_SEL */
  582. >;
  583. };
  584. pinctrl_spkamp: spkamp {
  585. fsl,pins = <
  586. MX8MQ_IOMUXC_SPDIF_TX_GPIO5_IO3 0x81 /* MUTE */
  587. >;
  588. };
  589. pinctrl_pmic: pmicgrp {
  590. fsl,pins = <
  591. MX8MQ_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x80 /* PMIC intr */
  592. >;
  593. };
  594. pinctrl_prox: proxgrp {
  595. fsl,pins = <
  596. MX8MQ_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x80 /* prox intr */
  597. >;
  598. };
  599. pinctrl_pwr_en: pwrengrp {
  600. fsl,pins = <
  601. MX8MQ_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x06
  602. >;
  603. };
  604. pinctrl_rtc: rtcgrp {
  605. fsl,pins = <
  606. MX8MQ_IOMUXC_SAI3_RXC_GPIO4_IO29 0x80 /* RTC intr */
  607. >;
  608. };
  609. pinctrl_sai2: sai2grp {
  610. fsl,pins = <
  611. MX8MQ_IOMUXC_SAI2_TXFS_SAI2_TX_SYNC 0xd6
  612. MX8MQ_IOMUXC_SAI2_TXC_SAI2_TX_BCLK 0xd6
  613. MX8MQ_IOMUXC_SAI2_TXD0_SAI2_TX_DATA0 0xd6
  614. MX8MQ_IOMUXC_SAI2_RXD0_SAI2_RX_DATA0 0xd6
  615. MX8MQ_IOMUXC_SAI2_MCLK_SAI2_MCLK 0xd6
  616. >;
  617. };
  618. pinctrl_sai6: sai6grp {
  619. fsl,pins = <
  620. MX8MQ_IOMUXC_SAI1_RXD5_SAI6_RX_DATA0 0xd6
  621. MX8MQ_IOMUXC_SAI1_RXD6_SAI6_RX_SYNC 0xd6
  622. MX8MQ_IOMUXC_SAI1_TXD4_SAI6_RX_BCLK 0xd6
  623. MX8MQ_IOMUXC_SAI1_TXD5_SAI6_TX_DATA0 0xd6
  624. >;
  625. };
  626. pinctrl_typec: typecgrp {
  627. fsl,pins = <
  628. MX8MQ_IOMUXC_NAND_DATA06_GPIO3_IO12 0x16
  629. MX8MQ_IOMUXC_NAND_CE0_B_GPIO3_IO1 0x80
  630. >;
  631. };
  632. pinctrl_uart1: uart1grp {
  633. fsl,pins = <
  634. MX8MQ_IOMUXC_UART1_RXD_UART1_DCE_RX 0x49
  635. MX8MQ_IOMUXC_UART1_TXD_UART1_DCE_TX 0x49
  636. >;
  637. };
  638. pinctrl_uart2: uart2grp {
  639. fsl,pins = <
  640. MX8MQ_IOMUXC_UART2_TXD_UART2_DCE_TX 0x49
  641. MX8MQ_IOMUXC_UART2_RXD_UART2_DCE_RX 0x49
  642. MX8MQ_IOMUXC_UART4_RXD_UART2_DCE_CTS_B 0x49
  643. MX8MQ_IOMUXC_UART4_TXD_UART2_DCE_RTS_B 0x49
  644. >;
  645. };
  646. pinctrl_uart3: uart3grp {
  647. fsl,pins = <
  648. MX8MQ_IOMUXC_UART3_RXD_UART3_DCE_RX 0x49
  649. MX8MQ_IOMUXC_UART3_TXD_UART3_DCE_TX 0x49
  650. >;
  651. };
  652. pinctrl_uart4: uart4grp {
  653. fsl,pins = <
  654. MX8MQ_IOMUXC_ECSPI2_SCLK_UART4_DCE_RX 0x49
  655. MX8MQ_IOMUXC_ECSPI2_MOSI_UART4_DCE_TX 0x49
  656. MX8MQ_IOMUXC_ECSPI2_MISO_UART4_DCE_CTS_B 0x49
  657. MX8MQ_IOMUXC_ECSPI2_SS0_UART4_DCE_RTS_B 0x49
  658. MX8MQ_IOMUXC_GPIO1_IO00_ANAMIX_REF_CLK_32K 0x49
  659. >;
  660. };
  661. pinctrl_usdhc1: usdhc1grp {
  662. fsl,pins = <
  663. MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x83
  664. MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xc3
  665. MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xc3
  666. MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xc3
  667. MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xc3
  668. MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xc3
  669. MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xc3
  670. MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xc3
  671. MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xc3
  672. MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xc3
  673. MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x83
  674. MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1
  675. >;
  676. };
  677. pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
  678. fsl,pins = <
  679. MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x8d
  680. MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xcd
  681. MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xcd
  682. MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xcd
  683. MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xcd
  684. MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xcd
  685. MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xcd
  686. MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xcd
  687. MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xcd
  688. MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xcd
  689. MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x8d
  690. MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1
  691. >;
  692. };
  693. pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
  694. fsl,pins = <
  695. MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x9f
  696. MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xdf
  697. MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xdf
  698. MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xdf
  699. MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xdf
  700. MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xdf
  701. MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xdf
  702. MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xdf
  703. MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xdf
  704. MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xdf
  705. MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x9f
  706. MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1
  707. >;
  708. };
  709. pinctrl_usdhc2_pwr: usdhc2pwrgrp {
  710. fsl,pins = <
  711. MX8MQ_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41
  712. >;
  713. };
  714. pinctrl_usdhc2_gpio: usdhc2gpiogrp {
  715. fsl,pins = <
  716. MX8MQ_IOMUXC_SD2_WP_GPIO2_IO20 0x80 /* WIFI_WAKE */
  717. >;
  718. };
  719. pinctrl_usdhc2: usdhc2grp {
  720. fsl,pins = <
  721. MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x83
  722. MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xc3
  723. MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xc3
  724. MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xc3
  725. MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xc3
  726. MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xc3
  727. >;
  728. };
  729. pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
  730. fsl,pins = <
  731. MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x8d
  732. MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xcd
  733. MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xcd
  734. MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xcd
  735. MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xcd
  736. MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xcd
  737. >;
  738. };
  739. pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
  740. fsl,pins = <
  741. MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x9f
  742. MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xcf
  743. MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xcf
  744. MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xcf
  745. MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xcf
  746. MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xcf
  747. >;
  748. };
  749. pinctrl_wdog: wdoggrp {
  750. fsl,pins = <
  751. MX8MQ_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6
  752. >;
  753. };
  754. pinctrl_wifi_pwr_en: wifipwrengrp {
  755. fsl,pins = <
  756. MX8MQ_IOMUXC_NAND_CLE_GPIO3_IO5 0x06
  757. >;
  758. };
  759. pinctrl_wwan: wwangrp {
  760. fsl,pins = <
  761. MX8MQ_IOMUXC_NAND_CE3_B_GPIO3_IO4 0x09 /* nWWAN_DISABLE */
  762. MX8MQ_IOMUXC_NAND_DATA02_GPIO3_IO8 0x80 /* nWoWWAN */
  763. MX8MQ_IOMUXC_NAND_DATA03_GPIO3_IO9 0x19 /* WWAN_RESET */
  764. >;
  765. };
  766. };
  767. &lcdif {
  768. status = "okay";
  769. };
  770. &mipi_dsi {
  771. status = "okay";
  772. #address-cells = <1>;
  773. #size-cells = <0>;
  774. panel@0 {
  775. compatible = "rocktech,jh057n00900";
  776. reg = <0>;
  777. backlight = <&backlight_dsi>;
  778. reset-gpios = <&gpio3 13 GPIO_ACTIVE_LOW>;
  779. iovcc-supply = <&reg_1v8_p>;
  780. vcc-supply = <&reg_2v8_p>;
  781. port {
  782. panel_in: endpoint {
  783. remote-endpoint = <&mipi_dsi_out>;
  784. };
  785. };
  786. };
  787. ports {
  788. port@1 {
  789. reg = <1>;
  790. mipi_dsi_out: endpoint {
  791. remote-endpoint = <&panel_in>;
  792. };
  793. };
  794. };
  795. };
  796. &pgc_gpu {
  797. power-supply = <&buck3_reg>;
  798. };
  799. &pgc_vpu {
  800. power-supply = <&buck4_reg>;
  801. };
  802. &pwm1 {
  803. pinctrl-names = "default";
  804. pinctrl-0 = <&pinctrl_bl>;
  805. status = "okay";
  806. };
  807. &snvs_pwrkey {
  808. status = "okay";
  809. };
  810. &snvs_rtc {
  811. status = "disabled";
  812. };
  813. &sai2 {
  814. pinctrl-names = "default";
  815. pinctrl-0 = <&pinctrl_sai2>;
  816. assigned-clocks = <&clk IMX8MQ_CLK_SAI2>;
  817. assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
  818. assigned-clock-rates = <24576000>;
  819. status = "okay";
  820. };
  821. &sai6 {
  822. pinctrl-names = "default";
  823. pinctrl-0 = <&pinctrl_sai6>;
  824. assigned-clocks = <&clk IMX8MQ_CLK_SAI6>;
  825. assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
  826. assigned-clock-rates = <24576000>;
  827. fsl,sai-synchronous-rx;
  828. status = "okay";
  829. };
  830. &uart1 { /* console */
  831. pinctrl-names = "default";
  832. pinctrl-0 = <&pinctrl_uart1>;
  833. status = "okay";
  834. };
  835. &uart3 { /* GNSS */
  836. pinctrl-names = "default";
  837. pinctrl-0 = <&pinctrl_uart3>;
  838. status = "okay";
  839. };
  840. &uart4 { /* BT */
  841. pinctrl-names = "default";
  842. pinctrl-0 = <&pinctrl_uart4>, <&pinctrl_bt>;
  843. uart-has-rtscts;
  844. status = "okay";
  845. };
  846. &usb3_phy0 {
  847. vbus-supply = <&reg_5v_p>;
  848. status = "okay";
  849. };
  850. &usb3_phy1 {
  851. vbus-supply = <&reg_5v_p>;
  852. status = "okay";
  853. };
  854. &usb_dwc3_0 {
  855. #address-cells = <1>;
  856. #size-cells = <0>;
  857. dr_mode = "otg";
  858. status = "okay";
  859. port@0 {
  860. reg = <0>;
  861. typec_hs: endpoint {
  862. remote-endpoint = <&usb_con_hs>;
  863. };
  864. };
  865. port@1 {
  866. reg = <1>;
  867. typec_ss: endpoint {
  868. remote-endpoint = <&usb_con_ss>;
  869. };
  870. };
  871. };
  872. &usb_dwc3_1 {
  873. dr_mode = "host";
  874. status = "okay";
  875. };
  876. &usdhc1 {
  877. assigned-clocks = <&clk IMX8MQ_CLK_USDHC1>;
  878. assigned-clock-rates = <400000000>;
  879. pinctrl-names = "default", "state_100mhz", "state_200mhz";
  880. pinctrl-0 = <&pinctrl_usdhc1>;
  881. pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
  882. pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
  883. bus-width = <8>;
  884. non-removable;
  885. status = "okay";
  886. };
  887. &usdhc2 {
  888. assigned-clocks = <&clk IMX8MQ_CLK_USDHC2>;
  889. assigned-clock-rates = <200000000>;
  890. pinctrl-names = "default", "state_100mhz", "state_200mhz";
  891. pinctrl-0 = <&pinctrl_usdhc2>;
  892. pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
  893. pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
  894. bus-width = <4>;
  895. vmmc-supply = <&reg_usdhc2_vmmc>;
  896. power-supply = <&wifi_pwr_en>;
  897. broken-cd;
  898. disable-wp;
  899. cap-sdio-irq;
  900. keep-power-in-suspend;
  901. wakeup-source;
  902. status = "okay";
  903. };
  904. &wdog1 {
  905. pinctrl-names = "default";
  906. pinctrl-0 = <&pinctrl_wdog>;
  907. fsl,ext-reset-output;
  908. status = "okay";
  909. };