fsl-ls1012a-qds.dts 2.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157
  1. // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2. /*
  3. * Device Tree file for Freescale LS1012A QDS Board.
  4. *
  5. * Copyright 2016 Freescale Semiconductor, Inc.
  6. *
  7. */
  8. /dts-v1/;
  9. #include "fsl-ls1012a.dtsi"
  10. / {
  11. model = "LS1012A QDS Board";
  12. compatible = "fsl,ls1012a-qds", "fsl,ls1012a";
  13. aliases {
  14. mmc0 = &esdhc0;
  15. mmc1 = &esdhc1;
  16. };
  17. sys_mclk: clock-mclk {
  18. compatible = "fixed-clock";
  19. #clock-cells = <0>;
  20. clock-frequency = <24576000>;
  21. };
  22. reg_3p3v: regulator-3p3v {
  23. compatible = "regulator-fixed";
  24. regulator-name = "3P3V";
  25. regulator-min-microvolt = <3300000>;
  26. regulator-max-microvolt = <3300000>;
  27. regulator-always-on;
  28. };
  29. sound {
  30. compatible = "simple-audio-card";
  31. simple-audio-card,format = "i2s";
  32. simple-audio-card,widgets =
  33. "Microphone", "Microphone Jack",
  34. "Headphone", "Headphone Jack",
  35. "Speaker", "Speaker Ext",
  36. "Line", "Line In Jack";
  37. simple-audio-card,routing =
  38. "MIC_IN", "Microphone Jack",
  39. "Microphone Jack", "Mic Bias",
  40. "LINE_IN", "Line In Jack",
  41. "Headphone Jack", "HP_OUT",
  42. "Speaker Ext", "LINE_OUT";
  43. simple-audio-card,cpu {
  44. sound-dai = <&sai2>;
  45. frame-master;
  46. bitclock-master;
  47. };
  48. simple-audio-card,codec {
  49. sound-dai = <&codec>;
  50. frame-master;
  51. bitclock-master;
  52. system-clock-frequency = <24576000>;
  53. };
  54. };
  55. };
  56. &dspi {
  57. bus-num = <0>;
  58. status = "okay";
  59. flash@0 {
  60. #address-cells = <1>;
  61. #size-cells = <1>;
  62. compatible = "micron,n25q128a11", "jedec,spi-nor";
  63. reg = <0>;
  64. spi-max-frequency = <10000000>;
  65. };
  66. flash@1 {
  67. #address-cells = <1>;
  68. #size-cells = <1>;
  69. compatible = "sst25wf040b", "jedec,spi-nor";
  70. spi-cpol;
  71. spi-cpha;
  72. reg = <1>;
  73. spi-max-frequency = <10000000>;
  74. };
  75. flash@2 {
  76. #address-cells = <1>;
  77. #size-cells = <1>;
  78. compatible = "en25s64", "jedec,spi-nor";
  79. spi-cpol;
  80. spi-cpha;
  81. reg = <2>;
  82. spi-max-frequency = <10000000>;
  83. };
  84. };
  85. &duart0 {
  86. status = "okay";
  87. };
  88. &esdhc0 {
  89. status = "okay";
  90. };
  91. &esdhc1 {
  92. status = "okay";
  93. };
  94. &i2c0 {
  95. status = "okay";
  96. i2c-mux@77 {
  97. compatible = "nxp,pca9547";
  98. reg = <0x77>;
  99. #address-cells = <1>;
  100. #size-cells = <0>;
  101. i2c@4 {
  102. #address-cells = <1>;
  103. #size-cells = <0>;
  104. reg = <0x4>;
  105. codec: sgtl5000@a {
  106. #sound-dai-cells = <0>;
  107. compatible = "fsl,sgtl5000";
  108. reg = <0xa>;
  109. VDDA-supply = <&reg_3p3v>;
  110. VDDIO-supply = <&reg_3p3v>;
  111. clocks = <&sys_mclk>;
  112. };
  113. };
  114. };
  115. };
  116. &qspi {
  117. status = "okay";
  118. s25fs512s0: flash@0 {
  119. compatible = "jedec,spi-nor";
  120. #address-cells = <1>;
  121. #size-cells = <1>;
  122. spi-max-frequency = <50000000>;
  123. m25p,fast-read;
  124. reg = <0>;
  125. spi-rx-bus-width = <2>;
  126. spi-tx-bus-width = <2>;
  127. };
  128. };
  129. &sai2 {
  130. status = "okay";
  131. };
  132. &sata {
  133. status = "okay";
  134. };