exynos5433-tm2-common.dtsi 30 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Samsung Exynos5433 TM2 board device tree source
  4. *
  5. * Copyright (c) 2016 Samsung Electronics Co., Ltd.
  6. *
  7. * Common device tree source file for Samsung's TM2 and TM2E boards
  8. * which are based on Samsung Exynos5433 SoC.
  9. */
  10. /dts-v1/;
  11. #include "exynos5433.dtsi"
  12. #include <dt-bindings/clock/samsung,s2mps11.h>
  13. #include <dt-bindings/gpio/gpio.h>
  14. #include <dt-bindings/input/input.h>
  15. #include <dt-bindings/interrupt-controller/irq.h>
  16. #include <dt-bindings/sound/samsung-i2s.h>
  17. / {
  18. aliases {
  19. gsc0 = &gsc_0;
  20. gsc1 = &gsc_1;
  21. gsc2 = &gsc_2;
  22. pinctrl0 = &pinctrl_alive;
  23. pinctrl1 = &pinctrl_aud;
  24. pinctrl2 = &pinctrl_cpif;
  25. pinctrl3 = &pinctrl_ese;
  26. pinctrl4 = &pinctrl_finger;
  27. pinctrl5 = &pinctrl_fsys;
  28. pinctrl6 = &pinctrl_imem;
  29. pinctrl7 = &pinctrl_nfc;
  30. pinctrl8 = &pinctrl_peric;
  31. pinctrl9 = &pinctrl_touch;
  32. serial0 = &serial_0;
  33. serial1 = &serial_1;
  34. serial2 = &serial_2;
  35. serial3 = &serial_3;
  36. spi0 = &spi_0;
  37. spi1 = &spi_1;
  38. spi2 = &spi_2;
  39. spi3 = &spi_3;
  40. spi4 = &spi_4;
  41. mshc0 = &mshc_0;
  42. mshc2 = &mshc_2;
  43. };
  44. chosen {
  45. stdout-path = &serial_1;
  46. };
  47. memory@20000000 {
  48. device_type = "memory";
  49. reg = <0x0 0x20000000 0x0 0xc0000000>;
  50. };
  51. gpio-keys {
  52. compatible = "gpio-keys";
  53. power-key {
  54. gpios = <&gpa2 7 GPIO_ACTIVE_LOW>;
  55. linux,code = <KEY_POWER>;
  56. label = "power key";
  57. debounce-interval = <10>;
  58. };
  59. volume-up-key {
  60. gpios = <&gpa2 0 GPIO_ACTIVE_LOW>;
  61. linux,code = <KEY_VOLUMEUP>;
  62. label = "volume-up key";
  63. debounce-interval = <10>;
  64. };
  65. volume-down-key {
  66. gpios = <&gpa2 1 GPIO_ACTIVE_LOW>;
  67. linux,code = <KEY_VOLUMEDOWN>;
  68. label = "volume-down key";
  69. debounce-interval = <10>;
  70. };
  71. homepage-key {
  72. gpios = <&gpa0 3 GPIO_ACTIVE_LOW>;
  73. linux,code = <KEY_MENU>;
  74. label = "homepage key";
  75. debounce-interval = <10>;
  76. };
  77. };
  78. i2c_max98504: i2c-gpio-0 {
  79. compatible = "i2c-gpio";
  80. sda-gpios = <&gpd0 1 GPIO_ACTIVE_HIGH>;
  81. scl-gpios = <&gpd0 0 GPIO_ACTIVE_HIGH>;
  82. i2c-gpio,delay-us = <2>;
  83. #address-cells = <1>;
  84. #size-cells = <0>;
  85. max98504: amplifier@31 {
  86. compatible = "maxim,max98504";
  87. reg = <0x31>;
  88. maxim,rx-path = <1>;
  89. maxim,tx-path = <1>;
  90. maxim,tx-channel-mask = <3>;
  91. maxim,tx-channel-source = <2>;
  92. };
  93. };
  94. irda_regulator: irda-regulator {
  95. compatible = "regulator-fixed";
  96. enable-active-high;
  97. gpio = <&gpr3 3 GPIO_ACTIVE_HIGH>;
  98. regulator-name = "irda_regulator";
  99. };
  100. sound {
  101. compatible = "samsung,tm2-audio";
  102. audio-codec = <&wm5110>, <&hdmi>;
  103. i2s-controller = <&i2s0 0>, <&i2s1 0>;
  104. audio-amplifier = <&max98504>;
  105. mic-bias-gpios = <&gpr3 2 GPIO_ACTIVE_HIGH>;
  106. model = "wm5110";
  107. samsung,audio-routing =
  108. /* Headphone */
  109. "HP", "HPOUT1L",
  110. "HP", "HPOUT1R",
  111. /* Speaker */
  112. "SPK", "SPKOUT",
  113. "SPKOUT", "HPOUT2L",
  114. "SPKOUT", "HPOUT2R",
  115. /* Receiver */
  116. "RCV", "HPOUT3L",
  117. "RCV", "HPOUT3R";
  118. status = "okay";
  119. };
  120. };
  121. &adc {
  122. vdd-supply = <&ldo3_reg>;
  123. status = "okay";
  124. thermistor-ap {
  125. compatible = "murata,ncp03wf104";
  126. pullup-uv = <1800000>;
  127. pullup-ohm = <100000>;
  128. pulldown-ohm = <0>;
  129. io-channels = <&adc 0>;
  130. };
  131. thermistor-battery {
  132. compatible = "murata,ncp03wf104";
  133. pullup-uv = <1800000>;
  134. pullup-ohm = <100000>;
  135. pulldown-ohm = <0>;
  136. io-channels = <&adc 1>;
  137. #thermal-sensor-cells = <0>;
  138. };
  139. thermistor-charger {
  140. compatible = "murata,ncp03wf104";
  141. pullup-uv = <1800000>;
  142. pullup-ohm = <100000>;
  143. pulldown-ohm = <0>;
  144. io-channels = <&adc 2>;
  145. };
  146. };
  147. &bus_g2d_400 {
  148. devfreq-events = <&ppmu_event0_d0_general>, <&ppmu_event0_d1_general>;
  149. vdd-supply = <&buck4_reg>;
  150. exynos,saturation-ratio = <10>;
  151. status = "okay";
  152. };
  153. &bus_g2d_266 {
  154. devfreq = <&bus_g2d_400>;
  155. status = "okay";
  156. };
  157. &bus_gscl {
  158. devfreq = <&bus_g2d_400>;
  159. status = "okay";
  160. };
  161. &bus_hevc {
  162. devfreq = <&bus_g2d_400>;
  163. status = "okay";
  164. };
  165. &bus_jpeg {
  166. devfreq = <&bus_g2d_400>;
  167. status = "okay";
  168. };
  169. &bus_mfc {
  170. devfreq = <&bus_g2d_400>;
  171. status = "okay";
  172. };
  173. &bus_mscl {
  174. devfreq = <&bus_g2d_400>;
  175. status = "okay";
  176. };
  177. &bus_noc0 {
  178. devfreq = <&bus_g2d_400>;
  179. status = "okay";
  180. };
  181. &bus_noc1 {
  182. devfreq = <&bus_g2d_400>;
  183. status = "okay";
  184. };
  185. &bus_noc2 {
  186. devfreq = <&bus_g2d_400>;
  187. status = "okay";
  188. };
  189. &cmu_aud {
  190. assigned-clocks = <&cmu_aud CLK_MOUT_AUD_PLL_USER>,
  191. <&cmu_aud CLK_MOUT_SCLK_AUD_I2S>,
  192. <&cmu_aud CLK_MOUT_SCLK_AUD_PCM>,
  193. <&cmu_top CLK_MOUT_AUD_PLL>,
  194. <&cmu_top CLK_MOUT_AUD_PLL_USER_T>,
  195. <&cmu_top CLK_MOUT_SCLK_AUDIO0>,
  196. <&cmu_top CLK_MOUT_SCLK_AUDIO1>,
  197. <&cmu_top CLK_MOUT_SCLK_SPDIF>,
  198. <&cmu_aud CLK_DIV_AUD_CA5>,
  199. <&cmu_aud CLK_DIV_ACLK_AUD>,
  200. <&cmu_aud CLK_DIV_PCLK_DBG_AUD>,
  201. <&cmu_aud CLK_DIV_SCLK_AUD_I2S>,
  202. <&cmu_aud CLK_DIV_SCLK_AUD_PCM>,
  203. <&cmu_aud CLK_DIV_SCLK_AUD_SLIMBUS>,
  204. <&cmu_aud CLK_DIV_SCLK_AUD_UART>,
  205. <&cmu_top CLK_DIV_SCLK_AUDIO0>,
  206. <&cmu_top CLK_DIV_SCLK_AUDIO1>,
  207. <&cmu_top CLK_DIV_SCLK_PCM1>,
  208. <&cmu_top CLK_DIV_SCLK_I2S1>;
  209. assigned-clock-parents = <&cmu_top CLK_FOUT_AUD_PLL>,
  210. <&cmu_aud CLK_MOUT_AUD_PLL_USER>,
  211. <&cmu_aud CLK_MOUT_AUD_PLL_USER>,
  212. <&cmu_top CLK_FOUT_AUD_PLL>,
  213. <&cmu_top CLK_MOUT_AUD_PLL>,
  214. <&cmu_top CLK_MOUT_AUD_PLL_USER_T>,
  215. <&cmu_top CLK_MOUT_AUD_PLL_USER_T>,
  216. <&cmu_top CLK_SCLK_AUDIO0>;
  217. assigned-clock-rates = <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>,
  218. <196608001>, <65536001>, <32768001>, <49152001>,
  219. <2048001>, <24576001>, <196608001>,
  220. <24576001>, <98304001>, <2048001>, <49152001>;
  221. };
  222. &cmu_fsys {
  223. assigned-clocks = <&cmu_top CLK_MOUT_SCLK_USBDRD30>,
  224. <&cmu_top CLK_MOUT_SCLK_USBHOST30>,
  225. <&cmu_fsys CLK_MOUT_SCLK_USBDRD30_USER>,
  226. <&cmu_fsys CLK_MOUT_SCLK_USBHOST30_USER>,
  227. <&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_USER>,
  228. <&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_USER>,
  229. <&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_USER>,
  230. <&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_USER>,
  231. <&cmu_top CLK_DIV_SCLK_USBDRD30>,
  232. <&cmu_top CLK_DIV_SCLK_USBHOST30>;
  233. assigned-clock-parents = <&cmu_top CLK_MOUT_BUS_PLL_USER>,
  234. <&cmu_top CLK_MOUT_BUS_PLL_USER>,
  235. <&cmu_top CLK_SCLK_USBDRD30_FSYS>,
  236. <&cmu_top CLK_SCLK_USBHOST30_FSYS>,
  237. <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_PHY>,
  238. <&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_PHY>,
  239. <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_PHY>,
  240. <&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_PHY>;
  241. assigned-clock-rates = <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>,
  242. <66700000>, <66700000>;
  243. };
  244. &cmu_gscl {
  245. assigned-clocks = <&cmu_gscl CLK_MOUT_ACLK_GSCL_111_USER>,
  246. <&cmu_gscl CLK_MOUT_ACLK_GSCL_333_USER>;
  247. assigned-clock-parents = <&cmu_top CLK_ACLK_GSCL_111>,
  248. <&cmu_top CLK_ACLK_GSCL_333>;
  249. };
  250. &cmu_mfc {
  251. assigned-clocks = <&cmu_mfc CLK_MOUT_ACLK_MFC_400_USER>;
  252. assigned-clock-parents = <&cmu_top CLK_ACLK_MFC_400>;
  253. };
  254. &cmu_mif {
  255. assigned-clocks = <&cmu_mif CLK_MOUT_SCLK_DSD_A>, <&cmu_mif CLK_DIV_SCLK_DSD>;
  256. assigned-clock-parents = <&cmu_mif CLK_MOUT_MFC_PLL_DIV2>;
  257. assigned-clock-rates = <0>, <333000000>;
  258. };
  259. &cmu_mscl {
  260. assigned-clocks = <&cmu_mscl CLK_MOUT_ACLK_MSCL_400_USER>,
  261. <&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>,
  262. <&cmu_mscl CLK_MOUT_SCLK_JPEG>,
  263. <&cmu_top CLK_MOUT_SCLK_JPEG_A>;
  264. assigned-clock-parents = <&cmu_top CLK_ACLK_MSCL_400>,
  265. <&cmu_top CLK_SCLK_JPEG_MSCL>,
  266. <&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>,
  267. <&cmu_top CLK_MOUT_BUS_PLL_USER>;
  268. };
  269. &cmu_top {
  270. assigned-clocks = <&cmu_top CLK_FOUT_AUD_PLL>;
  271. assigned-clock-rates = <196608001>;
  272. };
  273. &cpu0 {
  274. cpu-supply = <&buck3_reg>;
  275. };
  276. &cpu4 {
  277. cpu-supply = <&buck2_reg>;
  278. };
  279. &decon {
  280. status = "okay";
  281. };
  282. &decon_tv {
  283. status = "okay";
  284. ports {
  285. #address-cells = <1>;
  286. #size-cells = <0>;
  287. port@0 {
  288. reg = <0>;
  289. tv_to_hdmi: endpoint {
  290. remote-endpoint = <&hdmi_to_tv>;
  291. };
  292. };
  293. };
  294. };
  295. &dsi {
  296. status = "okay";
  297. vddcore-supply = <&ldo6_reg>;
  298. vddio-supply = <&ldo7_reg>;
  299. samsung,burst-clock-frequency = <512000000>;
  300. samsung,esc-clock-frequency = <16000000>;
  301. samsung,pll-clock-frequency = <24000000>;
  302. pinctrl-names = "default";
  303. pinctrl-0 = <&te_irq>;
  304. };
  305. &gpu {
  306. mali-supply = <&buck6_reg>;
  307. status = "okay";
  308. };
  309. &hdmi {
  310. hpd-gpios = <&gpa3 0 GPIO_ACTIVE_HIGH>;
  311. status = "okay";
  312. vdd-supply = <&ldo6_reg>;
  313. vdd_osc-supply = <&ldo7_reg>;
  314. vdd_pll-supply = <&ldo6_reg>;
  315. ports {
  316. #address-cells = <1>;
  317. #size-cells = <0>;
  318. port@0 {
  319. reg = <0>;
  320. hdmi_to_tv: endpoint {
  321. remote-endpoint = <&tv_to_hdmi>;
  322. };
  323. };
  324. port@1 {
  325. reg = <1>;
  326. hdmi_to_mhl: endpoint {
  327. remote-endpoint = <&mhl_to_hdmi>;
  328. };
  329. };
  330. };
  331. };
  332. &hsi2c_0 {
  333. status = "okay";
  334. clock-frequency = <2500000>;
  335. pmic@66 {
  336. compatible = "samsung,s2mps13-pmic";
  337. interrupt-parent = <&gpa0>;
  338. interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
  339. reg = <0x66>;
  340. samsung,s2mps11-wrstbi-ground;
  341. wakeup-source;
  342. s2mps13_osc: clocks {
  343. compatible = "samsung,s2mps13-clk";
  344. #clock-cells = <1>;
  345. clock-output-names = "s2mps13_ap", "s2mps13_cp",
  346. "s2mps13_bt";
  347. };
  348. regulators {
  349. ldo1_reg: LDO1 {
  350. regulator-name = "VDD_ALIVE_0.9V_AP";
  351. regulator-min-microvolt = <900000>;
  352. regulator-max-microvolt = <900000>;
  353. regulator-always-on;
  354. };
  355. ldo2_reg: LDO2 {
  356. regulator-name = "VDDQ_MMC2_2.8V_AP";
  357. regulator-min-microvolt = <2800000>;
  358. regulator-max-microvolt = <2800000>;
  359. regulator-always-on;
  360. regulator-state-mem {
  361. regulator-off-in-suspend;
  362. };
  363. };
  364. ldo3_reg: LDO3 {
  365. regulator-name = "VDD1_E_1.8V_AP";
  366. regulator-min-microvolt = <1800000>;
  367. regulator-max-microvolt = <1800000>;
  368. regulator-always-on;
  369. };
  370. ldo4_reg: LDO4 {
  371. regulator-name = "VDD10_MIF_PLL_1.0V_AP";
  372. regulator-min-microvolt = <1300000>;
  373. regulator-max-microvolt = <1300000>;
  374. regulator-always-on;
  375. regulator-state-mem {
  376. regulator-off-in-suspend;
  377. };
  378. };
  379. ldo5_reg: LDO5 {
  380. regulator-name = "VDD10_DPLL_1.0V_AP";
  381. regulator-min-microvolt = <1000000>;
  382. regulator-max-microvolt = <1000000>;
  383. regulator-always-on;
  384. regulator-state-mem {
  385. regulator-off-in-suspend;
  386. };
  387. };
  388. ldo6_reg: LDO6 {
  389. regulator-name = "VDD10_MIPI2L_1.0V_AP";
  390. regulator-min-microvolt = <1000000>;
  391. regulator-max-microvolt = <1000000>;
  392. regulator-state-mem {
  393. regulator-off-in-suspend;
  394. };
  395. };
  396. ldo7_reg: LDO7 {
  397. regulator-name = "VDD18_MIPI2L_1.8V_AP";
  398. regulator-min-microvolt = <1800000>;
  399. regulator-max-microvolt = <1800000>;
  400. regulator-always-on;
  401. regulator-state-mem {
  402. regulator-off-in-suspend;
  403. };
  404. };
  405. ldo8_reg: LDO8 {
  406. regulator-name = "VDD18_LLI_1.8V_AP";
  407. regulator-min-microvolt = <1800000>;
  408. regulator-max-microvolt = <1800000>;
  409. regulator-always-on;
  410. regulator-state-mem {
  411. regulator-off-in-suspend;
  412. };
  413. };
  414. ldo9_reg: LDO9 {
  415. regulator-name = "VDD18_ABB_ETC_1.8V_AP";
  416. regulator-min-microvolt = <1800000>;
  417. regulator-max-microvolt = <1800000>;
  418. regulator-always-on;
  419. regulator-state-mem {
  420. regulator-off-in-suspend;
  421. };
  422. };
  423. ldo10_reg: LDO10 {
  424. regulator-name = "VDD33_USB30_3.0V_AP";
  425. regulator-min-microvolt = <3000000>;
  426. regulator-max-microvolt = <3000000>;
  427. regulator-state-mem {
  428. regulator-off-in-suspend;
  429. };
  430. };
  431. ldo11_reg: LDO11 {
  432. regulator-name = "VDD_INT_M_1.0V_AP";
  433. regulator-min-microvolt = <1000000>;
  434. regulator-max-microvolt = <1000000>;
  435. regulator-always-on;
  436. regulator-state-mem {
  437. regulator-off-in-suspend;
  438. };
  439. };
  440. ldo12_reg: LDO12 {
  441. regulator-name = "VDD_KFC_M_1.1V_AP";
  442. regulator-min-microvolt = <800000>;
  443. regulator-max-microvolt = <1350000>;
  444. regulator-always-on;
  445. };
  446. ldo13_reg: LDO13 {
  447. regulator-name = "VDD_G3D_M_0.95V_AP";
  448. regulator-min-microvolt = <950000>;
  449. regulator-max-microvolt = <950000>;
  450. regulator-always-on;
  451. regulator-state-mem {
  452. regulator-off-in-suspend;
  453. };
  454. };
  455. ldo14_reg: LDO14 {
  456. regulator-name = "VDDQ_M1_LDO_1.2V_AP";
  457. regulator-min-microvolt = <1200000>;
  458. regulator-max-microvolt = <1200000>;
  459. regulator-always-on;
  460. regulator-state-mem {
  461. regulator-off-in-suspend;
  462. };
  463. };
  464. ldo15_reg: LDO15 {
  465. regulator-name = "VDDQ_M2_LDO_1.2V_AP";
  466. regulator-min-microvolt = <1200000>;
  467. regulator-max-microvolt = <1200000>;
  468. regulator-always-on;
  469. regulator-state-mem {
  470. regulator-off-in-suspend;
  471. };
  472. };
  473. ldo16_reg: LDO16 {
  474. regulator-name = "VDDQ_EFUSE";
  475. regulator-min-microvolt = <1400000>;
  476. regulator-max-microvolt = <3400000>;
  477. regulator-always-on;
  478. };
  479. ldo17_reg: LDO17 {
  480. regulator-name = "V_TFLASH_2.8V_AP";
  481. regulator-min-microvolt = <2800000>;
  482. regulator-max-microvolt = <2800000>;
  483. };
  484. ldo18_reg: LDO18 {
  485. regulator-name = "V_CODEC_1.8V_AP";
  486. regulator-min-microvolt = <1800000>;
  487. regulator-max-microvolt = <1800000>;
  488. };
  489. ldo19_reg: LDO19 {
  490. regulator-name = "VDDA_1.8V_COMP";
  491. regulator-min-microvolt = <1800000>;
  492. regulator-max-microvolt = <1800000>;
  493. regulator-always-on;
  494. };
  495. ldo20_reg: LDO20 {
  496. regulator-name = "VCC_2.8V_AP";
  497. regulator-min-microvolt = <2800000>;
  498. regulator-max-microvolt = <2800000>;
  499. regulator-always-on;
  500. };
  501. ldo21_reg: LDO21 {
  502. regulator-name = "VT_CAM_1.8V";
  503. regulator-min-microvolt = <1800000>;
  504. regulator-max-microvolt = <1800000>;
  505. };
  506. ldo22_reg: LDO22 {
  507. regulator-name = "CAM_IO_1.8V_AP";
  508. regulator-min-microvolt = <1800000>;
  509. regulator-max-microvolt = <1800000>;
  510. };
  511. ldo23_reg: LDO23 {
  512. regulator-name = "CAM_SEN_CORE_1.05V_AP";
  513. regulator-min-microvolt = <1050000>;
  514. regulator-max-microvolt = <1050000>;
  515. };
  516. ldo24_reg: LDO24 {
  517. regulator-name = "VT_CAM_1.2V";
  518. regulator-min-microvolt = <1200000>;
  519. regulator-max-microvolt = <1200000>;
  520. };
  521. ldo25_reg: LDO25 {
  522. regulator-name = "UNUSED_LDO25";
  523. regulator-min-microvolt = <2800000>;
  524. regulator-max-microvolt = <2800000>;
  525. };
  526. ldo26_reg: LDO26 {
  527. regulator-name = "CAM_AF_2.8V_AP";
  528. regulator-min-microvolt = <2800000>;
  529. regulator-max-microvolt = <2800000>;
  530. };
  531. ldo27_reg: LDO27 {
  532. regulator-name = "VCC_3.0V_LCD_AP";
  533. regulator-min-microvolt = <3000000>;
  534. regulator-max-microvolt = <3000000>;
  535. };
  536. ldo28_reg: LDO28 {
  537. regulator-name = "VCC_1.8V_LCD_AP";
  538. regulator-min-microvolt = <1800000>;
  539. regulator-max-microvolt = <1800000>;
  540. };
  541. ldo29_reg: LDO29 {
  542. regulator-name = "VT_CAM_2.8V";
  543. regulator-min-microvolt = <3000000>;
  544. regulator-max-microvolt = <3000000>;
  545. };
  546. ldo30_reg: LDO30 {
  547. regulator-name = "TSP_AVDD_3.3V_AP";
  548. regulator-min-microvolt = <3300000>;
  549. regulator-max-microvolt = <3300000>;
  550. };
  551. ldo31_reg: LDO31 {
  552. /*
  553. * LDO31 differs from target to target,
  554. * its definition is in the .dts
  555. */
  556. };
  557. ldo32_reg: LDO32 {
  558. regulator-name = "VTOUCH_1.8V_AP";
  559. regulator-min-microvolt = <1800000>;
  560. regulator-max-microvolt = <1800000>;
  561. };
  562. ldo33_reg: LDO33 {
  563. regulator-name = "VTOUCH_LED_3.3V";
  564. regulator-min-microvolt = <2500000>;
  565. regulator-max-microvolt = <3300000>;
  566. regulator-ramp-delay = <12500>;
  567. };
  568. ldo34_reg: LDO34 {
  569. regulator-name = "VCC_1.8V_MHL_AP";
  570. regulator-min-microvolt = <1000000>;
  571. regulator-max-microvolt = <2100000>;
  572. };
  573. ldo35_reg: LDO35 {
  574. regulator-name = "OIS_VM_2.8V";
  575. regulator-min-microvolt = <1800000>;
  576. regulator-max-microvolt = <2800000>;
  577. };
  578. ldo36_reg: LDO36 {
  579. regulator-name = "VSIL_1.0V";
  580. regulator-min-microvolt = <1000000>;
  581. regulator-max-microvolt = <1000000>;
  582. };
  583. ldo37_reg: LDO37 {
  584. regulator-name = "VF_1.8V";
  585. regulator-min-microvolt = <1800000>;
  586. regulator-max-microvolt = <1800000>;
  587. };
  588. ldo38_reg: LDO38 {
  589. /*
  590. * LDO38 differs from target to target,
  591. * its definition is in the .dts
  592. */
  593. };
  594. ldo39_reg: LDO39 {
  595. regulator-name = "V_HRM_1.8V";
  596. regulator-min-microvolt = <1800000>;
  597. regulator-max-microvolt = <1800000>;
  598. };
  599. ldo40_reg: LDO40 {
  600. regulator-name = "V_HRM_3.3V";
  601. regulator-min-microvolt = <3300000>;
  602. regulator-max-microvolt = <3300000>;
  603. };
  604. buck1_reg: BUCK1 {
  605. regulator-name = "VDD_MIF_0.9V_AP";
  606. regulator-min-microvolt = <600000>;
  607. regulator-max-microvolt = <1500000>;
  608. regulator-always-on;
  609. regulator-state-mem {
  610. regulator-off-in-suspend;
  611. };
  612. };
  613. buck2_reg: BUCK2 {
  614. regulator-name = "VDD_EGL_1.0V_AP";
  615. regulator-min-microvolt = <900000>;
  616. regulator-max-microvolt = <1300000>;
  617. regulator-always-on;
  618. regulator-state-mem {
  619. regulator-off-in-suspend;
  620. };
  621. };
  622. buck3_reg: BUCK3 {
  623. regulator-name = "VDD_KFC_1.0V_AP";
  624. regulator-min-microvolt = <800000>;
  625. regulator-max-microvolt = <1200000>;
  626. regulator-always-on;
  627. regulator-state-mem {
  628. regulator-off-in-suspend;
  629. };
  630. };
  631. buck4_reg: BUCK4 {
  632. regulator-name = "VDD_INT_0.95V_AP";
  633. regulator-min-microvolt = <600000>;
  634. regulator-max-microvolt = <1500000>;
  635. regulator-always-on;
  636. regulator-state-mem {
  637. regulator-off-in-suspend;
  638. };
  639. };
  640. buck5_reg: BUCK5 {
  641. regulator-name = "VDD_DISP_CAM0_0.9V_AP";
  642. regulator-min-microvolt = <600000>;
  643. regulator-max-microvolt = <1500000>;
  644. regulator-always-on;
  645. regulator-state-mem {
  646. regulator-off-in-suspend;
  647. };
  648. };
  649. buck6_reg: BUCK6 {
  650. regulator-name = "VDD_G3D_0.9V_AP";
  651. regulator-min-microvolt = <600000>;
  652. regulator-max-microvolt = <1500000>;
  653. regulator-always-on;
  654. regulator-state-mem {
  655. regulator-off-in-suspend;
  656. };
  657. };
  658. buck7_reg: BUCK7 {
  659. regulator-name = "VDD_MEM1_1.2V_AP";
  660. regulator-min-microvolt = <1200000>;
  661. regulator-max-microvolt = <1200000>;
  662. regulator-always-on;
  663. };
  664. buck8_reg: BUCK8 {
  665. regulator-name = "VDD_LLDO_1.35V_AP";
  666. regulator-min-microvolt = <1350000>;
  667. regulator-max-microvolt = <3300000>;
  668. regulator-always-on;
  669. };
  670. buck9_reg: BUCK9 {
  671. regulator-name = "VDD_MLDO_2.0V_AP";
  672. regulator-min-microvolt = <1350000>;
  673. regulator-max-microvolt = <3300000>;
  674. regulator-always-on;
  675. };
  676. buck10_reg: BUCK10 {
  677. regulator-name = "vdd_mem2";
  678. regulator-min-microvolt = <550000>;
  679. regulator-max-microvolt = <1500000>;
  680. regulator-always-on;
  681. };
  682. };
  683. };
  684. };
  685. &hsi2c_4 {
  686. status = "okay";
  687. s3fwrn5: nfc@27 {
  688. compatible = "samsung,s3fwrn5-i2c";
  689. reg = <0x27>;
  690. interrupt-parent = <&gpa1>;
  691. interrupts = <3 IRQ_TYPE_EDGE_RISING>;
  692. en-gpios = <&gpf1 4 GPIO_ACTIVE_LOW>;
  693. wake-gpios = <&gpj0 2 GPIO_ACTIVE_HIGH>;
  694. };
  695. };
  696. &hsi2c_5 {
  697. status = "okay";
  698. stmfts: touchscreen@49 {
  699. compatible = "st,stmfts";
  700. reg = <0x49>;
  701. interrupt-parent = <&gpa1>;
  702. interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
  703. avdd-supply = <&ldo30_reg>;
  704. vdd-supply = <&ldo31_reg>;
  705. };
  706. };
  707. &hsi2c_7 {
  708. status = "okay";
  709. clock-frequency = <1000000>;
  710. bridge@39 {
  711. reg = <0x39>;
  712. compatible = "sil,sii8620";
  713. cvcc10-supply = <&ldo36_reg>;
  714. iovcc18-supply = <&ldo34_reg>;
  715. interrupt-parent = <&gpf0>;
  716. interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
  717. reset-gpios = <&gpv7 0 GPIO_ACTIVE_LOW>;
  718. clocks = <&pmu_system_controller 0>;
  719. clock-names = "xtal";
  720. ports {
  721. #address-cells = <1>;
  722. #size-cells = <0>;
  723. port@0 {
  724. reg = <0>;
  725. mhl_to_hdmi: endpoint {
  726. remote-endpoint = <&hdmi_to_mhl>;
  727. };
  728. };
  729. port@1 {
  730. reg = <1>;
  731. mhl_to_musb_con: endpoint {
  732. remote-endpoint = <&musb_con_to_mhl>;
  733. };
  734. };
  735. };
  736. };
  737. };
  738. &hsi2c_8 {
  739. status = "okay";
  740. pmic@66 {
  741. compatible = "maxim,max77843";
  742. interrupt-parent = <&gpa1>;
  743. interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
  744. reg = <0x66>;
  745. muic: extcon {
  746. compatible = "maxim,max77843-muic";
  747. musb_con: connector {
  748. compatible = "samsung,usb-connector-11pin",
  749. "usb-b-connector";
  750. label = "micro-USB";
  751. type = "micro";
  752. ports {
  753. #address-cells = <1>;
  754. #size-cells = <0>;
  755. port@0 {
  756. /*
  757. * TODO: The DTS this is based on does not have
  758. * port@0 which is a required property. The ports
  759. * look incomplete and need fixing.
  760. * Add a disabled port just to satisfy dtschema.
  761. */
  762. reg = <0>;
  763. status = "disabled";
  764. };
  765. port@3 {
  766. reg = <3>;
  767. musb_con_to_mhl: endpoint {
  768. remote-endpoint = <&mhl_to_musb_con>;
  769. };
  770. };
  771. };
  772. };
  773. ports {
  774. port {
  775. muic_to_usb: endpoint {
  776. remote-endpoint = <&usb_to_muic>;
  777. };
  778. };
  779. };
  780. };
  781. regulators {
  782. compatible = "maxim,max77843-regulator";
  783. safeout1_reg: SAFEOUT1 {
  784. regulator-name = "SAFEOUT1";
  785. regulator-min-microvolt = <3300000>;
  786. regulator-max-microvolt = <4950000>;
  787. };
  788. safeout2_reg: SAFEOUT2 {
  789. regulator-name = "SAFEOUT2";
  790. regulator-min-microvolt = <3300000>;
  791. regulator-max-microvolt = <4950000>;
  792. };
  793. charger_reg: CHARGER {
  794. regulator-name = "CHARGER";
  795. regulator-min-microamp = <100000>;
  796. regulator-max-microamp = <3150000>;
  797. };
  798. };
  799. haptic: motor-driver {
  800. compatible = "maxim,max77843-haptic";
  801. haptic-supply = <&ldo38_reg>;
  802. pwms = <&pwm 0 33670 0>;
  803. pwm-names = "haptic";
  804. };
  805. };
  806. };
  807. &hsi2c_11 {
  808. status = "okay";
  809. };
  810. &i2s0 {
  811. status = "okay";
  812. };
  813. &i2s1 {
  814. assigned-clocks = <&i2s1 CLK_I2S_RCLK_SRC>;
  815. assigned-clock-parents = <&cmu_peric CLK_SCLK_I2S1>;
  816. status = "okay";
  817. };
  818. &mshc_0 {
  819. status = "okay";
  820. mmc-hs200-1_8v;
  821. mmc-hs400-1_8v;
  822. cap-mmc-highspeed;
  823. non-removable;
  824. card-detect-delay = <200>;
  825. samsung,dw-mshc-ciu-div = <3>;
  826. samsung,dw-mshc-sdr-timing = <0 4>;
  827. samsung,dw-mshc-ddr-timing = <0 2>;
  828. samsung,dw-mshc-hs400-timing = <0 3>;
  829. samsung,read-strobe-delay = <90>;
  830. fifo-depth = <0x80>;
  831. pinctrl-names = "default";
  832. pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_qrdy &sd0_bus1 &sd0_bus4
  833. &sd0_bus8 &sd0_rdqs>;
  834. bus-width = <8>;
  835. assigned-clocks = <&cmu_top CLK_SCLK_MMC0_FSYS>;
  836. assigned-clock-rates = <800000000>;
  837. };
  838. &mshc_2 {
  839. status = "okay";
  840. cap-sd-highspeed;
  841. disable-wp;
  842. cd-gpios = <&gpa2 4 GPIO_ACTIVE_LOW>;
  843. card-detect-delay = <200>;
  844. samsung,dw-mshc-ciu-div = <3>;
  845. samsung,dw-mshc-sdr-timing = <0 4>;
  846. samsung,dw-mshc-ddr-timing = <0 2>;
  847. fifo-depth = <0x80>;
  848. pinctrl-names = "default";
  849. pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus1 &sd2_bus4>;
  850. bus-width = <4>;
  851. };
  852. &pcie {
  853. status = "okay";
  854. pinctrl-names = "default";
  855. pinctrl-0 = <&pcie_bus &pcie_wlanen>;
  856. vdd10-supply = <&ldo6_reg>;
  857. vdd18-supply = <&ldo7_reg>;
  858. assigned-clocks = <&cmu_fsys CLK_MOUT_SCLK_PCIE_100_USER>,
  859. <&cmu_top CLK_MOUT_SCLK_PCIE_100>;
  860. assigned-clock-parents = <&cmu_top CLK_SCLK_PCIE_100_FSYS>,
  861. <&cmu_top CLK_MOUT_BUS_PLL_USER>;
  862. assigned-clock-rates = <0>, <100000000>;
  863. interrupt-map-mask = <0 0 0 0>;
  864. interrupt-map = <0 0 0 0 &gic GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>;
  865. };
  866. &pcie_phy {
  867. status = "okay";
  868. };
  869. &ppmu_d0_general {
  870. status = "okay";
  871. events {
  872. ppmu_event0_d0_general: ppmu-event0-d0-general {
  873. event-name = "ppmu-event0-d0-general";
  874. };
  875. };
  876. };
  877. &ppmu_d1_general {
  878. status = "okay";
  879. events {
  880. ppmu_event0_d1_general: ppmu-event0-d1-general {
  881. event-name = "ppmu-event0-d1-general";
  882. };
  883. };
  884. };
  885. &pinctrl_alive {
  886. pinctrl-names = "default";
  887. pinctrl-0 = <&initial_alive>;
  888. initial_alive: initial-state {
  889. PIN_IN(gpa0-0, DOWN, FAST_SR1);
  890. PIN_IN(gpa0-1, NONE, FAST_SR1);
  891. PIN_IN(gpa0-2, DOWN, FAST_SR1);
  892. PIN_IN(gpa0-3, NONE, FAST_SR1);
  893. PIN_IN(gpa0-4, NONE, FAST_SR1);
  894. PIN_IN(gpa0-5, DOWN, FAST_SR1);
  895. PIN_IN(gpa0-6, NONE, FAST_SR1);
  896. PIN_IN(gpa0-7, NONE, FAST_SR1);
  897. PIN_IN(gpa1-0, UP, FAST_SR1);
  898. PIN_IN(gpa1-1, UP, FAST_SR1);
  899. PIN_IN(gpa1-2, NONE, FAST_SR1);
  900. PIN_IN(gpa1-3, DOWN, FAST_SR1);
  901. PIN_IN(gpa1-4, DOWN, FAST_SR1);
  902. PIN_IN(gpa1-5, NONE, FAST_SR1);
  903. PIN_IN(gpa1-6, NONE, FAST_SR1);
  904. PIN_IN(gpa1-7, NONE, FAST_SR1);
  905. PIN_IN(gpa2-0, NONE, FAST_SR1);
  906. PIN_IN(gpa2-1, NONE, FAST_SR1);
  907. PIN_IN(gpa2-2, NONE, FAST_SR1);
  908. PIN_IN(gpa2-3, DOWN, FAST_SR1);
  909. PIN_IN(gpa2-4, NONE, FAST_SR1);
  910. PIN_IN(gpa2-5, DOWN, FAST_SR1);
  911. PIN_IN(gpa2-6, DOWN, FAST_SR1);
  912. PIN_IN(gpa2-7, NONE, FAST_SR1);
  913. PIN_IN(gpa3-0, DOWN, FAST_SR1);
  914. PIN_IN(gpa3-1, DOWN, FAST_SR1);
  915. PIN_IN(gpa3-2, NONE, FAST_SR1);
  916. PIN_IN(gpa3-3, DOWN, FAST_SR1);
  917. PIN_IN(gpa3-4, NONE, FAST_SR1);
  918. PIN_IN(gpa3-5, DOWN, FAST_SR1);
  919. PIN_IN(gpa3-6, DOWN, FAST_SR1);
  920. PIN_IN(gpa3-7, DOWN, FAST_SR1);
  921. PIN_IN(gpf1-0, NONE, FAST_SR1);
  922. PIN_IN(gpf1-1, NONE, FAST_SR1);
  923. PIN_IN(gpf1-2, DOWN, FAST_SR1);
  924. PIN_IN(gpf1-4, UP, FAST_SR1);
  925. PIN_OT(gpf1-5, NONE, FAST_SR1);
  926. PIN_IN(gpf1-6, DOWN, FAST_SR1);
  927. PIN_IN(gpf1-7, DOWN, FAST_SR1);
  928. PIN_IN(gpf2-0, DOWN, FAST_SR1);
  929. PIN_IN(gpf2-1, DOWN, FAST_SR1);
  930. PIN_IN(gpf2-2, DOWN, FAST_SR1);
  931. PIN_IN(gpf2-3, DOWN, FAST_SR1);
  932. PIN_IN(gpf3-0, DOWN, FAST_SR1);
  933. PIN_IN(gpf3-1, DOWN, FAST_SR1);
  934. PIN_IN(gpf3-2, NONE, FAST_SR1);
  935. PIN_IN(gpf3-3, DOWN, FAST_SR1);
  936. PIN_IN(gpf4-0, DOWN, FAST_SR1);
  937. PIN_IN(gpf4-1, DOWN, FAST_SR1);
  938. PIN_IN(gpf4-2, DOWN, FAST_SR1);
  939. PIN_IN(gpf4-3, DOWN, FAST_SR1);
  940. PIN_IN(gpf4-4, DOWN, FAST_SR1);
  941. PIN_IN(gpf4-5, DOWN, FAST_SR1);
  942. PIN_IN(gpf4-6, DOWN, FAST_SR1);
  943. PIN_IN(gpf4-7, DOWN, FAST_SR1);
  944. PIN_IN(gpf5-0, DOWN, FAST_SR1);
  945. PIN_IN(gpf5-1, DOWN, FAST_SR1);
  946. PIN_IN(gpf5-2, DOWN, FAST_SR1);
  947. PIN_IN(gpf5-3, DOWN, FAST_SR1);
  948. PIN_OT(gpf5-4, NONE, FAST_SR1);
  949. PIN_IN(gpf5-5, DOWN, FAST_SR1);
  950. PIN_IN(gpf5-6, DOWN, FAST_SR1);
  951. PIN_IN(gpf5-7, DOWN, FAST_SR1);
  952. };
  953. te_irq: te-irq-pins {
  954. samsung,pins = "gpf1-3";
  955. samsung,pin-function = <0xf>;
  956. };
  957. };
  958. &pinctrl_cpif {
  959. pinctrl-names = "default";
  960. pinctrl-0 = <&initial_cpif>;
  961. initial_cpif: initial-state {
  962. PIN_IN(gpv6-0, DOWN, FAST_SR1);
  963. PIN_IN(gpv6-1, DOWN, FAST_SR1);
  964. };
  965. };
  966. &pinctrl_ese {
  967. pinctrl-names = "default";
  968. pinctrl-0 = <&initial_ese>;
  969. pcie_wlanen: pcie-wlanen-pins {
  970. samsung,pins = "gpj2-0";
  971. samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
  972. samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
  973. samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR4>;
  974. };
  975. initial_ese: initial-state {
  976. PIN_IN(gpj2-1, DOWN, FAST_SR1);
  977. PIN_IN(gpj2-2, DOWN, FAST_SR1);
  978. };
  979. };
  980. &pinctrl_fsys {
  981. pinctrl-names = "default";
  982. pinctrl-0 = <&initial_fsys>;
  983. initial_fsys: initial-state {
  984. PIN_IN(gpr3-0, NONE, FAST_SR1);
  985. PIN_IN(gpr3-1, DOWN, FAST_SR1);
  986. PIN_IN(gpr3-2, DOWN, FAST_SR1);
  987. PIN_IN(gpr3-3, DOWN, FAST_SR1);
  988. PIN_IN(gpr3-7, NONE, FAST_SR1);
  989. };
  990. };
  991. &pinctrl_imem {
  992. pinctrl-names = "default";
  993. pinctrl-0 = <&initial_imem>;
  994. initial_imem: initial-state {
  995. PIN_IN(gpf0-0, UP, FAST_SR1);
  996. PIN_IN(gpf0-1, UP, FAST_SR1);
  997. PIN_IN(gpf0-2, DOWN, FAST_SR1);
  998. PIN_IN(gpf0-3, UP, FAST_SR1);
  999. PIN_IN(gpf0-4, DOWN, FAST_SR1);
  1000. PIN_IN(gpf0-5, NONE, FAST_SR1);
  1001. PIN_IN(gpf0-6, DOWN, FAST_SR1);
  1002. PIN_IN(gpf0-7, UP, FAST_SR1);
  1003. };
  1004. };
  1005. &pinctrl_nfc {
  1006. pinctrl-names = "default";
  1007. pinctrl-0 = <&initial_nfc>;
  1008. initial_nfc: initial-state {
  1009. PIN_IN(gpj0-2, DOWN, FAST_SR1);
  1010. };
  1011. };
  1012. &pinctrl_peric {
  1013. pinctrl-names = "default";
  1014. pinctrl-0 = <&initial_peric>;
  1015. initial_peric: initial-state {
  1016. PIN_IN(gpv7-0, DOWN, FAST_SR1);
  1017. PIN_IN(gpv7-1, DOWN, FAST_SR1);
  1018. PIN_IN(gpv7-2, NONE, FAST_SR1);
  1019. PIN_IN(gpv7-3, DOWN, FAST_SR1);
  1020. PIN_IN(gpv7-4, DOWN, FAST_SR1);
  1021. PIN_IN(gpv7-5, DOWN, FAST_SR1);
  1022. PIN_IN(gpb0-4, DOWN, FAST_SR1);
  1023. PIN_IN(gpc0-2, DOWN, FAST_SR1);
  1024. PIN_IN(gpc0-5, DOWN, FAST_SR1);
  1025. PIN_IN(gpc0-7, DOWN, FAST_SR1);
  1026. PIN_IN(gpc1-1, DOWN, FAST_SR1);
  1027. PIN_IN(gpc3-4, NONE, FAST_SR1);
  1028. PIN_IN(gpc3-5, NONE, FAST_SR1);
  1029. PIN_IN(gpc3-6, NONE, FAST_SR1);
  1030. PIN_IN(gpc3-7, NONE, FAST_SR1);
  1031. PIN_OT(gpg0-0, NONE, FAST_SR1);
  1032. PIN_F2(gpg0-1, DOWN, FAST_SR1);
  1033. PIN_IN(gpd2-5, DOWN, FAST_SR1);
  1034. PIN_IN(gpd4-0, NONE, FAST_SR1);
  1035. PIN_IN(gpd4-1, DOWN, FAST_SR1);
  1036. PIN_IN(gpd4-2, DOWN, FAST_SR1);
  1037. PIN_IN(gpd4-3, DOWN, FAST_SR1);
  1038. PIN_IN(gpd4-4, DOWN, FAST_SR1);
  1039. PIN_IN(gpd6-3, DOWN, FAST_SR1);
  1040. PIN_IN(gpd8-1, UP, FAST_SR1);
  1041. PIN_IN(gpg1-0, DOWN, FAST_SR1);
  1042. PIN_IN(gpg1-1, DOWN, FAST_SR1);
  1043. PIN_IN(gpg1-2, DOWN, FAST_SR1);
  1044. PIN_IN(gpg1-3, DOWN, FAST_SR1);
  1045. PIN_IN(gpg1-4, DOWN, FAST_SR1);
  1046. PIN_IN(gpg2-0, DOWN, FAST_SR1);
  1047. PIN_IN(gpg2-1, DOWN, FAST_SR1);
  1048. PIN_IN(gpg3-0, DOWN, FAST_SR1);
  1049. PIN_IN(gpg3-1, DOWN, FAST_SR1);
  1050. PIN_IN(gpg3-5, DOWN, FAST_SR1);
  1051. };
  1052. };
  1053. &pinctrl_touch {
  1054. pinctrl-names = "default";
  1055. pinctrl-0 = <&initial_touch>;
  1056. initial_touch: initial-state {
  1057. PIN_IN(gpj1-2, DOWN, FAST_SR1);
  1058. };
  1059. };
  1060. &pwm {
  1061. pinctrl-0 = <&pwm0_out>;
  1062. pinctrl-names = "default";
  1063. status = "okay";
  1064. };
  1065. &mic {
  1066. status = "okay";
  1067. };
  1068. &pmu_system_controller {
  1069. assigned-clocks = <&pmu_system_controller 0>;
  1070. assigned-clock-parents = <&xxti>;
  1071. };
  1072. &serial_1 {
  1073. status = "okay";
  1074. };
  1075. &serial_3 {
  1076. status = "okay";
  1077. bluetooth {
  1078. compatible = "brcm,bcm43438-bt";
  1079. max-speed = <3000000>;
  1080. shutdown-gpios = <&gpd4 0 GPIO_ACTIVE_HIGH>;
  1081. device-wakeup-gpios = <&gpr3 7 GPIO_ACTIVE_HIGH>;
  1082. host-wakeup-gpios = <&gpa2 2 GPIO_ACTIVE_HIGH>;
  1083. clocks = <&s2mps13_osc S2MPS11_CLK_BT>;
  1084. clock-names = "extclk";
  1085. };
  1086. };
  1087. &spi_1 {
  1088. cs-gpios = <&gpd6 3 GPIO_ACTIVE_HIGH>;
  1089. status = "okay";
  1090. wm5110: audio-codec@0 {
  1091. compatible = "wlf,wm5110";
  1092. reg = <0x0>;
  1093. spi-max-frequency = <20000000>;
  1094. interrupt-parent = <&gpa0>;
  1095. interrupts = <4 IRQ_TYPE_NONE>;
  1096. clocks = <&pmu_system_controller 0>,
  1097. <&s2mps13_osc S2MPS11_CLK_BT>;
  1098. clock-names = "mclk1", "mclk2";
  1099. gpio-controller;
  1100. #gpio-cells = <2>;
  1101. wlf,micd-detect-debounce = <300>;
  1102. wlf,micd-bias-start-time = <0x1>;
  1103. wlf,micd-rate = <0x7>;
  1104. wlf,micd-dbtime = <0x1>;
  1105. wlf,micd-force-micbias;
  1106. wlf,micd-configs = <0x0 1 0>;
  1107. wlf,hpdet-channel = <1>;
  1108. wlf,gpsw = <0x1>;
  1109. wlf,inmode = <2 0 2 0>;
  1110. wlf,reset = <&gpc0 7 GPIO_ACTIVE_HIGH>;
  1111. wlf,ldoena = <&gpf0 0 GPIO_ACTIVE_HIGH>;
  1112. /* core supplies */
  1113. AVDD-supply = <&ldo18_reg>;
  1114. DBVDD1-supply = <&ldo18_reg>;
  1115. CPVDD-supply = <&ldo18_reg>;
  1116. DBVDD2-supply = <&ldo18_reg>;
  1117. DBVDD3-supply = <&ldo18_reg>;
  1118. controller-data {
  1119. samsung,spi-feedback-delay = <0>;
  1120. };
  1121. };
  1122. };
  1123. &spi_3 {
  1124. status = "okay";
  1125. no-cs-readback;
  1126. irled@0 {
  1127. compatible = "ir-spi-led";
  1128. reg = <0x0>;
  1129. spi-max-frequency = <5000000>;
  1130. power-supply = <&irda_regulator>;
  1131. duty-cycle = <60>;
  1132. led-active-low;
  1133. controller-data {
  1134. samsung,spi-feedback-delay = <0>;
  1135. };
  1136. };
  1137. };
  1138. &timer {
  1139. clock-frequency = <24000000>;
  1140. };
  1141. &tmu_atlas0 {
  1142. vtmu-supply = <&ldo3_reg>;
  1143. status = "okay";
  1144. };
  1145. &tmu_apollo {
  1146. vtmu-supply = <&ldo3_reg>;
  1147. status = "okay";
  1148. };
  1149. &tmu_g3d {
  1150. vtmu-supply = <&ldo3_reg>;
  1151. status = "okay";
  1152. };
  1153. &usbdrd30 {
  1154. vdd33-supply = <&ldo10_reg>;
  1155. vdd10-supply = <&ldo6_reg>;
  1156. status = "okay";
  1157. };
  1158. &usbdrd_dwc3 {
  1159. dr_mode = "otg";
  1160. };
  1161. &usbdrd30_phy {
  1162. vbus-supply = <&safeout1_reg>;
  1163. status = "okay";
  1164. port {
  1165. usb_to_muic: endpoint {
  1166. remote-endpoint = <&muic_to_usb>;
  1167. };
  1168. };
  1169. };
  1170. &xxti {
  1171. clock-frequency = <24000000>;
  1172. };