meson-gxm.dtsi 4.5 KB

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  1. // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2. /*
  3. * Copyright (c) 2016 Endless Computers, Inc.
  4. * Author: Carlo Caione <[email protected]>
  5. */
  6. #include "meson-gxl.dtsi"
  7. / {
  8. compatible = "amlogic,meson-gxm";
  9. cpus {
  10. cpu-map {
  11. cluster0 {
  12. core0 {
  13. cpu = <&cpu0>;
  14. };
  15. core1 {
  16. cpu = <&cpu1>;
  17. };
  18. core2 {
  19. cpu = <&cpu2>;
  20. };
  21. core3 {
  22. cpu = <&cpu3>;
  23. };
  24. };
  25. cluster1 {
  26. core0 {
  27. cpu = <&cpu4>;
  28. };
  29. core1 {
  30. cpu = <&cpu5>;
  31. };
  32. core2 {
  33. cpu = <&cpu6>;
  34. };
  35. core3 {
  36. cpu = <&cpu7>;
  37. };
  38. };
  39. };
  40. cpu0: cpu@0 {
  41. capacity-dmips-mhz = <1024>;
  42. };
  43. cpu1: cpu@1 {
  44. capacity-dmips-mhz = <1024>;
  45. };
  46. cpu2: cpu@2 {
  47. capacity-dmips-mhz = <1024>;
  48. };
  49. cpu3: cpu@3 {
  50. capacity-dmips-mhz = <1024>;
  51. };
  52. cpu4: cpu@100 {
  53. device_type = "cpu";
  54. compatible = "arm,cortex-a53";
  55. reg = <0x0 0x100>;
  56. enable-method = "psci";
  57. capacity-dmips-mhz = <1024>;
  58. next-level-cache = <&l2>;
  59. clocks = <&scpi_dvfs 1>;
  60. #cooling-cells = <2>;
  61. };
  62. cpu5: cpu@101 {
  63. device_type = "cpu";
  64. compatible = "arm,cortex-a53";
  65. reg = <0x0 0x101>;
  66. enable-method = "psci";
  67. capacity-dmips-mhz = <1024>;
  68. next-level-cache = <&l2>;
  69. clocks = <&scpi_dvfs 1>;
  70. #cooling-cells = <2>;
  71. };
  72. cpu6: cpu@102 {
  73. device_type = "cpu";
  74. compatible = "arm,cortex-a53";
  75. reg = <0x0 0x102>;
  76. enable-method = "psci";
  77. capacity-dmips-mhz = <1024>;
  78. next-level-cache = <&l2>;
  79. clocks = <&scpi_dvfs 1>;
  80. #cooling-cells = <2>;
  81. };
  82. cpu7: cpu@103 {
  83. device_type = "cpu";
  84. compatible = "arm,cortex-a53";
  85. reg = <0x0 0x103>;
  86. enable-method = "psci";
  87. capacity-dmips-mhz = <1024>;
  88. next-level-cache = <&l2>;
  89. clocks = <&scpi_dvfs 1>;
  90. #cooling-cells = <2>;
  91. };
  92. };
  93. gpu_opp_table: opp-table {
  94. compatible = "operating-points-v2";
  95. opp-125000000 {
  96. opp-hz = /bits/ 64 <125000000>;
  97. opp-microvolt = <950000>;
  98. };
  99. opp-250000000 {
  100. opp-hz = /bits/ 64 <250000000>;
  101. opp-microvolt = <950000>;
  102. };
  103. opp-285714285 {
  104. opp-hz = /bits/ 64 <285714285>;
  105. opp-microvolt = <950000>;
  106. };
  107. opp-400000000 {
  108. opp-hz = /bits/ 64 <400000000>;
  109. opp-microvolt = <950000>;
  110. };
  111. opp-500000000 {
  112. opp-hz = /bits/ 64 <500000000>;
  113. opp-microvolt = <950000>;
  114. };
  115. opp-666666666 {
  116. opp-hz = /bits/ 64 <666666666>;
  117. opp-microvolt = <950000>;
  118. };
  119. };
  120. };
  121. &apb {
  122. usb2_phy2: phy@78040 {
  123. compatible = "amlogic,meson-gxl-usb2-phy";
  124. #phy-cells = <0>;
  125. reg = <0x0 0x78040 0x0 0x20>;
  126. clocks = <&clkc CLKID_USB>;
  127. clock-names = "phy";
  128. resets = <&reset RESET_USB_OTG>;
  129. reset-names = "phy";
  130. status = "okay";
  131. };
  132. mali: gpu@c0000 {
  133. compatible = "amlogic,meson-gxm-mali", "arm,mali-t820";
  134. reg = <0x0 0xc0000 0x0 0x40000>;
  135. interrupt-parent = <&gic>;
  136. interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
  137. <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
  138. <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>;
  139. interrupt-names = "job", "mmu", "gpu";
  140. clocks = <&clkc CLKID_MALI>;
  141. resets = <&reset RESET_MALI_CAPB3>, <&reset RESET_MALI>;
  142. operating-points-v2 = <&gpu_opp_table>;
  143. };
  144. };
  145. &clkc_AO {
  146. compatible = "amlogic,meson-gxm-aoclkc", "amlogic,meson-gx-aoclkc";
  147. };
  148. &cpu_cooling_maps {
  149. map0 {
  150. cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
  151. <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
  152. <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
  153. <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
  154. <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
  155. <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
  156. <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
  157. <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
  158. };
  159. map1 {
  160. cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
  161. <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
  162. <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
  163. <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
  164. <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
  165. <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
  166. <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
  167. <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
  168. };
  169. };
  170. &saradc {
  171. compatible = "amlogic,meson-gxm-saradc", "amlogic,meson-saradc";
  172. };
  173. &scpi_dvfs {
  174. clock-indices = <0 1>;
  175. clock-output-names = "vbig", "vlittle";
  176. };
  177. &vpu {
  178. compatible = "amlogic,meson-gxm-vpu", "amlogic,meson-gx-vpu";
  179. };
  180. &hdmi_tx {
  181. compatible = "amlogic,meson-gxm-dw-hdmi", "amlogic,meson-gx-dw-hdmi";
  182. };
  183. &usb {
  184. compatible = "amlogic,meson-gxm-usb-ctrl";
  185. phy-names = "usb2-phy0", "usb2-phy1", "usb2-phy2";
  186. phys = <&usb2_phy0>, <&usb2_phy1>, <&usb2_phy2>;
  187. };
  188. &vdec {
  189. compatible = "amlogic,gxm-vdec", "amlogic,gx-vdec";
  190. };