meson-g12b-khadas-vim3.dtsi 2.0 KB

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  1. // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2. /*
  3. * Copyright (c) 2019 BayLibre, SAS
  4. * Author: Neil Armstrong <[email protected]>
  5. * Copyright (c) 2019 Christian Hewitt <[email protected]>
  6. */
  7. / {
  8. model = "Khadas VIM3";
  9. vddcpu_a: regulator-vddcpu-a {
  10. /*
  11. * MP8756GD Regulator.
  12. */
  13. compatible = "pwm-regulator";
  14. regulator-name = "VDDCPU_A";
  15. regulator-min-microvolt = <690000>;
  16. regulator-max-microvolt = <1050000>;
  17. pwm-supply = <&dc_in>;
  18. pwms = <&pwm_ab 0 1250 0>;
  19. pwm-dutycycle-range = <100 0>;
  20. regulator-boot-on;
  21. regulator-always-on;
  22. };
  23. vddcpu_b: regulator-vddcpu-b {
  24. /*
  25. * Silergy SY8030DEC Regulator.
  26. */
  27. compatible = "pwm-regulator";
  28. regulator-name = "VDDCPU_B";
  29. regulator-min-microvolt = <690000>;
  30. regulator-max-microvolt = <1050000>;
  31. pwm-supply = <&vsys_3v3>;
  32. pwms = <&pwm_AO_cd 1 1250 0>;
  33. pwm-dutycycle-range = <100 0>;
  34. regulator-boot-on;
  35. regulator-always-on;
  36. };
  37. };
  38. &cpu0 {
  39. cpu-supply = <&vddcpu_b>;
  40. operating-points-v2 = <&cpu_opp_table_0>;
  41. clocks = <&clkc CLKID_CPU_CLK>;
  42. clock-latency = <50000>;
  43. };
  44. &cpu1 {
  45. cpu-supply = <&vddcpu_b>;
  46. operating-points-v2 = <&cpu_opp_table_0>;
  47. clocks = <&clkc CLKID_CPU_CLK>;
  48. clock-latency = <50000>;
  49. };
  50. &cpu100 {
  51. cpu-supply = <&vddcpu_a>;
  52. operating-points-v2 = <&cpub_opp_table_1>;
  53. clocks = <&clkc CLKID_CPUB_CLK>;
  54. clock-latency = <50000>;
  55. };
  56. &cpu101 {
  57. cpu-supply = <&vddcpu_a>;
  58. operating-points-v2 = <&cpub_opp_table_1>;
  59. clocks = <&clkc CLKID_CPUB_CLK>;
  60. clock-latency = <50000>;
  61. };
  62. &cpu102 {
  63. cpu-supply = <&vddcpu_a>;
  64. operating-points-v2 = <&cpub_opp_table_1>;
  65. clocks = <&clkc CLKID_CPUB_CLK>;
  66. clock-latency = <50000>;
  67. };
  68. &cpu103 {
  69. cpu-supply = <&vddcpu_a>;
  70. operating-points-v2 = <&cpub_opp_table_1>;
  71. clocks = <&clkc CLKID_CPUB_CLK>;
  72. clock-latency = <50000>;
  73. };
  74. &pwm_ab {
  75. pinctrl-0 = <&pwm_a_e_pins>;
  76. pinctrl-names = "default";
  77. clocks = <&xtal>;
  78. clock-names = "clkin0";
  79. status = "okay";
  80. };
  81. &pwm_AO_cd {
  82. pinctrl-0 = <&pwm_ao_d_e_pins>;
  83. pinctrl-names = "default";
  84. clocks = <&xtal>;
  85. clock-names = "clkin1";
  86. status = "okay";
  87. };