rd88f5182-setup.c 7.3 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * arch/arm/mach-orion5x/rd88f5182-setup.c
  4. *
  5. * Marvell Orion-NAS Reference Design Setup
  6. *
  7. * Maintainer: Ronen Shitrit <[email protected]>
  8. */
  9. #include <linux/gpio.h>
  10. #include <linux/kernel.h>
  11. #include <linux/init.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/pci.h>
  14. #include <linux/irq.h>
  15. #include <linux/mtd/physmap.h>
  16. #include <linux/mv643xx_eth.h>
  17. #include <linux/ata_platform.h>
  18. #include <linux/i2c.h>
  19. #include <linux/leds.h>
  20. #include <asm/mach-types.h>
  21. #include <asm/mach/arch.h>
  22. #include <asm/mach/pci.h>
  23. #include "common.h"
  24. #include "mpp.h"
  25. #include "orion5x.h"
  26. /*****************************************************************************
  27. * RD-88F5182 Info
  28. ****************************************************************************/
  29. /*
  30. * 512K NOR flash Device bus boot chip select
  31. */
  32. #define RD88F5182_NOR_BOOT_BASE 0xf4000000
  33. #define RD88F5182_NOR_BOOT_SIZE SZ_512K
  34. /*
  35. * 16M NOR flash on Device bus chip select 1
  36. */
  37. #define RD88F5182_NOR_BASE 0xfc000000
  38. #define RD88F5182_NOR_SIZE SZ_16M
  39. /*
  40. * PCI
  41. */
  42. #define RD88F5182_PCI_SLOT0_OFFS 7
  43. #define RD88F5182_PCI_SLOT0_IRQ_A_PIN 7
  44. #define RD88F5182_PCI_SLOT0_IRQ_B_PIN 6
  45. /*****************************************************************************
  46. * 16M NOR Flash on Device bus CS1
  47. ****************************************************************************/
  48. static struct physmap_flash_data rd88f5182_nor_flash_data = {
  49. .width = 1,
  50. };
  51. static struct resource rd88f5182_nor_flash_resource = {
  52. .flags = IORESOURCE_MEM,
  53. .start = RD88F5182_NOR_BASE,
  54. .end = RD88F5182_NOR_BASE + RD88F5182_NOR_SIZE - 1,
  55. };
  56. static struct platform_device rd88f5182_nor_flash = {
  57. .name = "physmap-flash",
  58. .id = 0,
  59. .dev = {
  60. .platform_data = &rd88f5182_nor_flash_data,
  61. },
  62. .num_resources = 1,
  63. .resource = &rd88f5182_nor_flash_resource,
  64. };
  65. /*****************************************************************************
  66. * Use GPIO LED as CPU active indication
  67. ****************************************************************************/
  68. #define RD88F5182_GPIO_LED 0
  69. static struct gpio_led rd88f5182_gpio_led_pins[] = {
  70. {
  71. .name = "rd88f5182:cpu",
  72. .default_trigger = "cpu0",
  73. .gpio = RD88F5182_GPIO_LED,
  74. },
  75. };
  76. static struct gpio_led_platform_data rd88f5182_gpio_led_data = {
  77. .leds = rd88f5182_gpio_led_pins,
  78. .num_leds = ARRAY_SIZE(rd88f5182_gpio_led_pins),
  79. };
  80. static struct platform_device rd88f5182_gpio_leds = {
  81. .name = "leds-gpio",
  82. .id = -1,
  83. .dev = {
  84. .platform_data = &rd88f5182_gpio_led_data,
  85. },
  86. };
  87. /*****************************************************************************
  88. * PCI
  89. ****************************************************************************/
  90. static void __init rd88f5182_pci_preinit(void)
  91. {
  92. int pin;
  93. /*
  94. * Configure PCI GPIO IRQ pins
  95. */
  96. pin = RD88F5182_PCI_SLOT0_IRQ_A_PIN;
  97. if (gpio_request(pin, "PCI IntA") == 0) {
  98. if (gpio_direction_input(pin) == 0) {
  99. irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
  100. } else {
  101. printk(KERN_ERR "rd88f5182_pci_preinit failed to "
  102. "set_irq_type pin %d\n", pin);
  103. gpio_free(pin);
  104. }
  105. } else {
  106. printk(KERN_ERR "rd88f5182_pci_preinit failed to request gpio %d\n", pin);
  107. }
  108. pin = RD88F5182_PCI_SLOT0_IRQ_B_PIN;
  109. if (gpio_request(pin, "PCI IntB") == 0) {
  110. if (gpio_direction_input(pin) == 0) {
  111. irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
  112. } else {
  113. printk(KERN_ERR "rd88f5182_pci_preinit failed to "
  114. "set_irq_type pin %d\n", pin);
  115. gpio_free(pin);
  116. }
  117. } else {
  118. printk(KERN_ERR "rd88f5182_pci_preinit failed to gpio_request %d\n", pin);
  119. }
  120. }
  121. static int __init rd88f5182_pci_map_irq(const struct pci_dev *dev, u8 slot,
  122. u8 pin)
  123. {
  124. int irq;
  125. /*
  126. * Check for devices with hard-wired IRQs.
  127. */
  128. irq = orion5x_pci_map_irq(dev, slot, pin);
  129. if (irq != -1)
  130. return irq;
  131. /*
  132. * PCI IRQs are connected via GPIOs
  133. */
  134. switch (slot - RD88F5182_PCI_SLOT0_OFFS) {
  135. case 0:
  136. if (pin == 1)
  137. return gpio_to_irq(RD88F5182_PCI_SLOT0_IRQ_A_PIN);
  138. else
  139. return gpio_to_irq(RD88F5182_PCI_SLOT0_IRQ_B_PIN);
  140. default:
  141. return -1;
  142. }
  143. }
  144. static struct hw_pci rd88f5182_pci __initdata = {
  145. .nr_controllers = 2,
  146. .preinit = rd88f5182_pci_preinit,
  147. .setup = orion5x_pci_sys_setup,
  148. .scan = orion5x_pci_sys_scan_bus,
  149. .map_irq = rd88f5182_pci_map_irq,
  150. };
  151. static int __init rd88f5182_pci_init(void)
  152. {
  153. if (machine_is_rd88f5182())
  154. pci_common_init(&rd88f5182_pci);
  155. return 0;
  156. }
  157. subsys_initcall(rd88f5182_pci_init);
  158. /*****************************************************************************
  159. * Ethernet
  160. ****************************************************************************/
  161. static struct mv643xx_eth_platform_data rd88f5182_eth_data = {
  162. .phy_addr = MV643XX_ETH_PHY_ADDR(8),
  163. };
  164. /*****************************************************************************
  165. * RTC DS1338 on I2C bus
  166. ****************************************************************************/
  167. static struct i2c_board_info __initdata rd88f5182_i2c_rtc = {
  168. I2C_BOARD_INFO("ds1338", 0x68),
  169. };
  170. /*****************************************************************************
  171. * Sata
  172. ****************************************************************************/
  173. static struct mv_sata_platform_data rd88f5182_sata_data = {
  174. .n_ports = 2,
  175. };
  176. /*****************************************************************************
  177. * General Setup
  178. ****************************************************************************/
  179. static unsigned int rd88f5182_mpp_modes[] __initdata = {
  180. MPP0_GPIO, /* Debug Led */
  181. MPP1_GPIO, /* Reset Switch */
  182. MPP2_UNUSED,
  183. MPP3_GPIO, /* RTC Int */
  184. MPP4_GPIO,
  185. MPP5_GPIO,
  186. MPP6_GPIO, /* PCI_intA */
  187. MPP7_GPIO, /* PCI_intB */
  188. MPP8_UNUSED,
  189. MPP9_UNUSED,
  190. MPP10_UNUSED,
  191. MPP11_UNUSED,
  192. MPP12_SATA_LED, /* SATA 0 presence */
  193. MPP13_SATA_LED, /* SATA 1 presence */
  194. MPP14_SATA_LED, /* SATA 0 active */
  195. MPP15_SATA_LED, /* SATA 1 active */
  196. MPP16_UNUSED,
  197. MPP17_UNUSED,
  198. MPP18_UNUSED,
  199. MPP19_UNUSED,
  200. 0,
  201. };
  202. static void __init rd88f5182_init(void)
  203. {
  204. /*
  205. * Setup basic Orion functions. Need to be called early.
  206. */
  207. orion5x_init();
  208. orion5x_mpp_conf(rd88f5182_mpp_modes);
  209. /*
  210. * MPP[20] PCI Clock to MV88F5182
  211. * MPP[21] PCI Clock to mini PCI CON11
  212. * MPP[22] USB 0 over current indication
  213. * MPP[23] USB 1 over current indication
  214. * MPP[24] USB 1 over current enable
  215. * MPP[25] USB 0 over current enable
  216. */
  217. /*
  218. * Configure peripherals.
  219. */
  220. orion5x_ehci0_init();
  221. orion5x_ehci1_init();
  222. orion5x_eth_init(&rd88f5182_eth_data);
  223. orion5x_i2c_init();
  224. orion5x_sata_init(&rd88f5182_sata_data);
  225. orion5x_uart0_init();
  226. orion5x_xor_init();
  227. mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_BOOT_TARGET,
  228. ORION_MBUS_DEVBUS_BOOT_ATTR,
  229. RD88F5182_NOR_BOOT_BASE,
  230. RD88F5182_NOR_BOOT_SIZE);
  231. mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_TARGET(1),
  232. ORION_MBUS_DEVBUS_ATTR(1),
  233. RD88F5182_NOR_BASE,
  234. RD88F5182_NOR_SIZE);
  235. platform_device_register(&rd88f5182_nor_flash);
  236. platform_device_register(&rd88f5182_gpio_leds);
  237. i2c_register_board_info(0, &rd88f5182_i2c_rtc, 1);
  238. }
  239. MACHINE_START(RD88F5182, "Marvell Orion-NAS Reference Design")
  240. /* Maintainer: Ronen Shitrit <[email protected]> */
  241. .atag_offset = 0x100,
  242. .nr_irqs = ORION5X_NR_IRQS,
  243. .init_machine = rd88f5182_init,
  244. .map_io = orion5x_map_io,
  245. .init_early = orion5x_init_early,
  246. .init_irq = orion5x_init_irq,
  247. .init_time = orion5x_timer_init,
  248. .restart = orion5x_restart,
  249. MACHINE_END