irqs.h 1.5 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * IRQ definitions for Orion SoC
  4. *
  5. * Maintainer: Tzachi Perelstein <[email protected]>
  6. */
  7. #ifndef __ASM_ARCH_IRQS_H
  8. #define __ASM_ARCH_IRQS_H
  9. /*
  10. * Orion Main Interrupt Controller
  11. */
  12. #define IRQ_ORION5X_BRIDGE (1 + 0)
  13. #define IRQ_ORION5X_DOORBELL_H2C (1 + 1)
  14. #define IRQ_ORION5X_DOORBELL_C2H (1 + 2)
  15. #define IRQ_ORION5X_UART0 (1 + 3)
  16. #define IRQ_ORION5X_UART1 (1 + 4)
  17. #define IRQ_ORION5X_I2C (1 + 5)
  18. #define IRQ_ORION5X_GPIO_0_7 (1 + 6)
  19. #define IRQ_ORION5X_GPIO_8_15 (1 + 7)
  20. #define IRQ_ORION5X_GPIO_16_23 (1 + 8)
  21. #define IRQ_ORION5X_GPIO_24_31 (1 + 9)
  22. #define IRQ_ORION5X_PCIE0_ERR (1 + 10)
  23. #define IRQ_ORION5X_PCIE0_INT (1 + 11)
  24. #define IRQ_ORION5X_USB1_CTRL (1 + 12)
  25. #define IRQ_ORION5X_DEV_BUS_ERR (1 + 14)
  26. #define IRQ_ORION5X_PCI_ERR (1 + 15)
  27. #define IRQ_ORION5X_USB_BR_ERR (1 + 16)
  28. #define IRQ_ORION5X_USB0_CTRL (1 + 17)
  29. #define IRQ_ORION5X_ETH_RX (1 + 18)
  30. #define IRQ_ORION5X_ETH_TX (1 + 19)
  31. #define IRQ_ORION5X_ETH_MISC (1 + 20)
  32. #define IRQ_ORION5X_ETH_SUM (1 + 21)
  33. #define IRQ_ORION5X_ETH_ERR (1 + 22)
  34. #define IRQ_ORION5X_IDMA_ERR (1 + 23)
  35. #define IRQ_ORION5X_IDMA_0 (1 + 24)
  36. #define IRQ_ORION5X_IDMA_1 (1 + 25)
  37. #define IRQ_ORION5X_IDMA_2 (1 + 26)
  38. #define IRQ_ORION5X_IDMA_3 (1 + 27)
  39. #define IRQ_ORION5X_CESA (1 + 28)
  40. #define IRQ_ORION5X_SATA (1 + 29)
  41. #define IRQ_ORION5X_XOR0 (1 + 30)
  42. #define IRQ_ORION5X_XOR1 (1 + 31)
  43. /*
  44. * Orion General Purpose Pins
  45. */
  46. #define IRQ_ORION5X_GPIO_START 33
  47. #define NR_GPIO_IRQS 32
  48. #define ORION5X_NR_IRQS (IRQ_ORION5X_GPIO_START + NR_GPIO_IRQS)
  49. #endif